1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef __KVM_X86_VMX_VMCS12_H 3 #define __KVM_X86_VMX_VMCS12_H 4 5 #include <linux/build_bug.h> 6 7 #include "vmcs.h" 8 9 /* 10 * struct vmcs12 describes the state that our guest hypervisor (L1) keeps for a 11 * single nested guest (L2), hence the name vmcs12. Any VMX implementation has 12 * a VMCS structure, and vmcs12 is our emulated VMX's VMCS. This structure is 13 * stored in guest memory specified by VMPTRLD, but is opaque to the guest, 14 * which must access it using VMREAD/VMWRITE/VMCLEAR instructions. 15 * More than one of these structures may exist, if L1 runs multiple L2 guests. 16 * nested_vmx_run() will use the data here to build the vmcs02: a VMCS for the 17 * underlying hardware which will be used to run L2. 18 * This structure is packed to ensure that its layout is identical across 19 * machines (necessary for live migration). 20 * 21 * IMPORTANT: Changing the layout of existing fields in this structure 22 * will break save/restore compatibility with older kvm releases. When 23 * adding new fields, either use space in the reserved padding* arrays 24 * or add the new fields to the end of the structure. 25 */ 26 typedef u64 natural_width; 27 struct __packed vmcs12 { 28 /* According to the Intel spec, a VMCS region must start with the 29 * following two fields. Then follow implementation-specific data. 30 */ 31 struct vmcs_hdr hdr; 32 u32 abort; 33 34 u32 launch_state; /* set to 0 by VMCLEAR, to 1 by VMLAUNCH */ 35 u32 padding[7]; /* room for future expansion */ 36 37 u64 io_bitmap_a; 38 u64 io_bitmap_b; 39 u64 msr_bitmap; 40 u64 vm_exit_msr_store_addr; 41 u64 vm_exit_msr_load_addr; 42 u64 vm_entry_msr_load_addr; 43 u64 tsc_offset; 44 u64 virtual_apic_page_addr; 45 u64 apic_access_addr; 46 u64 posted_intr_desc_addr; 47 u64 ept_pointer; 48 u64 eoi_exit_bitmap0; 49 u64 eoi_exit_bitmap1; 50 u64 eoi_exit_bitmap2; 51 u64 eoi_exit_bitmap3; 52 u64 xss_exit_bitmap; 53 u64 guest_physical_address; 54 u64 vmcs_link_pointer; 55 u64 guest_ia32_debugctl; 56 u64 guest_ia32_pat; 57 u64 guest_ia32_efer; 58 u64 guest_ia32_perf_global_ctrl; 59 u64 guest_pdptr0; 60 u64 guest_pdptr1; 61 u64 guest_pdptr2; 62 u64 guest_pdptr3; 63 u64 guest_bndcfgs; 64 u64 host_ia32_pat; 65 u64 host_ia32_efer; 66 u64 host_ia32_perf_global_ctrl; 67 u64 vmread_bitmap; 68 u64 vmwrite_bitmap; 69 u64 vm_function_control; 70 u64 eptp_list_address; 71 u64 pml_address; 72 u64 encls_exiting_bitmap; 73 u64 tsc_multiplier; 74 u64 padding64[1]; /* room for future expansion */ 75 /* 76 * To allow migration of L1 (complete with its L2 guests) between 77 * machines of different natural widths (32 or 64 bit), we cannot have 78 * unsigned long fields with no explicit size. We use u64 (aliased 79 * natural_width) instead. Luckily, x86 is little-endian. 80 */ 81 natural_width cr0_guest_host_mask; 82 natural_width cr4_guest_host_mask; 83 natural_width cr0_read_shadow; 84 natural_width cr4_read_shadow; 85 natural_width dead_space[4]; /* Last remnants of cr3_target_value[0-3]. */ 86 natural_width exit_qualification; 87 natural_width guest_linear_address; 88 natural_width guest_cr0; 89 natural_width guest_cr3; 90 natural_width guest_cr4; 91 natural_width guest_es_base; 92 natural_width guest_cs_base; 93 natural_width guest_ss_base; 94 natural_width guest_ds_base; 95 natural_width guest_fs_base; 96 natural_width guest_gs_base; 97 natural_width guest_ldtr_base; 98 natural_width guest_tr_base; 99 natural_width guest_gdtr_base; 100 natural_width guest_idtr_base; 101 natural_width guest_dr7; 102 natural_width guest_rsp; 103 natural_width guest_rip; 104 natural_width guest_rflags; 105 natural_width guest_pending_dbg_exceptions; 106 natural_width guest_sysenter_esp; 107 natural_width guest_sysenter_eip; 108 natural_width host_cr0; 109 natural_width host_cr3; 110 natural_width host_cr4; 111 natural_width host_fs_base; 112 natural_width host_gs_base; 113 natural_width host_tr_base; 114 natural_width host_gdtr_base; 115 natural_width host_idtr_base; 116 natural_width host_ia32_sysenter_esp; 117 natural_width host_ia32_sysenter_eip; 118 natural_width host_rsp; 119 natural_width host_rip; 120 natural_width paddingl[8]; /* room for future expansion */ 121 u32 pin_based_vm_exec_control; 122 u32 cpu_based_vm_exec_control; 123 u32 exception_bitmap; 124 u32 page_fault_error_code_mask; 125 u32 page_fault_error_code_match; 126 u32 cr3_target_count; 127 u32 vm_exit_controls; 128 u32 vm_exit_msr_store_count; 129 u32 vm_exit_msr_load_count; 130 u32 vm_entry_controls; 131 u32 vm_entry_msr_load_count; 132 u32 vm_entry_intr_info_field; 133 u32 vm_entry_exception_error_code; 134 u32 vm_entry_instruction_len; 135 u32 tpr_threshold; 136 u32 secondary_vm_exec_control; 137 u32 vm_instruction_error; 138 u32 vm_exit_reason; 139 u32 vm_exit_intr_info; 140 u32 vm_exit_intr_error_code; 141 u32 idt_vectoring_info_field; 142 u32 idt_vectoring_error_code; 143 u32 vm_exit_instruction_len; 144 u32 vmx_instruction_info; 145 u32 guest_es_limit; 146 u32 guest_cs_limit; 147 u32 guest_ss_limit; 148 u32 guest_ds_limit; 149 u32 guest_fs_limit; 150 u32 guest_gs_limit; 151 u32 guest_ldtr_limit; 152 u32 guest_tr_limit; 153 u32 guest_gdtr_limit; 154 u32 guest_idtr_limit; 155 u32 guest_es_ar_bytes; 156 u32 guest_cs_ar_bytes; 157 u32 guest_ss_ar_bytes; 158 u32 guest_ds_ar_bytes; 159 u32 guest_fs_ar_bytes; 160 u32 guest_gs_ar_bytes; 161 u32 guest_ldtr_ar_bytes; 162 u32 guest_tr_ar_bytes; 163 u32 guest_interruptibility_info; 164 u32 guest_activity_state; 165 u32 guest_sysenter_cs; 166 u32 host_ia32_sysenter_cs; 167 u32 vmx_preemption_timer_value; 168 u32 padding32[7]; /* room for future expansion */ 169 u16 virtual_processor_id; 170 u16 posted_intr_nv; 171 u16 guest_es_selector; 172 u16 guest_cs_selector; 173 u16 guest_ss_selector; 174 u16 guest_ds_selector; 175 u16 guest_fs_selector; 176 u16 guest_gs_selector; 177 u16 guest_ldtr_selector; 178 u16 guest_tr_selector; 179 u16 guest_intr_status; 180 u16 host_es_selector; 181 u16 host_cs_selector; 182 u16 host_ss_selector; 183 u16 host_ds_selector; 184 u16 host_fs_selector; 185 u16 host_gs_selector; 186 u16 host_tr_selector; 187 u16 guest_pml_index; 188 }; 189 190 /* 191 * VMCS12_REVISION is an arbitrary id that should be changed if the content or 192 * layout of struct vmcs12 is changed. MSR_IA32_VMX_BASIC returns this id, and 193 * VMPTRLD verifies that the VMCS region that L1 is loading contains this id. 194 * 195 * IMPORTANT: Changing this value will break save/restore compatibility with 196 * older kvm releases. 197 */ 198 #define VMCS12_REVISION 0x11e57ed0 199 200 /* 201 * VMCS12_SIZE is the number of bytes L1 should allocate for the VMXON region 202 * and any VMCS region. Although only sizeof(struct vmcs12) are used by the 203 * current implementation, 4K are reserved to avoid future complications and 204 * to preserve userspace ABI. 205 */ 206 #define VMCS12_SIZE KVM_STATE_NESTED_VMX_VMCS_SIZE 207 208 /* 209 * For save/restore compatibility, the vmcs12 field offsets must not change. 210 */ 211 #define CHECK_OFFSET(field, loc) \ 212 BUILD_BUG_ON_MSG(offsetof(struct vmcs12, field) != (loc), \ 213 "Offset of " #field " in struct vmcs12 has changed.") 214 215 static inline void vmx_check_vmcs12_offsets(void) 216 { 217 CHECK_OFFSET(hdr, 0); 218 CHECK_OFFSET(abort, 4); 219 CHECK_OFFSET(launch_state, 8); 220 CHECK_OFFSET(io_bitmap_a, 40); 221 CHECK_OFFSET(io_bitmap_b, 48); 222 CHECK_OFFSET(msr_bitmap, 56); 223 CHECK_OFFSET(vm_exit_msr_store_addr, 64); 224 CHECK_OFFSET(vm_exit_msr_load_addr, 72); 225 CHECK_OFFSET(vm_entry_msr_load_addr, 80); 226 CHECK_OFFSET(tsc_offset, 88); 227 CHECK_OFFSET(virtual_apic_page_addr, 96); 228 CHECK_OFFSET(apic_access_addr, 104); 229 CHECK_OFFSET(posted_intr_desc_addr, 112); 230 CHECK_OFFSET(ept_pointer, 120); 231 CHECK_OFFSET(eoi_exit_bitmap0, 128); 232 CHECK_OFFSET(eoi_exit_bitmap1, 136); 233 CHECK_OFFSET(eoi_exit_bitmap2, 144); 234 CHECK_OFFSET(eoi_exit_bitmap3, 152); 235 CHECK_OFFSET(xss_exit_bitmap, 160); 236 CHECK_OFFSET(guest_physical_address, 168); 237 CHECK_OFFSET(vmcs_link_pointer, 176); 238 CHECK_OFFSET(guest_ia32_debugctl, 184); 239 CHECK_OFFSET(guest_ia32_pat, 192); 240 CHECK_OFFSET(guest_ia32_efer, 200); 241 CHECK_OFFSET(guest_ia32_perf_global_ctrl, 208); 242 CHECK_OFFSET(guest_pdptr0, 216); 243 CHECK_OFFSET(guest_pdptr1, 224); 244 CHECK_OFFSET(guest_pdptr2, 232); 245 CHECK_OFFSET(guest_pdptr3, 240); 246 CHECK_OFFSET(guest_bndcfgs, 248); 247 CHECK_OFFSET(host_ia32_pat, 256); 248 CHECK_OFFSET(host_ia32_efer, 264); 249 CHECK_OFFSET(host_ia32_perf_global_ctrl, 272); 250 CHECK_OFFSET(vmread_bitmap, 280); 251 CHECK_OFFSET(vmwrite_bitmap, 288); 252 CHECK_OFFSET(vm_function_control, 296); 253 CHECK_OFFSET(eptp_list_address, 304); 254 CHECK_OFFSET(pml_address, 312); 255 CHECK_OFFSET(encls_exiting_bitmap, 320); 256 CHECK_OFFSET(tsc_multiplier, 328); 257 CHECK_OFFSET(cr0_guest_host_mask, 344); 258 CHECK_OFFSET(cr4_guest_host_mask, 352); 259 CHECK_OFFSET(cr0_read_shadow, 360); 260 CHECK_OFFSET(cr4_read_shadow, 368); 261 CHECK_OFFSET(dead_space, 376); 262 CHECK_OFFSET(exit_qualification, 408); 263 CHECK_OFFSET(guest_linear_address, 416); 264 CHECK_OFFSET(guest_cr0, 424); 265 CHECK_OFFSET(guest_cr3, 432); 266 CHECK_OFFSET(guest_cr4, 440); 267 CHECK_OFFSET(guest_es_base, 448); 268 CHECK_OFFSET(guest_cs_base, 456); 269 CHECK_OFFSET(guest_ss_base, 464); 270 CHECK_OFFSET(guest_ds_base, 472); 271 CHECK_OFFSET(guest_fs_base, 480); 272 CHECK_OFFSET(guest_gs_base, 488); 273 CHECK_OFFSET(guest_ldtr_base, 496); 274 CHECK_OFFSET(guest_tr_base, 504); 275 CHECK_OFFSET(guest_gdtr_base, 512); 276 CHECK_OFFSET(guest_idtr_base, 520); 277 CHECK_OFFSET(guest_dr7, 528); 278 CHECK_OFFSET(guest_rsp, 536); 279 CHECK_OFFSET(guest_rip, 544); 280 CHECK_OFFSET(guest_rflags, 552); 281 CHECK_OFFSET(guest_pending_dbg_exceptions, 560); 282 CHECK_OFFSET(guest_sysenter_esp, 568); 283 CHECK_OFFSET(guest_sysenter_eip, 576); 284 CHECK_OFFSET(host_cr0, 584); 285 CHECK_OFFSET(host_cr3, 592); 286 CHECK_OFFSET(host_cr4, 600); 287 CHECK_OFFSET(host_fs_base, 608); 288 CHECK_OFFSET(host_gs_base, 616); 289 CHECK_OFFSET(host_tr_base, 624); 290 CHECK_OFFSET(host_gdtr_base, 632); 291 CHECK_OFFSET(host_idtr_base, 640); 292 CHECK_OFFSET(host_ia32_sysenter_esp, 648); 293 CHECK_OFFSET(host_ia32_sysenter_eip, 656); 294 CHECK_OFFSET(host_rsp, 664); 295 CHECK_OFFSET(host_rip, 672); 296 CHECK_OFFSET(pin_based_vm_exec_control, 744); 297 CHECK_OFFSET(cpu_based_vm_exec_control, 748); 298 CHECK_OFFSET(exception_bitmap, 752); 299 CHECK_OFFSET(page_fault_error_code_mask, 756); 300 CHECK_OFFSET(page_fault_error_code_match, 760); 301 CHECK_OFFSET(cr3_target_count, 764); 302 CHECK_OFFSET(vm_exit_controls, 768); 303 CHECK_OFFSET(vm_exit_msr_store_count, 772); 304 CHECK_OFFSET(vm_exit_msr_load_count, 776); 305 CHECK_OFFSET(vm_entry_controls, 780); 306 CHECK_OFFSET(vm_entry_msr_load_count, 784); 307 CHECK_OFFSET(vm_entry_intr_info_field, 788); 308 CHECK_OFFSET(vm_entry_exception_error_code, 792); 309 CHECK_OFFSET(vm_entry_instruction_len, 796); 310 CHECK_OFFSET(tpr_threshold, 800); 311 CHECK_OFFSET(secondary_vm_exec_control, 804); 312 CHECK_OFFSET(vm_instruction_error, 808); 313 CHECK_OFFSET(vm_exit_reason, 812); 314 CHECK_OFFSET(vm_exit_intr_info, 816); 315 CHECK_OFFSET(vm_exit_intr_error_code, 820); 316 CHECK_OFFSET(idt_vectoring_info_field, 824); 317 CHECK_OFFSET(idt_vectoring_error_code, 828); 318 CHECK_OFFSET(vm_exit_instruction_len, 832); 319 CHECK_OFFSET(vmx_instruction_info, 836); 320 CHECK_OFFSET(guest_es_limit, 840); 321 CHECK_OFFSET(guest_cs_limit, 844); 322 CHECK_OFFSET(guest_ss_limit, 848); 323 CHECK_OFFSET(guest_ds_limit, 852); 324 CHECK_OFFSET(guest_fs_limit, 856); 325 CHECK_OFFSET(guest_gs_limit, 860); 326 CHECK_OFFSET(guest_ldtr_limit, 864); 327 CHECK_OFFSET(guest_tr_limit, 868); 328 CHECK_OFFSET(guest_gdtr_limit, 872); 329 CHECK_OFFSET(guest_idtr_limit, 876); 330 CHECK_OFFSET(guest_es_ar_bytes, 880); 331 CHECK_OFFSET(guest_cs_ar_bytes, 884); 332 CHECK_OFFSET(guest_ss_ar_bytes, 888); 333 CHECK_OFFSET(guest_ds_ar_bytes, 892); 334 CHECK_OFFSET(guest_fs_ar_bytes, 896); 335 CHECK_OFFSET(guest_gs_ar_bytes, 900); 336 CHECK_OFFSET(guest_ldtr_ar_bytes, 904); 337 CHECK_OFFSET(guest_tr_ar_bytes, 908); 338 CHECK_OFFSET(guest_interruptibility_info, 912); 339 CHECK_OFFSET(guest_activity_state, 916); 340 CHECK_OFFSET(guest_sysenter_cs, 920); 341 CHECK_OFFSET(host_ia32_sysenter_cs, 924); 342 CHECK_OFFSET(vmx_preemption_timer_value, 928); 343 CHECK_OFFSET(virtual_processor_id, 960); 344 CHECK_OFFSET(posted_intr_nv, 962); 345 CHECK_OFFSET(guest_es_selector, 964); 346 CHECK_OFFSET(guest_cs_selector, 966); 347 CHECK_OFFSET(guest_ss_selector, 968); 348 CHECK_OFFSET(guest_ds_selector, 970); 349 CHECK_OFFSET(guest_fs_selector, 972); 350 CHECK_OFFSET(guest_gs_selector, 974); 351 CHECK_OFFSET(guest_ldtr_selector, 976); 352 CHECK_OFFSET(guest_tr_selector, 978); 353 CHECK_OFFSET(guest_intr_status, 980); 354 CHECK_OFFSET(host_es_selector, 982); 355 CHECK_OFFSET(host_cs_selector, 984); 356 CHECK_OFFSET(host_ss_selector, 986); 357 CHECK_OFFSET(host_ds_selector, 988); 358 CHECK_OFFSET(host_fs_selector, 990); 359 CHECK_OFFSET(host_gs_selector, 992); 360 CHECK_OFFSET(host_tr_selector, 994); 361 CHECK_OFFSET(guest_pml_index, 996); 362 } 363 364 extern const unsigned short vmcs_field_to_offset_table[]; 365 extern const unsigned int nr_vmcs12_fields; 366 367 static inline short vmcs_field_to_offset(unsigned long field) 368 { 369 unsigned short offset; 370 unsigned int index; 371 372 if (field >> 15) 373 return -ENOENT; 374 375 index = ROL16(field, 6); 376 if (index >= nr_vmcs12_fields) 377 return -ENOENT; 378 379 index = array_index_nospec(index, nr_vmcs12_fields); 380 offset = vmcs_field_to_offset_table[index]; 381 if (offset == 0) 382 return -ENOENT; 383 return offset; 384 } 385 386 static inline u64 vmcs12_read_any(struct vmcs12 *vmcs12, unsigned long field, 387 u16 offset) 388 { 389 char *p = (char *)vmcs12 + offset; 390 391 switch (vmcs_field_width(field)) { 392 case VMCS_FIELD_WIDTH_NATURAL_WIDTH: 393 return *((natural_width *)p); 394 case VMCS_FIELD_WIDTH_U16: 395 return *((u16 *)p); 396 case VMCS_FIELD_WIDTH_U32: 397 return *((u32 *)p); 398 case VMCS_FIELD_WIDTH_U64: 399 return *((u64 *)p); 400 default: 401 WARN_ON_ONCE(1); 402 return -1; 403 } 404 } 405 406 static inline void vmcs12_write_any(struct vmcs12 *vmcs12, unsigned long field, 407 u16 offset, u64 field_value) 408 { 409 char *p = (char *)vmcs12 + offset; 410 411 switch (vmcs_field_width(field)) { 412 case VMCS_FIELD_WIDTH_U16: 413 *(u16 *)p = field_value; 414 break; 415 case VMCS_FIELD_WIDTH_U32: 416 *(u32 *)p = field_value; 417 break; 418 case VMCS_FIELD_WIDTH_U64: 419 *(u64 *)p = field_value; 420 break; 421 case VMCS_FIELD_WIDTH_NATURAL_WIDTH: 422 *(natural_width *)p = field_value; 423 break; 424 default: 425 WARN_ON_ONCE(1); 426 break; 427 } 428 } 429 430 #endif /* __KVM_X86_VMX_VMCS12_H */ 431