1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Kernel-based Virtual Machine driver for Linux 4 * 5 * AMD SVM support 6 * 7 * Copyright (C) 2006 Qumranet, Inc. 8 * Copyright 2010 Red Hat, Inc. and/or its affiliates. 9 * 10 * Authors: 11 * Yaniv Kamay <yaniv@qumranet.com> 12 * Avi Kivity <avi@qumranet.com> 13 */ 14 15 #define pr_fmt(fmt) "SVM: " fmt 16 17 #include <linux/kvm_types.h> 18 #include <linux/kvm_host.h> 19 #include <linux/kernel.h> 20 21 #include <asm/msr-index.h> 22 #include <asm/debugreg.h> 23 24 #include "kvm_emulate.h" 25 #include "trace.h" 26 #include "mmu.h" 27 #include "x86.h" 28 #include "cpuid.h" 29 #include "lapic.h" 30 #include "svm.h" 31 32 #define CC KVM_NESTED_VMENTER_CONSISTENCY_CHECK 33 34 static void nested_svm_inject_npf_exit(struct kvm_vcpu *vcpu, 35 struct x86_exception *fault) 36 { 37 struct vcpu_svm *svm = to_svm(vcpu); 38 39 if (svm->vmcb->control.exit_code != SVM_EXIT_NPF) { 40 /* 41 * TODO: track the cause of the nested page fault, and 42 * correctly fill in the high bits of exit_info_1. 43 */ 44 svm->vmcb->control.exit_code = SVM_EXIT_NPF; 45 svm->vmcb->control.exit_code_hi = 0; 46 svm->vmcb->control.exit_info_1 = (1ULL << 32); 47 svm->vmcb->control.exit_info_2 = fault->address; 48 } 49 50 svm->vmcb->control.exit_info_1 &= ~0xffffffffULL; 51 svm->vmcb->control.exit_info_1 |= fault->error_code; 52 53 nested_svm_vmexit(svm); 54 } 55 56 static void svm_inject_page_fault_nested(struct kvm_vcpu *vcpu, struct x86_exception *fault) 57 { 58 struct vcpu_svm *svm = to_svm(vcpu); 59 WARN_ON(!is_guest_mode(vcpu)); 60 61 if (vmcb_is_intercept(&svm->nested.ctl, INTERCEPT_EXCEPTION_OFFSET + PF_VECTOR) && 62 !svm->nested.nested_run_pending) { 63 svm->vmcb->control.exit_code = SVM_EXIT_EXCP_BASE + PF_VECTOR; 64 svm->vmcb->control.exit_code_hi = 0; 65 svm->vmcb->control.exit_info_1 = fault->error_code; 66 svm->vmcb->control.exit_info_2 = fault->address; 67 nested_svm_vmexit(svm); 68 } else { 69 kvm_inject_page_fault(vcpu, fault); 70 } 71 } 72 73 static u64 nested_svm_get_tdp_pdptr(struct kvm_vcpu *vcpu, int index) 74 { 75 struct vcpu_svm *svm = to_svm(vcpu); 76 u64 cr3 = svm->nested.ctl.nested_cr3; 77 u64 pdpte; 78 int ret; 79 80 ret = kvm_vcpu_read_guest_page(vcpu, gpa_to_gfn(cr3), &pdpte, 81 offset_in_page(cr3) + index * 8, 8); 82 if (ret) 83 return 0; 84 return pdpte; 85 } 86 87 static unsigned long nested_svm_get_tdp_cr3(struct kvm_vcpu *vcpu) 88 { 89 struct vcpu_svm *svm = to_svm(vcpu); 90 91 return svm->nested.ctl.nested_cr3; 92 } 93 94 static void nested_svm_init_mmu_context(struct kvm_vcpu *vcpu) 95 { 96 struct vcpu_svm *svm = to_svm(vcpu); 97 98 WARN_ON(mmu_is_nested(vcpu)); 99 100 vcpu->arch.mmu = &vcpu->arch.guest_mmu; 101 102 /* 103 * The NPT format depends on L1's CR4 and EFER, which is in vmcb01. Note, 104 * when called via KVM_SET_NESTED_STATE, that state may _not_ match current 105 * vCPU state. CR0.WP is explicitly ignored, while CR0.PG is required. 106 */ 107 kvm_init_shadow_npt_mmu(vcpu, X86_CR0_PG, svm->vmcb01.ptr->save.cr4, 108 svm->vmcb01.ptr->save.efer, 109 svm->nested.ctl.nested_cr3); 110 vcpu->arch.mmu->get_guest_pgd = nested_svm_get_tdp_cr3; 111 vcpu->arch.mmu->get_pdptr = nested_svm_get_tdp_pdptr; 112 vcpu->arch.mmu->inject_page_fault = nested_svm_inject_npf_exit; 113 vcpu->arch.walk_mmu = &vcpu->arch.nested_mmu; 114 } 115 116 static void nested_svm_uninit_mmu_context(struct kvm_vcpu *vcpu) 117 { 118 vcpu->arch.mmu = &vcpu->arch.root_mmu; 119 vcpu->arch.walk_mmu = &vcpu->arch.root_mmu; 120 } 121 122 void recalc_intercepts(struct vcpu_svm *svm) 123 { 124 struct vmcb_control_area *c, *h, *g; 125 unsigned int i; 126 127 vmcb_mark_dirty(svm->vmcb, VMCB_INTERCEPTS); 128 129 if (!is_guest_mode(&svm->vcpu)) 130 return; 131 132 c = &svm->vmcb->control; 133 h = &svm->vmcb01.ptr->control; 134 g = &svm->nested.ctl; 135 136 for (i = 0; i < MAX_INTERCEPT; i++) 137 c->intercepts[i] = h->intercepts[i]; 138 139 if (g->int_ctl & V_INTR_MASKING_MASK) { 140 /* We only want the cr8 intercept bits of L1 */ 141 vmcb_clr_intercept(c, INTERCEPT_CR8_READ); 142 vmcb_clr_intercept(c, INTERCEPT_CR8_WRITE); 143 144 /* 145 * Once running L2 with HF_VINTR_MASK, EFLAGS.IF does not 146 * affect any interrupt we may want to inject; therefore, 147 * interrupt window vmexits are irrelevant to L0. 148 */ 149 vmcb_clr_intercept(c, INTERCEPT_VINTR); 150 } 151 152 /* We don't want to see VMMCALLs from a nested guest */ 153 vmcb_clr_intercept(c, INTERCEPT_VMMCALL); 154 155 for (i = 0; i < MAX_INTERCEPT; i++) 156 c->intercepts[i] |= g->intercepts[i]; 157 158 /* If SMI is not intercepted, ignore guest SMI intercept as well */ 159 if (!intercept_smi) 160 vmcb_clr_intercept(c, INTERCEPT_SMI); 161 162 vmcb_set_intercept(c, INTERCEPT_VMLOAD); 163 vmcb_set_intercept(c, INTERCEPT_VMSAVE); 164 } 165 166 static void copy_vmcb_control_area(struct vmcb_control_area *dst, 167 struct vmcb_control_area *from) 168 { 169 unsigned int i; 170 171 for (i = 0; i < MAX_INTERCEPT; i++) 172 dst->intercepts[i] = from->intercepts[i]; 173 174 dst->iopm_base_pa = from->iopm_base_pa; 175 dst->msrpm_base_pa = from->msrpm_base_pa; 176 dst->tsc_offset = from->tsc_offset; 177 /* asid not copied, it is handled manually for svm->vmcb. */ 178 dst->tlb_ctl = from->tlb_ctl; 179 dst->int_ctl = from->int_ctl; 180 dst->int_vector = from->int_vector; 181 dst->int_state = from->int_state; 182 dst->exit_code = from->exit_code; 183 dst->exit_code_hi = from->exit_code_hi; 184 dst->exit_info_1 = from->exit_info_1; 185 dst->exit_info_2 = from->exit_info_2; 186 dst->exit_int_info = from->exit_int_info; 187 dst->exit_int_info_err = from->exit_int_info_err; 188 dst->nested_ctl = from->nested_ctl; 189 dst->event_inj = from->event_inj; 190 dst->event_inj_err = from->event_inj_err; 191 dst->nested_cr3 = from->nested_cr3; 192 dst->virt_ext = from->virt_ext; 193 dst->pause_filter_count = from->pause_filter_count; 194 dst->pause_filter_thresh = from->pause_filter_thresh; 195 } 196 197 static bool nested_svm_vmrun_msrpm(struct vcpu_svm *svm) 198 { 199 /* 200 * This function merges the msr permission bitmaps of kvm and the 201 * nested vmcb. It is optimized in that it only merges the parts where 202 * the kvm msr permission bitmap may contain zero bits 203 */ 204 int i; 205 206 if (!(vmcb_is_intercept(&svm->nested.ctl, INTERCEPT_MSR_PROT))) 207 return true; 208 209 for (i = 0; i < MSRPM_OFFSETS; i++) { 210 u32 value, p; 211 u64 offset; 212 213 if (msrpm_offsets[i] == 0xffffffff) 214 break; 215 216 p = msrpm_offsets[i]; 217 offset = svm->nested.ctl.msrpm_base_pa + (p * 4); 218 219 if (kvm_vcpu_read_guest(&svm->vcpu, offset, &value, 4)) 220 return false; 221 222 svm->nested.msrpm[p] = svm->msrpm[p] | value; 223 } 224 225 svm->vmcb->control.msrpm_base_pa = __sme_set(__pa(svm->nested.msrpm)); 226 227 return true; 228 } 229 230 /* 231 * Bits 11:0 of bitmap address are ignored by hardware 232 */ 233 static bool nested_svm_check_bitmap_pa(struct kvm_vcpu *vcpu, u64 pa, u32 size) 234 { 235 u64 addr = PAGE_ALIGN(pa); 236 237 return kvm_vcpu_is_legal_gpa(vcpu, addr) && 238 kvm_vcpu_is_legal_gpa(vcpu, addr + size - 1); 239 } 240 241 static bool nested_svm_check_tlb_ctl(struct kvm_vcpu *vcpu, u8 tlb_ctl) 242 { 243 /* Nested FLUSHBYASID is not supported yet. */ 244 switch(tlb_ctl) { 245 case TLB_CONTROL_DO_NOTHING: 246 case TLB_CONTROL_FLUSH_ALL_ASID: 247 return true; 248 default: 249 return false; 250 } 251 } 252 253 static bool nested_vmcb_check_controls(struct kvm_vcpu *vcpu, 254 struct vmcb_control_area *control) 255 { 256 if (CC(!vmcb_is_intercept(control, INTERCEPT_VMRUN))) 257 return false; 258 259 if (CC(control->asid == 0)) 260 return false; 261 262 if (CC((control->nested_ctl & SVM_NESTED_CTL_NP_ENABLE) && !npt_enabled)) 263 return false; 264 265 if (CC(!nested_svm_check_bitmap_pa(vcpu, control->msrpm_base_pa, 266 MSRPM_SIZE))) 267 return false; 268 if (CC(!nested_svm_check_bitmap_pa(vcpu, control->iopm_base_pa, 269 IOPM_SIZE))) 270 return false; 271 272 if (CC(!nested_svm_check_tlb_ctl(vcpu, control->tlb_ctl))) 273 return false; 274 275 return true; 276 } 277 278 static bool nested_vmcb_check_cr3_cr4(struct kvm_vcpu *vcpu, 279 struct vmcb_save_area *save) 280 { 281 /* 282 * These checks are also performed by KVM_SET_SREGS, 283 * except that EFER.LMA is not checked by SVM against 284 * CR0.PG && EFER.LME. 285 */ 286 if ((save->efer & EFER_LME) && (save->cr0 & X86_CR0_PG)) { 287 if (CC(!(save->cr4 & X86_CR4_PAE)) || 288 CC(!(save->cr0 & X86_CR0_PE)) || 289 CC(kvm_vcpu_is_illegal_gpa(vcpu, save->cr3))) 290 return false; 291 } 292 293 if (CC(!kvm_is_valid_cr4(vcpu, save->cr4))) 294 return false; 295 296 return true; 297 } 298 299 /* Common checks that apply to both L1 and L2 state. */ 300 static bool nested_vmcb_valid_sregs(struct kvm_vcpu *vcpu, 301 struct vmcb_save_area *save) 302 { 303 /* 304 * FIXME: these should be done after copying the fields, 305 * to avoid TOC/TOU races. For these save area checks 306 * the possible damage is limited since kvm_set_cr0 and 307 * kvm_set_cr4 handle failure; EFER_SVME is an exception 308 * so it is force-set later in nested_prepare_vmcb_save. 309 */ 310 if (CC(!(save->efer & EFER_SVME))) 311 return false; 312 313 if (CC((save->cr0 & X86_CR0_CD) == 0 && (save->cr0 & X86_CR0_NW)) || 314 CC(save->cr0 & ~0xffffffffULL)) 315 return false; 316 317 if (CC(!kvm_dr6_valid(save->dr6)) || CC(!kvm_dr7_valid(save->dr7))) 318 return false; 319 320 if (!nested_vmcb_check_cr3_cr4(vcpu, save)) 321 return false; 322 323 if (CC(!kvm_valid_efer(vcpu, save->efer))) 324 return false; 325 326 return true; 327 } 328 329 void nested_load_control_from_vmcb12(struct vcpu_svm *svm, 330 struct vmcb_control_area *control) 331 { 332 copy_vmcb_control_area(&svm->nested.ctl, control); 333 334 /* Copy it here because nested_svm_check_controls will check it. */ 335 svm->nested.ctl.asid = control->asid; 336 svm->nested.ctl.msrpm_base_pa &= ~0x0fffULL; 337 svm->nested.ctl.iopm_base_pa &= ~0x0fffULL; 338 } 339 340 /* 341 * Synchronize fields that are written by the processor, so that 342 * they can be copied back into the vmcb12. 343 */ 344 void nested_sync_control_from_vmcb02(struct vcpu_svm *svm) 345 { 346 u32 mask; 347 svm->nested.ctl.event_inj = svm->vmcb->control.event_inj; 348 svm->nested.ctl.event_inj_err = svm->vmcb->control.event_inj_err; 349 350 /* Only a few fields of int_ctl are written by the processor. */ 351 mask = V_IRQ_MASK | V_TPR_MASK; 352 if (!(svm->nested.ctl.int_ctl & V_INTR_MASKING_MASK) && 353 svm_is_intercept(svm, INTERCEPT_VINTR)) { 354 /* 355 * In order to request an interrupt window, L0 is usurping 356 * svm->vmcb->control.int_ctl and possibly setting V_IRQ 357 * even if it was clear in L1's VMCB. Restoring it would be 358 * wrong. However, in this case V_IRQ will remain true until 359 * interrupt_window_interception calls svm_clear_vintr and 360 * restores int_ctl. We can just leave it aside. 361 */ 362 mask &= ~V_IRQ_MASK; 363 } 364 svm->nested.ctl.int_ctl &= ~mask; 365 svm->nested.ctl.int_ctl |= svm->vmcb->control.int_ctl & mask; 366 } 367 368 /* 369 * Transfer any event that L0 or L1 wanted to inject into L2 to 370 * EXIT_INT_INFO. 371 */ 372 static void nested_save_pending_event_to_vmcb12(struct vcpu_svm *svm, 373 struct vmcb *vmcb12) 374 { 375 struct kvm_vcpu *vcpu = &svm->vcpu; 376 u32 exit_int_info = 0; 377 unsigned int nr; 378 379 if (vcpu->arch.exception.injected) { 380 nr = vcpu->arch.exception.nr; 381 exit_int_info = nr | SVM_EVTINJ_VALID | SVM_EVTINJ_TYPE_EXEPT; 382 383 if (vcpu->arch.exception.has_error_code) { 384 exit_int_info |= SVM_EVTINJ_VALID_ERR; 385 vmcb12->control.exit_int_info_err = 386 vcpu->arch.exception.error_code; 387 } 388 389 } else if (vcpu->arch.nmi_injected) { 390 exit_int_info = SVM_EVTINJ_VALID | SVM_EVTINJ_TYPE_NMI; 391 392 } else if (vcpu->arch.interrupt.injected) { 393 nr = vcpu->arch.interrupt.nr; 394 exit_int_info = nr | SVM_EVTINJ_VALID; 395 396 if (vcpu->arch.interrupt.soft) 397 exit_int_info |= SVM_EVTINJ_TYPE_SOFT; 398 else 399 exit_int_info |= SVM_EVTINJ_TYPE_INTR; 400 } 401 402 vmcb12->control.exit_int_info = exit_int_info; 403 } 404 405 static inline bool nested_npt_enabled(struct vcpu_svm *svm) 406 { 407 return svm->nested.ctl.nested_ctl & SVM_NESTED_CTL_NP_ENABLE; 408 } 409 410 static void nested_svm_transition_tlb_flush(struct kvm_vcpu *vcpu) 411 { 412 /* 413 * TODO: optimize unconditional TLB flush/MMU sync. A partial list of 414 * things to fix before this can be conditional: 415 * 416 * - Flush TLBs for both L1 and L2 remote TLB flush 417 * - Honor L1's request to flush an ASID on nested VMRUN 418 * - Sync nested NPT MMU on VMRUN that flushes L2's ASID[*] 419 * - Don't crush a pending TLB flush in vmcb02 on nested VMRUN 420 * - Flush L1's ASID on KVM_REQ_TLB_FLUSH_GUEST 421 * 422 * [*] Unlike nested EPT, SVM's ASID management can invalidate nested 423 * NPT guest-physical mappings on VMRUN. 424 */ 425 kvm_make_request(KVM_REQ_MMU_SYNC, vcpu); 426 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu); 427 } 428 429 /* 430 * Load guest's/host's cr3 on nested vmentry or vmexit. @nested_npt is true 431 * if we are emulating VM-Entry into a guest with NPT enabled. 432 */ 433 static int nested_svm_load_cr3(struct kvm_vcpu *vcpu, unsigned long cr3, 434 bool nested_npt, bool reload_pdptrs) 435 { 436 if (CC(kvm_vcpu_is_illegal_gpa(vcpu, cr3))) 437 return -EINVAL; 438 439 if (reload_pdptrs && !nested_npt && is_pae_paging(vcpu) && 440 CC(!load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))) 441 return -EINVAL; 442 443 if (!nested_npt) 444 kvm_mmu_new_pgd(vcpu, cr3); 445 446 vcpu->arch.cr3 = cr3; 447 kvm_register_mark_available(vcpu, VCPU_EXREG_CR3); 448 449 /* Re-initialize the MMU, e.g. to pick up CR4 MMU role changes. */ 450 kvm_init_mmu(vcpu); 451 452 return 0; 453 } 454 455 void nested_vmcb02_compute_g_pat(struct vcpu_svm *svm) 456 { 457 if (!svm->nested.vmcb02.ptr) 458 return; 459 460 /* FIXME: merge g_pat from vmcb01 and vmcb12. */ 461 svm->nested.vmcb02.ptr->save.g_pat = svm->vmcb01.ptr->save.g_pat; 462 } 463 464 static void nested_vmcb02_prepare_save(struct vcpu_svm *svm, struct vmcb *vmcb12) 465 { 466 bool new_vmcb12 = false; 467 468 nested_vmcb02_compute_g_pat(svm); 469 470 /* Load the nested guest state */ 471 if (svm->nested.vmcb12_gpa != svm->nested.last_vmcb12_gpa) { 472 new_vmcb12 = true; 473 svm->nested.last_vmcb12_gpa = svm->nested.vmcb12_gpa; 474 } 475 476 if (unlikely(new_vmcb12 || vmcb_is_dirty(vmcb12, VMCB_SEG))) { 477 svm->vmcb->save.es = vmcb12->save.es; 478 svm->vmcb->save.cs = vmcb12->save.cs; 479 svm->vmcb->save.ss = vmcb12->save.ss; 480 svm->vmcb->save.ds = vmcb12->save.ds; 481 svm->vmcb->save.cpl = vmcb12->save.cpl; 482 vmcb_mark_dirty(svm->vmcb, VMCB_SEG); 483 } 484 485 if (unlikely(new_vmcb12 || vmcb_is_dirty(vmcb12, VMCB_DT))) { 486 svm->vmcb->save.gdtr = vmcb12->save.gdtr; 487 svm->vmcb->save.idtr = vmcb12->save.idtr; 488 vmcb_mark_dirty(svm->vmcb, VMCB_DT); 489 } 490 491 kvm_set_rflags(&svm->vcpu, vmcb12->save.rflags | X86_EFLAGS_FIXED); 492 493 /* 494 * Force-set EFER_SVME even though it is checked earlier on the 495 * VMCB12, because the guest can flip the bit between the check 496 * and now. Clearing EFER_SVME would call svm_free_nested. 497 */ 498 svm_set_efer(&svm->vcpu, vmcb12->save.efer | EFER_SVME); 499 500 svm_set_cr0(&svm->vcpu, vmcb12->save.cr0); 501 svm_set_cr4(&svm->vcpu, vmcb12->save.cr4); 502 503 svm->vcpu.arch.cr2 = vmcb12->save.cr2; 504 505 kvm_rax_write(&svm->vcpu, vmcb12->save.rax); 506 kvm_rsp_write(&svm->vcpu, vmcb12->save.rsp); 507 kvm_rip_write(&svm->vcpu, vmcb12->save.rip); 508 509 /* In case we don't even reach vcpu_run, the fields are not updated */ 510 svm->vmcb->save.rax = vmcb12->save.rax; 511 svm->vmcb->save.rsp = vmcb12->save.rsp; 512 svm->vmcb->save.rip = vmcb12->save.rip; 513 514 /* These bits will be set properly on the first execution when new_vmc12 is true */ 515 if (unlikely(new_vmcb12 || vmcb_is_dirty(vmcb12, VMCB_DR))) { 516 svm->vmcb->save.dr7 = vmcb12->save.dr7 | DR7_FIXED_1; 517 svm->vcpu.arch.dr6 = vmcb12->save.dr6 | DR6_ACTIVE_LOW; 518 vmcb_mark_dirty(svm->vmcb, VMCB_DR); 519 } 520 } 521 522 static void nested_vmcb02_prepare_control(struct vcpu_svm *svm) 523 { 524 const u32 int_ctl_vmcb01_bits = 525 V_INTR_MASKING_MASK | V_GIF_MASK | V_GIF_ENABLE_MASK; 526 527 const u32 int_ctl_vmcb12_bits = V_TPR_MASK | V_IRQ_INJECTION_BITS_MASK; 528 529 struct kvm_vcpu *vcpu = &svm->vcpu; 530 531 /* 532 * Filled at exit: exit_code, exit_code_hi, exit_info_1, exit_info_2, 533 * exit_int_info, exit_int_info_err, next_rip, insn_len, insn_bytes. 534 */ 535 536 /* 537 * Also covers avic_vapic_bar, avic_backing_page, avic_logical_id, 538 * avic_physical_id. 539 */ 540 WARN_ON(kvm_apicv_activated(svm->vcpu.kvm)); 541 542 /* Copied from vmcb01. msrpm_base can be overwritten later. */ 543 svm->vmcb->control.nested_ctl = svm->vmcb01.ptr->control.nested_ctl; 544 svm->vmcb->control.iopm_base_pa = svm->vmcb01.ptr->control.iopm_base_pa; 545 svm->vmcb->control.msrpm_base_pa = svm->vmcb01.ptr->control.msrpm_base_pa; 546 547 /* Done at vmrun: asid. */ 548 549 /* Also overwritten later if necessary. */ 550 svm->vmcb->control.tlb_ctl = TLB_CONTROL_DO_NOTHING; 551 552 /* nested_cr3. */ 553 if (nested_npt_enabled(svm)) 554 nested_svm_init_mmu_context(vcpu); 555 556 vcpu->arch.tsc_offset = kvm_calc_nested_tsc_offset( 557 vcpu->arch.l1_tsc_offset, 558 svm->nested.ctl.tsc_offset, 559 svm->tsc_ratio_msr); 560 561 svm->vmcb->control.tsc_offset = vcpu->arch.tsc_offset; 562 563 if (svm->tsc_ratio_msr != kvm_default_tsc_scaling_ratio) { 564 WARN_ON(!svm->tsc_scaling_enabled); 565 nested_svm_update_tsc_ratio_msr(vcpu); 566 } 567 568 svm->vmcb->control.int_ctl = 569 (svm->nested.ctl.int_ctl & int_ctl_vmcb12_bits) | 570 (svm->vmcb01.ptr->control.int_ctl & int_ctl_vmcb01_bits); 571 572 svm->vmcb->control.int_vector = svm->nested.ctl.int_vector; 573 svm->vmcb->control.int_state = svm->nested.ctl.int_state; 574 svm->vmcb->control.event_inj = svm->nested.ctl.event_inj; 575 svm->vmcb->control.event_inj_err = svm->nested.ctl.event_inj_err; 576 577 nested_svm_transition_tlb_flush(vcpu); 578 579 /* Enter Guest-Mode */ 580 enter_guest_mode(vcpu); 581 582 /* 583 * Merge guest and host intercepts - must be called with vcpu in 584 * guest-mode to take effect. 585 */ 586 recalc_intercepts(svm); 587 } 588 589 static void nested_svm_copy_common_state(struct vmcb *from_vmcb, struct vmcb *to_vmcb) 590 { 591 /* 592 * Some VMCB state is shared between L1 and L2 and thus has to be 593 * moved at the time of nested vmrun and vmexit. 594 * 595 * VMLOAD/VMSAVE state would also belong in this category, but KVM 596 * always performs VMLOAD and VMSAVE from the VMCB01. 597 */ 598 to_vmcb->save.spec_ctrl = from_vmcb->save.spec_ctrl; 599 } 600 601 int enter_svm_guest_mode(struct kvm_vcpu *vcpu, u64 vmcb12_gpa, 602 struct vmcb *vmcb12, bool from_vmrun) 603 { 604 struct vcpu_svm *svm = to_svm(vcpu); 605 int ret; 606 607 trace_kvm_nested_vmrun(svm->vmcb->save.rip, vmcb12_gpa, 608 vmcb12->save.rip, 609 vmcb12->control.int_ctl, 610 vmcb12->control.event_inj, 611 vmcb12->control.nested_ctl); 612 613 trace_kvm_nested_intercepts(vmcb12->control.intercepts[INTERCEPT_CR] & 0xffff, 614 vmcb12->control.intercepts[INTERCEPT_CR] >> 16, 615 vmcb12->control.intercepts[INTERCEPT_EXCEPTION], 616 vmcb12->control.intercepts[INTERCEPT_WORD3], 617 vmcb12->control.intercepts[INTERCEPT_WORD4], 618 vmcb12->control.intercepts[INTERCEPT_WORD5]); 619 620 621 svm->nested.vmcb12_gpa = vmcb12_gpa; 622 623 WARN_ON(svm->vmcb == svm->nested.vmcb02.ptr); 624 625 nested_svm_copy_common_state(svm->vmcb01.ptr, svm->nested.vmcb02.ptr); 626 627 svm_switch_vmcb(svm, &svm->nested.vmcb02); 628 nested_vmcb02_prepare_control(svm); 629 nested_vmcb02_prepare_save(svm, vmcb12); 630 631 ret = nested_svm_load_cr3(&svm->vcpu, vmcb12->save.cr3, 632 nested_npt_enabled(svm), from_vmrun); 633 if (ret) 634 return ret; 635 636 if (!npt_enabled) 637 vcpu->arch.mmu->inject_page_fault = svm_inject_page_fault_nested; 638 639 if (!from_vmrun) 640 kvm_make_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu); 641 642 svm_set_gif(svm, true); 643 644 return 0; 645 } 646 647 int nested_svm_vmrun(struct kvm_vcpu *vcpu) 648 { 649 struct vcpu_svm *svm = to_svm(vcpu); 650 int ret; 651 struct vmcb *vmcb12; 652 struct kvm_host_map map; 653 u64 vmcb12_gpa; 654 655 if (!svm->nested.hsave_msr) { 656 kvm_inject_gp(vcpu, 0); 657 return 1; 658 } 659 660 if (is_smm(vcpu)) { 661 kvm_queue_exception(vcpu, UD_VECTOR); 662 return 1; 663 } 664 665 vmcb12_gpa = svm->vmcb->save.rax; 666 ret = kvm_vcpu_map(vcpu, gpa_to_gfn(vmcb12_gpa), &map); 667 if (ret == -EINVAL) { 668 kvm_inject_gp(vcpu, 0); 669 return 1; 670 } else if (ret) { 671 return kvm_skip_emulated_instruction(vcpu); 672 } 673 674 ret = kvm_skip_emulated_instruction(vcpu); 675 676 vmcb12 = map.hva; 677 678 if (WARN_ON_ONCE(!svm->nested.initialized)) 679 return -EINVAL; 680 681 nested_load_control_from_vmcb12(svm, &vmcb12->control); 682 683 if (!nested_vmcb_valid_sregs(vcpu, &vmcb12->save) || 684 !nested_vmcb_check_controls(vcpu, &svm->nested.ctl)) { 685 vmcb12->control.exit_code = SVM_EXIT_ERR; 686 vmcb12->control.exit_code_hi = 0; 687 vmcb12->control.exit_info_1 = 0; 688 vmcb12->control.exit_info_2 = 0; 689 goto out; 690 } 691 692 /* 693 * Since vmcb01 is not in use, we can use it to store some of the L1 694 * state. 695 */ 696 svm->vmcb01.ptr->save.efer = vcpu->arch.efer; 697 svm->vmcb01.ptr->save.cr0 = kvm_read_cr0(vcpu); 698 svm->vmcb01.ptr->save.cr4 = vcpu->arch.cr4; 699 svm->vmcb01.ptr->save.rflags = kvm_get_rflags(vcpu); 700 svm->vmcb01.ptr->save.rip = kvm_rip_read(vcpu); 701 702 if (!npt_enabled) 703 svm->vmcb01.ptr->save.cr3 = kvm_read_cr3(vcpu); 704 705 svm->nested.nested_run_pending = 1; 706 707 if (enter_svm_guest_mode(vcpu, vmcb12_gpa, vmcb12, true)) 708 goto out_exit_err; 709 710 if (nested_svm_vmrun_msrpm(svm)) 711 goto out; 712 713 out_exit_err: 714 svm->nested.nested_run_pending = 0; 715 716 svm->vmcb->control.exit_code = SVM_EXIT_ERR; 717 svm->vmcb->control.exit_code_hi = 0; 718 svm->vmcb->control.exit_info_1 = 0; 719 svm->vmcb->control.exit_info_2 = 0; 720 721 nested_svm_vmexit(svm); 722 723 out: 724 kvm_vcpu_unmap(vcpu, &map, true); 725 726 return ret; 727 } 728 729 /* Copy state save area fields which are handled by VMRUN */ 730 void svm_copy_vmrun_state(struct vmcb_save_area *to_save, 731 struct vmcb_save_area *from_save) 732 { 733 to_save->es = from_save->es; 734 to_save->cs = from_save->cs; 735 to_save->ss = from_save->ss; 736 to_save->ds = from_save->ds; 737 to_save->gdtr = from_save->gdtr; 738 to_save->idtr = from_save->idtr; 739 to_save->rflags = from_save->rflags | X86_EFLAGS_FIXED; 740 to_save->efer = from_save->efer; 741 to_save->cr0 = from_save->cr0; 742 to_save->cr3 = from_save->cr3; 743 to_save->cr4 = from_save->cr4; 744 to_save->rax = from_save->rax; 745 to_save->rsp = from_save->rsp; 746 to_save->rip = from_save->rip; 747 to_save->cpl = 0; 748 } 749 750 void svm_copy_vmloadsave_state(struct vmcb *to_vmcb, struct vmcb *from_vmcb) 751 { 752 to_vmcb->save.fs = from_vmcb->save.fs; 753 to_vmcb->save.gs = from_vmcb->save.gs; 754 to_vmcb->save.tr = from_vmcb->save.tr; 755 to_vmcb->save.ldtr = from_vmcb->save.ldtr; 756 to_vmcb->save.kernel_gs_base = from_vmcb->save.kernel_gs_base; 757 to_vmcb->save.star = from_vmcb->save.star; 758 to_vmcb->save.lstar = from_vmcb->save.lstar; 759 to_vmcb->save.cstar = from_vmcb->save.cstar; 760 to_vmcb->save.sfmask = from_vmcb->save.sfmask; 761 to_vmcb->save.sysenter_cs = from_vmcb->save.sysenter_cs; 762 to_vmcb->save.sysenter_esp = from_vmcb->save.sysenter_esp; 763 to_vmcb->save.sysenter_eip = from_vmcb->save.sysenter_eip; 764 } 765 766 int nested_svm_vmexit(struct vcpu_svm *svm) 767 { 768 struct kvm_vcpu *vcpu = &svm->vcpu; 769 struct vmcb *vmcb12; 770 struct vmcb *vmcb = svm->vmcb; 771 struct kvm_host_map map; 772 int rc; 773 774 /* Triple faults in L2 should never escape. */ 775 WARN_ON_ONCE(kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)); 776 777 rc = kvm_vcpu_map(vcpu, gpa_to_gfn(svm->nested.vmcb12_gpa), &map); 778 if (rc) { 779 if (rc == -EINVAL) 780 kvm_inject_gp(vcpu, 0); 781 return 1; 782 } 783 784 vmcb12 = map.hva; 785 786 /* Exit Guest-Mode */ 787 leave_guest_mode(vcpu); 788 svm->nested.vmcb12_gpa = 0; 789 WARN_ON_ONCE(svm->nested.nested_run_pending); 790 791 kvm_clear_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu); 792 793 /* in case we halted in L2 */ 794 svm->vcpu.arch.mp_state = KVM_MP_STATE_RUNNABLE; 795 796 /* Give the current vmcb to the guest */ 797 798 vmcb12->save.es = vmcb->save.es; 799 vmcb12->save.cs = vmcb->save.cs; 800 vmcb12->save.ss = vmcb->save.ss; 801 vmcb12->save.ds = vmcb->save.ds; 802 vmcb12->save.gdtr = vmcb->save.gdtr; 803 vmcb12->save.idtr = vmcb->save.idtr; 804 vmcb12->save.efer = svm->vcpu.arch.efer; 805 vmcb12->save.cr0 = kvm_read_cr0(vcpu); 806 vmcb12->save.cr3 = kvm_read_cr3(vcpu); 807 vmcb12->save.cr2 = vmcb->save.cr2; 808 vmcb12->save.cr4 = svm->vcpu.arch.cr4; 809 vmcb12->save.rflags = kvm_get_rflags(vcpu); 810 vmcb12->save.rip = kvm_rip_read(vcpu); 811 vmcb12->save.rsp = kvm_rsp_read(vcpu); 812 vmcb12->save.rax = kvm_rax_read(vcpu); 813 vmcb12->save.dr7 = vmcb->save.dr7; 814 vmcb12->save.dr6 = svm->vcpu.arch.dr6; 815 vmcb12->save.cpl = vmcb->save.cpl; 816 817 vmcb12->control.int_state = vmcb->control.int_state; 818 vmcb12->control.exit_code = vmcb->control.exit_code; 819 vmcb12->control.exit_code_hi = vmcb->control.exit_code_hi; 820 vmcb12->control.exit_info_1 = vmcb->control.exit_info_1; 821 vmcb12->control.exit_info_2 = vmcb->control.exit_info_2; 822 823 if (vmcb12->control.exit_code != SVM_EXIT_ERR) 824 nested_save_pending_event_to_vmcb12(svm, vmcb12); 825 826 if (svm->nrips_enabled) 827 vmcb12->control.next_rip = vmcb->control.next_rip; 828 829 vmcb12->control.int_ctl = svm->nested.ctl.int_ctl; 830 vmcb12->control.tlb_ctl = svm->nested.ctl.tlb_ctl; 831 vmcb12->control.event_inj = svm->nested.ctl.event_inj; 832 vmcb12->control.event_inj_err = svm->nested.ctl.event_inj_err; 833 834 nested_svm_copy_common_state(svm->nested.vmcb02.ptr, svm->vmcb01.ptr); 835 836 svm_switch_vmcb(svm, &svm->vmcb01); 837 838 /* 839 * On vmexit the GIF is set to false and 840 * no event can be injected in L1. 841 */ 842 svm_set_gif(svm, false); 843 svm->vmcb->control.exit_int_info = 0; 844 845 svm->vcpu.arch.tsc_offset = svm->vcpu.arch.l1_tsc_offset; 846 if (svm->vmcb->control.tsc_offset != svm->vcpu.arch.tsc_offset) { 847 svm->vmcb->control.tsc_offset = svm->vcpu.arch.tsc_offset; 848 vmcb_mark_dirty(svm->vmcb, VMCB_INTERCEPTS); 849 } 850 851 if (svm->tsc_ratio_msr != kvm_default_tsc_scaling_ratio) { 852 WARN_ON(!svm->tsc_scaling_enabled); 853 vcpu->arch.tsc_scaling_ratio = vcpu->arch.l1_tsc_scaling_ratio; 854 svm_write_tsc_multiplier(vcpu, vcpu->arch.tsc_scaling_ratio); 855 } 856 857 svm->nested.ctl.nested_cr3 = 0; 858 859 /* 860 * Restore processor state that had been saved in vmcb01 861 */ 862 kvm_set_rflags(vcpu, svm->vmcb->save.rflags); 863 svm_set_efer(vcpu, svm->vmcb->save.efer); 864 svm_set_cr0(vcpu, svm->vmcb->save.cr0 | X86_CR0_PE); 865 svm_set_cr4(vcpu, svm->vmcb->save.cr4); 866 kvm_rax_write(vcpu, svm->vmcb->save.rax); 867 kvm_rsp_write(vcpu, svm->vmcb->save.rsp); 868 kvm_rip_write(vcpu, svm->vmcb->save.rip); 869 870 svm->vcpu.arch.dr7 = DR7_FIXED_1; 871 kvm_update_dr7(&svm->vcpu); 872 873 trace_kvm_nested_vmexit_inject(vmcb12->control.exit_code, 874 vmcb12->control.exit_info_1, 875 vmcb12->control.exit_info_2, 876 vmcb12->control.exit_int_info, 877 vmcb12->control.exit_int_info_err, 878 KVM_ISA_SVM); 879 880 kvm_vcpu_unmap(vcpu, &map, true); 881 882 nested_svm_transition_tlb_flush(vcpu); 883 884 nested_svm_uninit_mmu_context(vcpu); 885 886 rc = nested_svm_load_cr3(vcpu, svm->vmcb->save.cr3, false, true); 887 if (rc) 888 return 1; 889 890 /* 891 * Drop what we picked up for L2 via svm_complete_interrupts() so it 892 * doesn't end up in L1. 893 */ 894 svm->vcpu.arch.nmi_injected = false; 895 kvm_clear_exception_queue(vcpu); 896 kvm_clear_interrupt_queue(vcpu); 897 898 /* 899 * If we are here following the completion of a VMRUN that 900 * is being single-stepped, queue the pending #DB intercept 901 * right now so that it an be accounted for before we execute 902 * L1's next instruction. 903 */ 904 if (unlikely(svm->vmcb->save.rflags & X86_EFLAGS_TF)) 905 kvm_queue_exception(&(svm->vcpu), DB_VECTOR); 906 907 return 0; 908 } 909 910 static void nested_svm_triple_fault(struct kvm_vcpu *vcpu) 911 { 912 nested_svm_simple_vmexit(to_svm(vcpu), SVM_EXIT_SHUTDOWN); 913 } 914 915 int svm_allocate_nested(struct vcpu_svm *svm) 916 { 917 struct page *vmcb02_page; 918 919 if (svm->nested.initialized) 920 return 0; 921 922 vmcb02_page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_ZERO); 923 if (!vmcb02_page) 924 return -ENOMEM; 925 svm->nested.vmcb02.ptr = page_address(vmcb02_page); 926 svm->nested.vmcb02.pa = __sme_set(page_to_pfn(vmcb02_page) << PAGE_SHIFT); 927 928 svm->nested.msrpm = svm_vcpu_alloc_msrpm(); 929 if (!svm->nested.msrpm) 930 goto err_free_vmcb02; 931 svm_vcpu_init_msrpm(&svm->vcpu, svm->nested.msrpm); 932 933 svm->nested.initialized = true; 934 return 0; 935 936 err_free_vmcb02: 937 __free_page(vmcb02_page); 938 return -ENOMEM; 939 } 940 941 void svm_free_nested(struct vcpu_svm *svm) 942 { 943 if (!svm->nested.initialized) 944 return; 945 946 svm_vcpu_free_msrpm(svm->nested.msrpm); 947 svm->nested.msrpm = NULL; 948 949 __free_page(virt_to_page(svm->nested.vmcb02.ptr)); 950 svm->nested.vmcb02.ptr = NULL; 951 952 /* 953 * When last_vmcb12_gpa matches the current vmcb12 gpa, 954 * some vmcb12 fields are not loaded if they are marked clean 955 * in the vmcb12, since in this case they are up to date already. 956 * 957 * When the vmcb02 is freed, this optimization becomes invalid. 958 */ 959 svm->nested.last_vmcb12_gpa = INVALID_GPA; 960 961 svm->nested.initialized = false; 962 } 963 964 /* 965 * Forcibly leave nested mode in order to be able to reset the VCPU later on. 966 */ 967 void svm_leave_nested(struct vcpu_svm *svm) 968 { 969 struct kvm_vcpu *vcpu = &svm->vcpu; 970 971 if (is_guest_mode(vcpu)) { 972 svm->nested.nested_run_pending = 0; 973 svm->nested.vmcb12_gpa = INVALID_GPA; 974 975 leave_guest_mode(vcpu); 976 977 svm_switch_vmcb(svm, &svm->vmcb01); 978 979 nested_svm_uninit_mmu_context(vcpu); 980 vmcb_mark_all_dirty(svm->vmcb); 981 } 982 983 kvm_clear_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu); 984 } 985 986 static int nested_svm_exit_handled_msr(struct vcpu_svm *svm) 987 { 988 u32 offset, msr, value; 989 int write, mask; 990 991 if (!(vmcb_is_intercept(&svm->nested.ctl, INTERCEPT_MSR_PROT))) 992 return NESTED_EXIT_HOST; 993 994 msr = svm->vcpu.arch.regs[VCPU_REGS_RCX]; 995 offset = svm_msrpm_offset(msr); 996 write = svm->vmcb->control.exit_info_1 & 1; 997 mask = 1 << ((2 * (msr & 0xf)) + write); 998 999 if (offset == MSR_INVALID) 1000 return NESTED_EXIT_DONE; 1001 1002 /* Offset is in 32 bit units but need in 8 bit units */ 1003 offset *= 4; 1004 1005 if (kvm_vcpu_read_guest(&svm->vcpu, svm->nested.ctl.msrpm_base_pa + offset, &value, 4)) 1006 return NESTED_EXIT_DONE; 1007 1008 return (value & mask) ? NESTED_EXIT_DONE : NESTED_EXIT_HOST; 1009 } 1010 1011 static int nested_svm_intercept_ioio(struct vcpu_svm *svm) 1012 { 1013 unsigned port, size, iopm_len; 1014 u16 val, mask; 1015 u8 start_bit; 1016 u64 gpa; 1017 1018 if (!(vmcb_is_intercept(&svm->nested.ctl, INTERCEPT_IOIO_PROT))) 1019 return NESTED_EXIT_HOST; 1020 1021 port = svm->vmcb->control.exit_info_1 >> 16; 1022 size = (svm->vmcb->control.exit_info_1 & SVM_IOIO_SIZE_MASK) >> 1023 SVM_IOIO_SIZE_SHIFT; 1024 gpa = svm->nested.ctl.iopm_base_pa + (port / 8); 1025 start_bit = port % 8; 1026 iopm_len = (start_bit + size > 8) ? 2 : 1; 1027 mask = (0xf >> (4 - size)) << start_bit; 1028 val = 0; 1029 1030 if (kvm_vcpu_read_guest(&svm->vcpu, gpa, &val, iopm_len)) 1031 return NESTED_EXIT_DONE; 1032 1033 return (val & mask) ? NESTED_EXIT_DONE : NESTED_EXIT_HOST; 1034 } 1035 1036 static int nested_svm_intercept(struct vcpu_svm *svm) 1037 { 1038 u32 exit_code = svm->vmcb->control.exit_code; 1039 int vmexit = NESTED_EXIT_HOST; 1040 1041 switch (exit_code) { 1042 case SVM_EXIT_MSR: 1043 vmexit = nested_svm_exit_handled_msr(svm); 1044 break; 1045 case SVM_EXIT_IOIO: 1046 vmexit = nested_svm_intercept_ioio(svm); 1047 break; 1048 case SVM_EXIT_READ_CR0 ... SVM_EXIT_WRITE_CR8: { 1049 if (vmcb_is_intercept(&svm->nested.ctl, exit_code)) 1050 vmexit = NESTED_EXIT_DONE; 1051 break; 1052 } 1053 case SVM_EXIT_READ_DR0 ... SVM_EXIT_WRITE_DR7: { 1054 if (vmcb_is_intercept(&svm->nested.ctl, exit_code)) 1055 vmexit = NESTED_EXIT_DONE; 1056 break; 1057 } 1058 case SVM_EXIT_EXCP_BASE ... SVM_EXIT_EXCP_BASE + 0x1f: { 1059 /* 1060 * Host-intercepted exceptions have been checked already in 1061 * nested_svm_exit_special. There is nothing to do here, 1062 * the vmexit is injected by svm_check_nested_events. 1063 */ 1064 vmexit = NESTED_EXIT_DONE; 1065 break; 1066 } 1067 case SVM_EXIT_ERR: { 1068 vmexit = NESTED_EXIT_DONE; 1069 break; 1070 } 1071 default: { 1072 if (vmcb_is_intercept(&svm->nested.ctl, exit_code)) 1073 vmexit = NESTED_EXIT_DONE; 1074 } 1075 } 1076 1077 return vmexit; 1078 } 1079 1080 int nested_svm_exit_handled(struct vcpu_svm *svm) 1081 { 1082 int vmexit; 1083 1084 vmexit = nested_svm_intercept(svm); 1085 1086 if (vmexit == NESTED_EXIT_DONE) 1087 nested_svm_vmexit(svm); 1088 1089 return vmexit; 1090 } 1091 1092 int nested_svm_check_permissions(struct kvm_vcpu *vcpu) 1093 { 1094 if (!(vcpu->arch.efer & EFER_SVME) || !is_paging(vcpu)) { 1095 kvm_queue_exception(vcpu, UD_VECTOR); 1096 return 1; 1097 } 1098 1099 if (to_svm(vcpu)->vmcb->save.cpl) { 1100 kvm_inject_gp(vcpu, 0); 1101 return 1; 1102 } 1103 1104 return 0; 1105 } 1106 1107 static bool nested_exit_on_exception(struct vcpu_svm *svm) 1108 { 1109 unsigned int nr = svm->vcpu.arch.exception.nr; 1110 1111 return (svm->nested.ctl.intercepts[INTERCEPT_EXCEPTION] & BIT(nr)); 1112 } 1113 1114 static void nested_svm_inject_exception_vmexit(struct vcpu_svm *svm) 1115 { 1116 unsigned int nr = svm->vcpu.arch.exception.nr; 1117 1118 svm->vmcb->control.exit_code = SVM_EXIT_EXCP_BASE + nr; 1119 svm->vmcb->control.exit_code_hi = 0; 1120 1121 if (svm->vcpu.arch.exception.has_error_code) 1122 svm->vmcb->control.exit_info_1 = svm->vcpu.arch.exception.error_code; 1123 1124 /* 1125 * EXITINFO2 is undefined for all exception intercepts other 1126 * than #PF. 1127 */ 1128 if (nr == PF_VECTOR) { 1129 if (svm->vcpu.arch.exception.nested_apf) 1130 svm->vmcb->control.exit_info_2 = svm->vcpu.arch.apf.nested_apf_token; 1131 else if (svm->vcpu.arch.exception.has_payload) 1132 svm->vmcb->control.exit_info_2 = svm->vcpu.arch.exception.payload; 1133 else 1134 svm->vmcb->control.exit_info_2 = svm->vcpu.arch.cr2; 1135 } else if (nr == DB_VECTOR) { 1136 /* See inject_pending_event. */ 1137 kvm_deliver_exception_payload(&svm->vcpu); 1138 if (svm->vcpu.arch.dr7 & DR7_GD) { 1139 svm->vcpu.arch.dr7 &= ~DR7_GD; 1140 kvm_update_dr7(&svm->vcpu); 1141 } 1142 } else 1143 WARN_ON(svm->vcpu.arch.exception.has_payload); 1144 1145 nested_svm_vmexit(svm); 1146 } 1147 1148 static inline bool nested_exit_on_init(struct vcpu_svm *svm) 1149 { 1150 return vmcb_is_intercept(&svm->nested.ctl, INTERCEPT_INIT); 1151 } 1152 1153 static int svm_check_nested_events(struct kvm_vcpu *vcpu) 1154 { 1155 struct vcpu_svm *svm = to_svm(vcpu); 1156 bool block_nested_events = 1157 kvm_event_needs_reinjection(vcpu) || svm->nested.nested_run_pending; 1158 struct kvm_lapic *apic = vcpu->arch.apic; 1159 1160 if (lapic_in_kernel(vcpu) && 1161 test_bit(KVM_APIC_INIT, &apic->pending_events)) { 1162 if (block_nested_events) 1163 return -EBUSY; 1164 if (!nested_exit_on_init(svm)) 1165 return 0; 1166 nested_svm_simple_vmexit(svm, SVM_EXIT_INIT); 1167 return 0; 1168 } 1169 1170 if (vcpu->arch.exception.pending) { 1171 /* 1172 * Only a pending nested run can block a pending exception. 1173 * Otherwise an injected NMI/interrupt should either be 1174 * lost or delivered to the nested hypervisor in the EXITINTINFO 1175 * vmcb field, while delivering the pending exception. 1176 */ 1177 if (svm->nested.nested_run_pending) 1178 return -EBUSY; 1179 if (!nested_exit_on_exception(svm)) 1180 return 0; 1181 nested_svm_inject_exception_vmexit(svm); 1182 return 0; 1183 } 1184 1185 if (vcpu->arch.smi_pending && !svm_smi_blocked(vcpu)) { 1186 if (block_nested_events) 1187 return -EBUSY; 1188 if (!nested_exit_on_smi(svm)) 1189 return 0; 1190 nested_svm_simple_vmexit(svm, SVM_EXIT_SMI); 1191 return 0; 1192 } 1193 1194 if (vcpu->arch.nmi_pending && !svm_nmi_blocked(vcpu)) { 1195 if (block_nested_events) 1196 return -EBUSY; 1197 if (!nested_exit_on_nmi(svm)) 1198 return 0; 1199 nested_svm_simple_vmexit(svm, SVM_EXIT_NMI); 1200 return 0; 1201 } 1202 1203 if (kvm_cpu_has_interrupt(vcpu) && !svm_interrupt_blocked(vcpu)) { 1204 if (block_nested_events) 1205 return -EBUSY; 1206 if (!nested_exit_on_intr(svm)) 1207 return 0; 1208 trace_kvm_nested_intr_vmexit(svm->vmcb->save.rip); 1209 nested_svm_simple_vmexit(svm, SVM_EXIT_INTR); 1210 return 0; 1211 } 1212 1213 return 0; 1214 } 1215 1216 int nested_svm_exit_special(struct vcpu_svm *svm) 1217 { 1218 u32 exit_code = svm->vmcb->control.exit_code; 1219 1220 switch (exit_code) { 1221 case SVM_EXIT_INTR: 1222 case SVM_EXIT_NMI: 1223 case SVM_EXIT_NPF: 1224 return NESTED_EXIT_HOST; 1225 case SVM_EXIT_EXCP_BASE ... SVM_EXIT_EXCP_BASE + 0x1f: { 1226 u32 excp_bits = 1 << (exit_code - SVM_EXIT_EXCP_BASE); 1227 1228 if (svm->vmcb01.ptr->control.intercepts[INTERCEPT_EXCEPTION] & 1229 excp_bits) 1230 return NESTED_EXIT_HOST; 1231 else if (exit_code == SVM_EXIT_EXCP_BASE + PF_VECTOR && 1232 svm->vcpu.arch.apf.host_apf_flags) 1233 /* Trap async PF even if not shadowing */ 1234 return NESTED_EXIT_HOST; 1235 break; 1236 } 1237 default: 1238 break; 1239 } 1240 1241 return NESTED_EXIT_CONTINUE; 1242 } 1243 1244 void nested_svm_update_tsc_ratio_msr(struct kvm_vcpu *vcpu) 1245 { 1246 struct vcpu_svm *svm = to_svm(vcpu); 1247 1248 vcpu->arch.tsc_scaling_ratio = 1249 kvm_calc_nested_tsc_multiplier(vcpu->arch.l1_tsc_scaling_ratio, 1250 svm->tsc_ratio_msr); 1251 svm_write_tsc_multiplier(vcpu, vcpu->arch.tsc_scaling_ratio); 1252 } 1253 1254 static int svm_get_nested_state(struct kvm_vcpu *vcpu, 1255 struct kvm_nested_state __user *user_kvm_nested_state, 1256 u32 user_data_size) 1257 { 1258 struct vcpu_svm *svm; 1259 struct kvm_nested_state kvm_state = { 1260 .flags = 0, 1261 .format = KVM_STATE_NESTED_FORMAT_SVM, 1262 .size = sizeof(kvm_state), 1263 }; 1264 struct vmcb __user *user_vmcb = (struct vmcb __user *) 1265 &user_kvm_nested_state->data.svm[0]; 1266 1267 if (!vcpu) 1268 return kvm_state.size + KVM_STATE_NESTED_SVM_VMCB_SIZE; 1269 1270 svm = to_svm(vcpu); 1271 1272 if (user_data_size < kvm_state.size) 1273 goto out; 1274 1275 /* First fill in the header and copy it out. */ 1276 if (is_guest_mode(vcpu)) { 1277 kvm_state.hdr.svm.vmcb_pa = svm->nested.vmcb12_gpa; 1278 kvm_state.size += KVM_STATE_NESTED_SVM_VMCB_SIZE; 1279 kvm_state.flags |= KVM_STATE_NESTED_GUEST_MODE; 1280 1281 if (svm->nested.nested_run_pending) 1282 kvm_state.flags |= KVM_STATE_NESTED_RUN_PENDING; 1283 } 1284 1285 if (gif_set(svm)) 1286 kvm_state.flags |= KVM_STATE_NESTED_GIF_SET; 1287 1288 if (copy_to_user(user_kvm_nested_state, &kvm_state, sizeof(kvm_state))) 1289 return -EFAULT; 1290 1291 if (!is_guest_mode(vcpu)) 1292 goto out; 1293 1294 /* 1295 * Copy over the full size of the VMCB rather than just the size 1296 * of the structs. 1297 */ 1298 if (clear_user(user_vmcb, KVM_STATE_NESTED_SVM_VMCB_SIZE)) 1299 return -EFAULT; 1300 if (copy_to_user(&user_vmcb->control, &svm->nested.ctl, 1301 sizeof(user_vmcb->control))) 1302 return -EFAULT; 1303 if (copy_to_user(&user_vmcb->save, &svm->vmcb01.ptr->save, 1304 sizeof(user_vmcb->save))) 1305 return -EFAULT; 1306 out: 1307 return kvm_state.size; 1308 } 1309 1310 static int svm_set_nested_state(struct kvm_vcpu *vcpu, 1311 struct kvm_nested_state __user *user_kvm_nested_state, 1312 struct kvm_nested_state *kvm_state) 1313 { 1314 struct vcpu_svm *svm = to_svm(vcpu); 1315 struct vmcb __user *user_vmcb = (struct vmcb __user *) 1316 &user_kvm_nested_state->data.svm[0]; 1317 struct vmcb_control_area *ctl; 1318 struct vmcb_save_area *save; 1319 unsigned long cr0; 1320 int ret; 1321 1322 BUILD_BUG_ON(sizeof(struct vmcb_control_area) + sizeof(struct vmcb_save_area) > 1323 KVM_STATE_NESTED_SVM_VMCB_SIZE); 1324 1325 if (kvm_state->format != KVM_STATE_NESTED_FORMAT_SVM) 1326 return -EINVAL; 1327 1328 if (kvm_state->flags & ~(KVM_STATE_NESTED_GUEST_MODE | 1329 KVM_STATE_NESTED_RUN_PENDING | 1330 KVM_STATE_NESTED_GIF_SET)) 1331 return -EINVAL; 1332 1333 /* 1334 * If in guest mode, vcpu->arch.efer actually refers to the L2 guest's 1335 * EFER.SVME, but EFER.SVME still has to be 1 for VMRUN to succeed. 1336 */ 1337 if (!(vcpu->arch.efer & EFER_SVME)) { 1338 /* GIF=1 and no guest mode are required if SVME=0. */ 1339 if (kvm_state->flags != KVM_STATE_NESTED_GIF_SET) 1340 return -EINVAL; 1341 } 1342 1343 /* SMM temporarily disables SVM, so we cannot be in guest mode. */ 1344 if (is_smm(vcpu) && (kvm_state->flags & KVM_STATE_NESTED_GUEST_MODE)) 1345 return -EINVAL; 1346 1347 if (!(kvm_state->flags & KVM_STATE_NESTED_GUEST_MODE)) { 1348 svm_leave_nested(svm); 1349 svm_set_gif(svm, !!(kvm_state->flags & KVM_STATE_NESTED_GIF_SET)); 1350 return 0; 1351 } 1352 1353 if (!page_address_valid(vcpu, kvm_state->hdr.svm.vmcb_pa)) 1354 return -EINVAL; 1355 if (kvm_state->size < sizeof(*kvm_state) + KVM_STATE_NESTED_SVM_VMCB_SIZE) 1356 return -EINVAL; 1357 1358 ret = -ENOMEM; 1359 ctl = kzalloc(sizeof(*ctl), GFP_KERNEL_ACCOUNT); 1360 save = kzalloc(sizeof(*save), GFP_KERNEL_ACCOUNT); 1361 if (!ctl || !save) 1362 goto out_free; 1363 1364 ret = -EFAULT; 1365 if (copy_from_user(ctl, &user_vmcb->control, sizeof(*ctl))) 1366 goto out_free; 1367 if (copy_from_user(save, &user_vmcb->save, sizeof(*save))) 1368 goto out_free; 1369 1370 ret = -EINVAL; 1371 if (!nested_vmcb_check_controls(vcpu, ctl)) 1372 goto out_free; 1373 1374 /* 1375 * Processor state contains L2 state. Check that it is 1376 * valid for guest mode (see nested_vmcb_check_save). 1377 */ 1378 cr0 = kvm_read_cr0(vcpu); 1379 if (((cr0 & X86_CR0_CD) == 0) && (cr0 & X86_CR0_NW)) 1380 goto out_free; 1381 1382 /* 1383 * Validate host state saved from before VMRUN (see 1384 * nested_svm_check_permissions). 1385 */ 1386 if (!(save->cr0 & X86_CR0_PG) || 1387 !(save->cr0 & X86_CR0_PE) || 1388 (save->rflags & X86_EFLAGS_VM) || 1389 !nested_vmcb_valid_sregs(vcpu, save)) 1390 goto out_free; 1391 1392 /* 1393 * While the nested guest CR3 is already checked and set by 1394 * KVM_SET_SREGS, it was set when nested state was yet loaded, 1395 * thus MMU might not be initialized correctly. 1396 * Set it again to fix this. 1397 */ 1398 1399 ret = nested_svm_load_cr3(&svm->vcpu, vcpu->arch.cr3, 1400 nested_npt_enabled(svm), false); 1401 if (WARN_ON_ONCE(ret)) 1402 goto out_free; 1403 1404 1405 /* 1406 * All checks done, we can enter guest mode. Userspace provides 1407 * vmcb12.control, which will be combined with L1 and stored into 1408 * vmcb02, and the L1 save state which we store in vmcb01. 1409 * L2 registers if needed are moved from the current VMCB to VMCB02. 1410 */ 1411 1412 if (is_guest_mode(vcpu)) 1413 svm_leave_nested(svm); 1414 else 1415 svm->nested.vmcb02.ptr->save = svm->vmcb01.ptr->save; 1416 1417 svm_set_gif(svm, !!(kvm_state->flags & KVM_STATE_NESTED_GIF_SET)); 1418 1419 svm->nested.nested_run_pending = 1420 !!(kvm_state->flags & KVM_STATE_NESTED_RUN_PENDING); 1421 1422 svm->nested.vmcb12_gpa = kvm_state->hdr.svm.vmcb_pa; 1423 1424 svm_copy_vmrun_state(&svm->vmcb01.ptr->save, save); 1425 nested_load_control_from_vmcb12(svm, ctl); 1426 1427 svm_switch_vmcb(svm, &svm->nested.vmcb02); 1428 nested_vmcb02_prepare_control(svm); 1429 kvm_make_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu); 1430 ret = 0; 1431 out_free: 1432 kfree(save); 1433 kfree(ctl); 1434 1435 return ret; 1436 } 1437 1438 static bool svm_get_nested_state_pages(struct kvm_vcpu *vcpu) 1439 { 1440 struct vcpu_svm *svm = to_svm(vcpu); 1441 1442 if (WARN_ON(!is_guest_mode(vcpu))) 1443 return true; 1444 1445 if (!vcpu->arch.pdptrs_from_userspace && 1446 !nested_npt_enabled(svm) && is_pae_paging(vcpu)) 1447 /* 1448 * Reload the guest's PDPTRs since after a migration 1449 * the guest CR3 might be restored prior to setting the nested 1450 * state which can lead to a load of wrong PDPTRs. 1451 */ 1452 if (CC(!load_pdptrs(vcpu, vcpu->arch.walk_mmu, vcpu->arch.cr3))) 1453 return false; 1454 1455 if (!nested_svm_vmrun_msrpm(svm)) { 1456 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR; 1457 vcpu->run->internal.suberror = 1458 KVM_INTERNAL_ERROR_EMULATION; 1459 vcpu->run->internal.ndata = 0; 1460 return false; 1461 } 1462 1463 return true; 1464 } 1465 1466 struct kvm_x86_nested_ops svm_nested_ops = { 1467 .check_events = svm_check_nested_events, 1468 .triple_fault = nested_svm_triple_fault, 1469 .get_nested_state_pages = svm_get_nested_state_pages, 1470 .get_state = svm_get_nested_state, 1471 .set_state = svm_set_nested_state, 1472 }; 1473