xref: /openbmc/linux/arch/x86/kvm/svm/nested.c (revision 234489ac)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Kernel-based Virtual Machine driver for Linux
4  *
5  * AMD SVM support
6  *
7  * Copyright (C) 2006 Qumranet, Inc.
8  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
9  *
10  * Authors:
11  *   Yaniv Kamay  <yaniv@qumranet.com>
12  *   Avi Kivity   <avi@qumranet.com>
13  */
14 
15 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
16 
17 #include <linux/kvm_types.h>
18 #include <linux/kvm_host.h>
19 #include <linux/kernel.h>
20 
21 #include <asm/msr-index.h>
22 #include <asm/debugreg.h>
23 
24 #include "kvm_emulate.h"
25 #include "trace.h"
26 #include "mmu.h"
27 #include "x86.h"
28 #include "smm.h"
29 #include "cpuid.h"
30 #include "lapic.h"
31 #include "svm.h"
32 #include "hyperv.h"
33 
34 #define CC KVM_NESTED_VMENTER_CONSISTENCY_CHECK
35 
36 static void nested_svm_inject_npf_exit(struct kvm_vcpu *vcpu,
37 				       struct x86_exception *fault)
38 {
39 	struct vcpu_svm *svm = to_svm(vcpu);
40 	struct vmcb *vmcb = svm->vmcb;
41 
42 	if (vmcb->control.exit_code != SVM_EXIT_NPF) {
43 		/*
44 		 * TODO: track the cause of the nested page fault, and
45 		 * correctly fill in the high bits of exit_info_1.
46 		 */
47 		vmcb->control.exit_code = SVM_EXIT_NPF;
48 		vmcb->control.exit_code_hi = 0;
49 		vmcb->control.exit_info_1 = (1ULL << 32);
50 		vmcb->control.exit_info_2 = fault->address;
51 	}
52 
53 	vmcb->control.exit_info_1 &= ~0xffffffffULL;
54 	vmcb->control.exit_info_1 |= fault->error_code;
55 
56 	nested_svm_vmexit(svm);
57 }
58 
59 static u64 nested_svm_get_tdp_pdptr(struct kvm_vcpu *vcpu, int index)
60 {
61 	struct vcpu_svm *svm = to_svm(vcpu);
62 	u64 cr3 = svm->nested.ctl.nested_cr3;
63 	u64 pdpte;
64 	int ret;
65 
66 	ret = kvm_vcpu_read_guest_page(vcpu, gpa_to_gfn(cr3), &pdpte,
67 				       offset_in_page(cr3) + index * 8, 8);
68 	if (ret)
69 		return 0;
70 	return pdpte;
71 }
72 
73 static unsigned long nested_svm_get_tdp_cr3(struct kvm_vcpu *vcpu)
74 {
75 	struct vcpu_svm *svm = to_svm(vcpu);
76 
77 	return svm->nested.ctl.nested_cr3;
78 }
79 
80 static void nested_svm_init_mmu_context(struct kvm_vcpu *vcpu)
81 {
82 	struct vcpu_svm *svm = to_svm(vcpu);
83 
84 	WARN_ON(mmu_is_nested(vcpu));
85 
86 	vcpu->arch.mmu = &vcpu->arch.guest_mmu;
87 
88 	/*
89 	 * The NPT format depends on L1's CR4 and EFER, which is in vmcb01.  Note,
90 	 * when called via KVM_SET_NESTED_STATE, that state may _not_ match current
91 	 * vCPU state.  CR0.WP is explicitly ignored, while CR0.PG is required.
92 	 */
93 	kvm_init_shadow_npt_mmu(vcpu, X86_CR0_PG, svm->vmcb01.ptr->save.cr4,
94 				svm->vmcb01.ptr->save.efer,
95 				svm->nested.ctl.nested_cr3);
96 	vcpu->arch.mmu->get_guest_pgd     = nested_svm_get_tdp_cr3;
97 	vcpu->arch.mmu->get_pdptr         = nested_svm_get_tdp_pdptr;
98 	vcpu->arch.mmu->inject_page_fault = nested_svm_inject_npf_exit;
99 	vcpu->arch.walk_mmu              = &vcpu->arch.nested_mmu;
100 }
101 
102 static void nested_svm_uninit_mmu_context(struct kvm_vcpu *vcpu)
103 {
104 	vcpu->arch.mmu = &vcpu->arch.root_mmu;
105 	vcpu->arch.walk_mmu = &vcpu->arch.root_mmu;
106 }
107 
108 static bool nested_vmcb_needs_vls_intercept(struct vcpu_svm *svm)
109 {
110 	if (!svm->v_vmload_vmsave_enabled)
111 		return true;
112 
113 	if (!nested_npt_enabled(svm))
114 		return true;
115 
116 	if (!(svm->nested.ctl.virt_ext & VIRTUAL_VMLOAD_VMSAVE_ENABLE_MASK))
117 		return true;
118 
119 	return false;
120 }
121 
122 void recalc_intercepts(struct vcpu_svm *svm)
123 {
124 	struct vmcb_control_area *c, *h;
125 	struct vmcb_ctrl_area_cached *g;
126 	unsigned int i;
127 
128 	vmcb_mark_dirty(svm->vmcb, VMCB_INTERCEPTS);
129 
130 	if (!is_guest_mode(&svm->vcpu))
131 		return;
132 
133 	c = &svm->vmcb->control;
134 	h = &svm->vmcb01.ptr->control;
135 	g = &svm->nested.ctl;
136 
137 	for (i = 0; i < MAX_INTERCEPT; i++)
138 		c->intercepts[i] = h->intercepts[i];
139 
140 	if (g->int_ctl & V_INTR_MASKING_MASK) {
141 		/*
142 		 * If L2 is active and V_INTR_MASKING is enabled in vmcb12,
143 		 * disable intercept of CR8 writes as L2's CR8 does not affect
144 		 * any interrupt KVM may want to inject.
145 		 *
146 		 * Similarly, disable intercept of virtual interrupts (used to
147 		 * detect interrupt windows) if the saved RFLAGS.IF is '0', as
148 		 * the effective RFLAGS.IF for L1 interrupts will never be set
149 		 * while L2 is running (L2's RFLAGS.IF doesn't affect L1 IRQs).
150 		 */
151 		vmcb_clr_intercept(c, INTERCEPT_CR8_WRITE);
152 		if (!(svm->vmcb01.ptr->save.rflags & X86_EFLAGS_IF))
153 			vmcb_clr_intercept(c, INTERCEPT_VINTR);
154 	}
155 
156 	/*
157 	 * We want to see VMMCALLs from a nested guest only when Hyper-V L2 TLB
158 	 * flush feature is enabled.
159 	 */
160 	if (!nested_svm_l2_tlb_flush_enabled(&svm->vcpu))
161 		vmcb_clr_intercept(c, INTERCEPT_VMMCALL);
162 
163 	for (i = 0; i < MAX_INTERCEPT; i++)
164 		c->intercepts[i] |= g->intercepts[i];
165 
166 	/* If SMI is not intercepted, ignore guest SMI intercept as well  */
167 	if (!intercept_smi)
168 		vmcb_clr_intercept(c, INTERCEPT_SMI);
169 
170 	if (nested_vmcb_needs_vls_intercept(svm)) {
171 		/*
172 		 * If the virtual VMLOAD/VMSAVE is not enabled for the L2,
173 		 * we must intercept these instructions to correctly
174 		 * emulate them in case L1 doesn't intercept them.
175 		 */
176 		vmcb_set_intercept(c, INTERCEPT_VMLOAD);
177 		vmcb_set_intercept(c, INTERCEPT_VMSAVE);
178 	} else {
179 		WARN_ON(!(c->virt_ext & VIRTUAL_VMLOAD_VMSAVE_ENABLE_MASK));
180 	}
181 }
182 
183 /*
184  * Merge L0's (KVM) and L1's (Nested VMCB) MSR permission bitmaps. The function
185  * is optimized in that it only merges the parts where KVM MSR permission bitmap
186  * may contain zero bits.
187  */
188 static bool nested_svm_vmrun_msrpm(struct vcpu_svm *svm)
189 {
190 	struct hv_vmcb_enlightenments *hve = &svm->nested.ctl.hv_enlightenments;
191 	int i;
192 
193 	/*
194 	 * MSR bitmap update can be skipped when:
195 	 * - MSR bitmap for L1 hasn't changed.
196 	 * - Nested hypervisor (L1) is attempting to launch the same L2 as
197 	 *   before.
198 	 * - Nested hypervisor (L1) is using Hyper-V emulation interface and
199 	 * tells KVM (L0) there were no changes in MSR bitmap for L2.
200 	 */
201 	if (!svm->nested.force_msr_bitmap_recalc &&
202 	    kvm_hv_hypercall_enabled(&svm->vcpu) &&
203 	    hve->hv_enlightenments_control.msr_bitmap &&
204 	    (svm->nested.ctl.clean & BIT(HV_VMCB_NESTED_ENLIGHTENMENTS)))
205 		goto set_msrpm_base_pa;
206 
207 	if (!(vmcb12_is_intercept(&svm->nested.ctl, INTERCEPT_MSR_PROT)))
208 		return true;
209 
210 	for (i = 0; i < MSRPM_OFFSETS; i++) {
211 		u32 value, p;
212 		u64 offset;
213 
214 		if (msrpm_offsets[i] == 0xffffffff)
215 			break;
216 
217 		p      = msrpm_offsets[i];
218 
219 		/* x2apic msrs are intercepted always for the nested guest */
220 		if (is_x2apic_msrpm_offset(p))
221 			continue;
222 
223 		offset = svm->nested.ctl.msrpm_base_pa + (p * 4);
224 
225 		if (kvm_vcpu_read_guest(&svm->vcpu, offset, &value, 4))
226 			return false;
227 
228 		svm->nested.msrpm[p] = svm->msrpm[p] | value;
229 	}
230 
231 	svm->nested.force_msr_bitmap_recalc = false;
232 
233 set_msrpm_base_pa:
234 	svm->vmcb->control.msrpm_base_pa = __sme_set(__pa(svm->nested.msrpm));
235 
236 	return true;
237 }
238 
239 /*
240  * Bits 11:0 of bitmap address are ignored by hardware
241  */
242 static bool nested_svm_check_bitmap_pa(struct kvm_vcpu *vcpu, u64 pa, u32 size)
243 {
244 	u64 addr = PAGE_ALIGN(pa);
245 
246 	return kvm_vcpu_is_legal_gpa(vcpu, addr) &&
247 	    kvm_vcpu_is_legal_gpa(vcpu, addr + size - 1);
248 }
249 
250 static bool nested_svm_check_tlb_ctl(struct kvm_vcpu *vcpu, u8 tlb_ctl)
251 {
252 	/* Nested FLUSHBYASID is not supported yet.  */
253 	switch(tlb_ctl) {
254 		case TLB_CONTROL_DO_NOTHING:
255 		case TLB_CONTROL_FLUSH_ALL_ASID:
256 			return true;
257 		default:
258 			return false;
259 	}
260 }
261 
262 static bool __nested_vmcb_check_controls(struct kvm_vcpu *vcpu,
263 					 struct vmcb_ctrl_area_cached *control)
264 {
265 	if (CC(!vmcb12_is_intercept(control, INTERCEPT_VMRUN)))
266 		return false;
267 
268 	if (CC(control->asid == 0))
269 		return false;
270 
271 	if (CC((control->nested_ctl & SVM_NESTED_CTL_NP_ENABLE) && !npt_enabled))
272 		return false;
273 
274 	if (CC(!nested_svm_check_bitmap_pa(vcpu, control->msrpm_base_pa,
275 					   MSRPM_SIZE)))
276 		return false;
277 	if (CC(!nested_svm_check_bitmap_pa(vcpu, control->iopm_base_pa,
278 					   IOPM_SIZE)))
279 		return false;
280 
281 	if (CC(!nested_svm_check_tlb_ctl(vcpu, control->tlb_ctl)))
282 		return false;
283 
284 	if (CC((control->int_ctl & V_NMI_ENABLE_MASK) &&
285 	       !vmcb12_is_intercept(control, INTERCEPT_NMI))) {
286 		return false;
287 	}
288 
289 	return true;
290 }
291 
292 /* Common checks that apply to both L1 and L2 state.  */
293 static bool __nested_vmcb_check_save(struct kvm_vcpu *vcpu,
294 				     struct vmcb_save_area_cached *save)
295 {
296 	if (CC(!(save->efer & EFER_SVME)))
297 		return false;
298 
299 	if (CC((save->cr0 & X86_CR0_CD) == 0 && (save->cr0 & X86_CR0_NW)) ||
300 	    CC(save->cr0 & ~0xffffffffULL))
301 		return false;
302 
303 	if (CC(!kvm_dr6_valid(save->dr6)) || CC(!kvm_dr7_valid(save->dr7)))
304 		return false;
305 
306 	/*
307 	 * These checks are also performed by KVM_SET_SREGS,
308 	 * except that EFER.LMA is not checked by SVM against
309 	 * CR0.PG && EFER.LME.
310 	 */
311 	if ((save->efer & EFER_LME) && (save->cr0 & X86_CR0_PG)) {
312 		if (CC(!(save->cr4 & X86_CR4_PAE)) ||
313 		    CC(!(save->cr0 & X86_CR0_PE)) ||
314 		    CC(kvm_vcpu_is_illegal_gpa(vcpu, save->cr3)))
315 			return false;
316 	}
317 
318 	/* Note, SVM doesn't have any additional restrictions on CR4. */
319 	if (CC(!__kvm_is_valid_cr4(vcpu, save->cr4)))
320 		return false;
321 
322 	if (CC(!kvm_valid_efer(vcpu, save->efer)))
323 		return false;
324 
325 	return true;
326 }
327 
328 static bool nested_vmcb_check_save(struct kvm_vcpu *vcpu)
329 {
330 	struct vcpu_svm *svm = to_svm(vcpu);
331 	struct vmcb_save_area_cached *save = &svm->nested.save;
332 
333 	return __nested_vmcb_check_save(vcpu, save);
334 }
335 
336 static bool nested_vmcb_check_controls(struct kvm_vcpu *vcpu)
337 {
338 	struct vcpu_svm *svm = to_svm(vcpu);
339 	struct vmcb_ctrl_area_cached *ctl = &svm->nested.ctl;
340 
341 	return __nested_vmcb_check_controls(vcpu, ctl);
342 }
343 
344 static
345 void __nested_copy_vmcb_control_to_cache(struct kvm_vcpu *vcpu,
346 					 struct vmcb_ctrl_area_cached *to,
347 					 struct vmcb_control_area *from)
348 {
349 	unsigned int i;
350 
351 	for (i = 0; i < MAX_INTERCEPT; i++)
352 		to->intercepts[i] = from->intercepts[i];
353 
354 	to->iopm_base_pa        = from->iopm_base_pa;
355 	to->msrpm_base_pa       = from->msrpm_base_pa;
356 	to->tsc_offset          = from->tsc_offset;
357 	to->tlb_ctl             = from->tlb_ctl;
358 	to->int_ctl             = from->int_ctl;
359 	to->int_vector          = from->int_vector;
360 	to->int_state           = from->int_state;
361 	to->exit_code           = from->exit_code;
362 	to->exit_code_hi        = from->exit_code_hi;
363 	to->exit_info_1         = from->exit_info_1;
364 	to->exit_info_2         = from->exit_info_2;
365 	to->exit_int_info       = from->exit_int_info;
366 	to->exit_int_info_err   = from->exit_int_info_err;
367 	to->nested_ctl          = from->nested_ctl;
368 	to->event_inj           = from->event_inj;
369 	to->event_inj_err       = from->event_inj_err;
370 	to->next_rip            = from->next_rip;
371 	to->nested_cr3          = from->nested_cr3;
372 	to->virt_ext            = from->virt_ext;
373 	to->pause_filter_count  = from->pause_filter_count;
374 	to->pause_filter_thresh = from->pause_filter_thresh;
375 
376 	/* Copy asid here because nested_vmcb_check_controls will check it.  */
377 	to->asid           = from->asid;
378 	to->msrpm_base_pa &= ~0x0fffULL;
379 	to->iopm_base_pa  &= ~0x0fffULL;
380 
381 	/* Hyper-V extensions (Enlightened VMCB) */
382 	if (kvm_hv_hypercall_enabled(vcpu)) {
383 		to->clean = from->clean;
384 		memcpy(&to->hv_enlightenments, &from->hv_enlightenments,
385 		       sizeof(to->hv_enlightenments));
386 	}
387 }
388 
389 void nested_copy_vmcb_control_to_cache(struct vcpu_svm *svm,
390 				       struct vmcb_control_area *control)
391 {
392 	__nested_copy_vmcb_control_to_cache(&svm->vcpu, &svm->nested.ctl, control);
393 }
394 
395 static void __nested_copy_vmcb_save_to_cache(struct vmcb_save_area_cached *to,
396 					     struct vmcb_save_area *from)
397 {
398 	/*
399 	 * Copy only fields that are validated, as we need them
400 	 * to avoid TOC/TOU races.
401 	 */
402 	to->efer = from->efer;
403 	to->cr0 = from->cr0;
404 	to->cr3 = from->cr3;
405 	to->cr4 = from->cr4;
406 
407 	to->dr6 = from->dr6;
408 	to->dr7 = from->dr7;
409 }
410 
411 void nested_copy_vmcb_save_to_cache(struct vcpu_svm *svm,
412 				    struct vmcb_save_area *save)
413 {
414 	__nested_copy_vmcb_save_to_cache(&svm->nested.save, save);
415 }
416 
417 /*
418  * Synchronize fields that are written by the processor, so that
419  * they can be copied back into the vmcb12.
420  */
421 void nested_sync_control_from_vmcb02(struct vcpu_svm *svm)
422 {
423 	u32 mask;
424 	svm->nested.ctl.event_inj      = svm->vmcb->control.event_inj;
425 	svm->nested.ctl.event_inj_err  = svm->vmcb->control.event_inj_err;
426 
427 	/* Only a few fields of int_ctl are written by the processor.  */
428 	mask = V_IRQ_MASK | V_TPR_MASK;
429 	/*
430 	 * Don't sync vmcb02 V_IRQ back to vmcb12 if KVM (L0) is intercepting
431 	 * virtual interrupts in order to request an interrupt window, as KVM
432 	 * has usurped vmcb02's int_ctl.  If an interrupt window opens before
433 	 * the next VM-Exit, svm_clear_vintr() will restore vmcb12's int_ctl.
434 	 * If no window opens, V_IRQ will be correctly preserved in vmcb12's
435 	 * int_ctl (because it was never recognized while L2 was running).
436 	 */
437 	if (svm_is_intercept(svm, INTERCEPT_VINTR) &&
438 	    !test_bit(INTERCEPT_VINTR, (unsigned long *)svm->nested.ctl.intercepts))
439 		mask &= ~V_IRQ_MASK;
440 
441 	if (nested_vgif_enabled(svm))
442 		mask |= V_GIF_MASK;
443 
444 	if (nested_vnmi_enabled(svm))
445 		mask |= V_NMI_BLOCKING_MASK | V_NMI_PENDING_MASK;
446 
447 	svm->nested.ctl.int_ctl        &= ~mask;
448 	svm->nested.ctl.int_ctl        |= svm->vmcb->control.int_ctl & mask;
449 }
450 
451 /*
452  * Transfer any event that L0 or L1 wanted to inject into L2 to
453  * EXIT_INT_INFO.
454  */
455 static void nested_save_pending_event_to_vmcb12(struct vcpu_svm *svm,
456 						struct vmcb *vmcb12)
457 {
458 	struct kvm_vcpu *vcpu = &svm->vcpu;
459 	u32 exit_int_info = 0;
460 	unsigned int nr;
461 
462 	if (vcpu->arch.exception.injected) {
463 		nr = vcpu->arch.exception.vector;
464 		exit_int_info = nr | SVM_EVTINJ_VALID | SVM_EVTINJ_TYPE_EXEPT;
465 
466 		if (vcpu->arch.exception.has_error_code) {
467 			exit_int_info |= SVM_EVTINJ_VALID_ERR;
468 			vmcb12->control.exit_int_info_err =
469 				vcpu->arch.exception.error_code;
470 		}
471 
472 	} else if (vcpu->arch.nmi_injected) {
473 		exit_int_info = SVM_EVTINJ_VALID | SVM_EVTINJ_TYPE_NMI;
474 
475 	} else if (vcpu->arch.interrupt.injected) {
476 		nr = vcpu->arch.interrupt.nr;
477 		exit_int_info = nr | SVM_EVTINJ_VALID;
478 
479 		if (vcpu->arch.interrupt.soft)
480 			exit_int_info |= SVM_EVTINJ_TYPE_SOFT;
481 		else
482 			exit_int_info |= SVM_EVTINJ_TYPE_INTR;
483 	}
484 
485 	vmcb12->control.exit_int_info = exit_int_info;
486 }
487 
488 static void nested_svm_transition_tlb_flush(struct kvm_vcpu *vcpu)
489 {
490 	/*
491 	 * KVM_REQ_HV_TLB_FLUSH flushes entries from either L1's VP_ID or
492 	 * L2's VP_ID upon request from the guest. Make sure we check for
493 	 * pending entries in the right FIFO upon L1/L2 transition as these
494 	 * requests are put by other vCPUs asynchronously.
495 	 */
496 	if (to_hv_vcpu(vcpu) && npt_enabled)
497 		kvm_make_request(KVM_REQ_HV_TLB_FLUSH, vcpu);
498 
499 	/*
500 	 * TODO: optimize unconditional TLB flush/MMU sync.  A partial list of
501 	 * things to fix before this can be conditional:
502 	 *
503 	 *  - Flush TLBs for both L1 and L2 remote TLB flush
504 	 *  - Honor L1's request to flush an ASID on nested VMRUN
505 	 *  - Sync nested NPT MMU on VMRUN that flushes L2's ASID[*]
506 	 *  - Don't crush a pending TLB flush in vmcb02 on nested VMRUN
507 	 *  - Flush L1's ASID on KVM_REQ_TLB_FLUSH_GUEST
508 	 *
509 	 * [*] Unlike nested EPT, SVM's ASID management can invalidate nested
510 	 *     NPT guest-physical mappings on VMRUN.
511 	 */
512 	kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
513 	kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
514 }
515 
516 /*
517  * Load guest's/host's cr3 on nested vmentry or vmexit. @nested_npt is true
518  * if we are emulating VM-Entry into a guest with NPT enabled.
519  */
520 static int nested_svm_load_cr3(struct kvm_vcpu *vcpu, unsigned long cr3,
521 			       bool nested_npt, bool reload_pdptrs)
522 {
523 	if (CC(kvm_vcpu_is_illegal_gpa(vcpu, cr3)))
524 		return -EINVAL;
525 
526 	if (reload_pdptrs && !nested_npt && is_pae_paging(vcpu) &&
527 	    CC(!load_pdptrs(vcpu, cr3)))
528 		return -EINVAL;
529 
530 	vcpu->arch.cr3 = cr3;
531 
532 	/* Re-initialize the MMU, e.g. to pick up CR4 MMU role changes. */
533 	kvm_init_mmu(vcpu);
534 
535 	if (!nested_npt)
536 		kvm_mmu_new_pgd(vcpu, cr3);
537 
538 	return 0;
539 }
540 
541 void nested_vmcb02_compute_g_pat(struct vcpu_svm *svm)
542 {
543 	if (!svm->nested.vmcb02.ptr)
544 		return;
545 
546 	/* FIXME: merge g_pat from vmcb01 and vmcb12.  */
547 	svm->nested.vmcb02.ptr->save.g_pat = svm->vmcb01.ptr->save.g_pat;
548 }
549 
550 static void nested_vmcb02_prepare_save(struct vcpu_svm *svm, struct vmcb *vmcb12)
551 {
552 	bool new_vmcb12 = false;
553 	struct vmcb *vmcb01 = svm->vmcb01.ptr;
554 	struct vmcb *vmcb02 = svm->nested.vmcb02.ptr;
555 
556 	nested_vmcb02_compute_g_pat(svm);
557 
558 	/* Load the nested guest state */
559 	if (svm->nested.vmcb12_gpa != svm->nested.last_vmcb12_gpa) {
560 		new_vmcb12 = true;
561 		svm->nested.last_vmcb12_gpa = svm->nested.vmcb12_gpa;
562 		svm->nested.force_msr_bitmap_recalc = true;
563 	}
564 
565 	if (unlikely(new_vmcb12 || vmcb_is_dirty(vmcb12, VMCB_SEG))) {
566 		vmcb02->save.es = vmcb12->save.es;
567 		vmcb02->save.cs = vmcb12->save.cs;
568 		vmcb02->save.ss = vmcb12->save.ss;
569 		vmcb02->save.ds = vmcb12->save.ds;
570 		vmcb02->save.cpl = vmcb12->save.cpl;
571 		vmcb_mark_dirty(vmcb02, VMCB_SEG);
572 	}
573 
574 	if (unlikely(new_vmcb12 || vmcb_is_dirty(vmcb12, VMCB_DT))) {
575 		vmcb02->save.gdtr = vmcb12->save.gdtr;
576 		vmcb02->save.idtr = vmcb12->save.idtr;
577 		vmcb_mark_dirty(vmcb02, VMCB_DT);
578 	}
579 
580 	kvm_set_rflags(&svm->vcpu, vmcb12->save.rflags | X86_EFLAGS_FIXED);
581 
582 	svm_set_efer(&svm->vcpu, svm->nested.save.efer);
583 
584 	svm_set_cr0(&svm->vcpu, svm->nested.save.cr0);
585 	svm_set_cr4(&svm->vcpu, svm->nested.save.cr4);
586 
587 	svm->vcpu.arch.cr2 = vmcb12->save.cr2;
588 
589 	kvm_rax_write(&svm->vcpu, vmcb12->save.rax);
590 	kvm_rsp_write(&svm->vcpu, vmcb12->save.rsp);
591 	kvm_rip_write(&svm->vcpu, vmcb12->save.rip);
592 
593 	/* In case we don't even reach vcpu_run, the fields are not updated */
594 	vmcb02->save.rax = vmcb12->save.rax;
595 	vmcb02->save.rsp = vmcb12->save.rsp;
596 	vmcb02->save.rip = vmcb12->save.rip;
597 
598 	/* These bits will be set properly on the first execution when new_vmc12 is true */
599 	if (unlikely(new_vmcb12 || vmcb_is_dirty(vmcb12, VMCB_DR))) {
600 		vmcb02->save.dr7 = svm->nested.save.dr7 | DR7_FIXED_1;
601 		svm->vcpu.arch.dr6  = svm->nested.save.dr6 | DR6_ACTIVE_LOW;
602 		vmcb_mark_dirty(vmcb02, VMCB_DR);
603 	}
604 
605 	if (unlikely(svm->lbrv_enabled && (svm->nested.ctl.virt_ext & LBR_CTL_ENABLE_MASK))) {
606 		/*
607 		 * Reserved bits of DEBUGCTL are ignored.  Be consistent with
608 		 * svm_set_msr's definition of reserved bits.
609 		 */
610 		svm_copy_lbrs(vmcb02, vmcb12);
611 		vmcb02->save.dbgctl &= ~DEBUGCTL_RESERVED_BITS;
612 		svm_update_lbrv(&svm->vcpu);
613 
614 	} else if (unlikely(vmcb01->control.virt_ext & LBR_CTL_ENABLE_MASK)) {
615 		svm_copy_lbrs(vmcb02, vmcb01);
616 	}
617 }
618 
619 static inline bool is_evtinj_soft(u32 evtinj)
620 {
621 	u32 type = evtinj & SVM_EVTINJ_TYPE_MASK;
622 	u8 vector = evtinj & SVM_EVTINJ_VEC_MASK;
623 
624 	if (!(evtinj & SVM_EVTINJ_VALID))
625 		return false;
626 
627 	if (type == SVM_EVTINJ_TYPE_SOFT)
628 		return true;
629 
630 	return type == SVM_EVTINJ_TYPE_EXEPT && kvm_exception_is_soft(vector);
631 }
632 
633 static bool is_evtinj_nmi(u32 evtinj)
634 {
635 	u32 type = evtinj & SVM_EVTINJ_TYPE_MASK;
636 
637 	if (!(evtinj & SVM_EVTINJ_VALID))
638 		return false;
639 
640 	return type == SVM_EVTINJ_TYPE_NMI;
641 }
642 
643 static void nested_vmcb02_prepare_control(struct vcpu_svm *svm,
644 					  unsigned long vmcb12_rip,
645 					  unsigned long vmcb12_csbase)
646 {
647 	u32 int_ctl_vmcb01_bits = V_INTR_MASKING_MASK;
648 	u32 int_ctl_vmcb12_bits = V_TPR_MASK | V_IRQ_INJECTION_BITS_MASK;
649 
650 	struct kvm_vcpu *vcpu = &svm->vcpu;
651 	struct vmcb *vmcb01 = svm->vmcb01.ptr;
652 	struct vmcb *vmcb02 = svm->nested.vmcb02.ptr;
653 	u32 pause_count12;
654 	u32 pause_thresh12;
655 
656 	/*
657 	 * Filled at exit: exit_code, exit_code_hi, exit_info_1, exit_info_2,
658 	 * exit_int_info, exit_int_info_err, next_rip, insn_len, insn_bytes.
659 	 */
660 
661 	if (svm->vgif_enabled && (svm->nested.ctl.int_ctl & V_GIF_ENABLE_MASK))
662 		int_ctl_vmcb12_bits |= (V_GIF_MASK | V_GIF_ENABLE_MASK);
663 	else
664 		int_ctl_vmcb01_bits |= (V_GIF_MASK | V_GIF_ENABLE_MASK);
665 
666 	if (vnmi) {
667 		if (vmcb01->control.int_ctl & V_NMI_PENDING_MASK) {
668 			svm->vcpu.arch.nmi_pending++;
669 			kvm_make_request(KVM_REQ_EVENT, &svm->vcpu);
670 		}
671 		if (nested_vnmi_enabled(svm))
672 			int_ctl_vmcb12_bits |= (V_NMI_PENDING_MASK |
673 						V_NMI_ENABLE_MASK |
674 						V_NMI_BLOCKING_MASK);
675 	}
676 
677 	/* Copied from vmcb01.  msrpm_base can be overwritten later.  */
678 	vmcb02->control.nested_ctl = vmcb01->control.nested_ctl;
679 	vmcb02->control.iopm_base_pa = vmcb01->control.iopm_base_pa;
680 	vmcb02->control.msrpm_base_pa = vmcb01->control.msrpm_base_pa;
681 
682 	/* Done at vmrun: asid.  */
683 
684 	/* Also overwritten later if necessary.  */
685 	vmcb02->control.tlb_ctl = TLB_CONTROL_DO_NOTHING;
686 
687 	/* nested_cr3.  */
688 	if (nested_npt_enabled(svm))
689 		nested_svm_init_mmu_context(vcpu);
690 
691 	vcpu->arch.tsc_offset = kvm_calc_nested_tsc_offset(
692 			vcpu->arch.l1_tsc_offset,
693 			svm->nested.ctl.tsc_offset,
694 			svm->tsc_ratio_msr);
695 
696 	vmcb02->control.tsc_offset = vcpu->arch.tsc_offset;
697 
698 	if (svm->tsc_ratio_msr != kvm_caps.default_tsc_scaling_ratio) {
699 		WARN_ON(!svm->tsc_scaling_enabled);
700 		nested_svm_update_tsc_ratio_msr(vcpu);
701 	}
702 
703 	vmcb02->control.int_ctl             =
704 		(svm->nested.ctl.int_ctl & int_ctl_vmcb12_bits) |
705 		(vmcb01->control.int_ctl & int_ctl_vmcb01_bits);
706 
707 	vmcb02->control.int_vector          = svm->nested.ctl.int_vector;
708 	vmcb02->control.int_state           = svm->nested.ctl.int_state;
709 	vmcb02->control.event_inj           = svm->nested.ctl.event_inj;
710 	vmcb02->control.event_inj_err       = svm->nested.ctl.event_inj_err;
711 
712 	/*
713 	 * next_rip is consumed on VMRUN as the return address pushed on the
714 	 * stack for injected soft exceptions/interrupts.  If nrips is exposed
715 	 * to L1, take it verbatim from vmcb12.  If nrips is supported in
716 	 * hardware but not exposed to L1, stuff the actual L2 RIP to emulate
717 	 * what a nrips=0 CPU would do (L1 is responsible for advancing RIP
718 	 * prior to injecting the event).
719 	 */
720 	if (svm->nrips_enabled)
721 		vmcb02->control.next_rip    = svm->nested.ctl.next_rip;
722 	else if (boot_cpu_has(X86_FEATURE_NRIPS))
723 		vmcb02->control.next_rip    = vmcb12_rip;
724 
725 	svm->nmi_l1_to_l2 = is_evtinj_nmi(vmcb02->control.event_inj);
726 	if (is_evtinj_soft(vmcb02->control.event_inj)) {
727 		svm->soft_int_injected = true;
728 		svm->soft_int_csbase = vmcb12_csbase;
729 		svm->soft_int_old_rip = vmcb12_rip;
730 		if (svm->nrips_enabled)
731 			svm->soft_int_next_rip = svm->nested.ctl.next_rip;
732 		else
733 			svm->soft_int_next_rip = vmcb12_rip;
734 	}
735 
736 	vmcb02->control.virt_ext            = vmcb01->control.virt_ext &
737 					      LBR_CTL_ENABLE_MASK;
738 	if (svm->lbrv_enabled)
739 		vmcb02->control.virt_ext  |=
740 			(svm->nested.ctl.virt_ext & LBR_CTL_ENABLE_MASK);
741 
742 	if (!nested_vmcb_needs_vls_intercept(svm))
743 		vmcb02->control.virt_ext |= VIRTUAL_VMLOAD_VMSAVE_ENABLE_MASK;
744 
745 	pause_count12 = svm->pause_filter_enabled ? svm->nested.ctl.pause_filter_count : 0;
746 	pause_thresh12 = svm->pause_threshold_enabled ? svm->nested.ctl.pause_filter_thresh : 0;
747 	if (kvm_pause_in_guest(svm->vcpu.kvm)) {
748 		/* use guest values since host doesn't intercept PAUSE */
749 		vmcb02->control.pause_filter_count = pause_count12;
750 		vmcb02->control.pause_filter_thresh = pause_thresh12;
751 
752 	} else {
753 		/* start from host values otherwise */
754 		vmcb02->control.pause_filter_count = vmcb01->control.pause_filter_count;
755 		vmcb02->control.pause_filter_thresh = vmcb01->control.pause_filter_thresh;
756 
757 		/* ... but ensure filtering is disabled if so requested.  */
758 		if (vmcb12_is_intercept(&svm->nested.ctl, INTERCEPT_PAUSE)) {
759 			if (!pause_count12)
760 				vmcb02->control.pause_filter_count = 0;
761 			if (!pause_thresh12)
762 				vmcb02->control.pause_filter_thresh = 0;
763 		}
764 	}
765 
766 	nested_svm_transition_tlb_flush(vcpu);
767 
768 	/* Enter Guest-Mode */
769 	enter_guest_mode(vcpu);
770 
771 	/*
772 	 * Merge guest and host intercepts - must be called with vcpu in
773 	 * guest-mode to take effect.
774 	 */
775 	recalc_intercepts(svm);
776 }
777 
778 static void nested_svm_copy_common_state(struct vmcb *from_vmcb, struct vmcb *to_vmcb)
779 {
780 	/*
781 	 * Some VMCB state is shared between L1 and L2 and thus has to be
782 	 * moved at the time of nested vmrun and vmexit.
783 	 *
784 	 * VMLOAD/VMSAVE state would also belong in this category, but KVM
785 	 * always performs VMLOAD and VMSAVE from the VMCB01.
786 	 */
787 	to_vmcb->save.spec_ctrl = from_vmcb->save.spec_ctrl;
788 }
789 
790 int enter_svm_guest_mode(struct kvm_vcpu *vcpu, u64 vmcb12_gpa,
791 			 struct vmcb *vmcb12, bool from_vmrun)
792 {
793 	struct vcpu_svm *svm = to_svm(vcpu);
794 	int ret;
795 
796 	trace_kvm_nested_vmenter(svm->vmcb->save.rip,
797 				 vmcb12_gpa,
798 				 vmcb12->save.rip,
799 				 vmcb12->control.int_ctl,
800 				 vmcb12->control.event_inj,
801 				 vmcb12->control.nested_ctl,
802 				 vmcb12->control.nested_cr3,
803 				 vmcb12->save.cr3,
804 				 KVM_ISA_SVM);
805 
806 	trace_kvm_nested_intercepts(vmcb12->control.intercepts[INTERCEPT_CR] & 0xffff,
807 				    vmcb12->control.intercepts[INTERCEPT_CR] >> 16,
808 				    vmcb12->control.intercepts[INTERCEPT_EXCEPTION],
809 				    vmcb12->control.intercepts[INTERCEPT_WORD3],
810 				    vmcb12->control.intercepts[INTERCEPT_WORD4],
811 				    vmcb12->control.intercepts[INTERCEPT_WORD5]);
812 
813 
814 	svm->nested.vmcb12_gpa = vmcb12_gpa;
815 
816 	WARN_ON(svm->vmcb == svm->nested.vmcb02.ptr);
817 
818 	nested_svm_copy_common_state(svm->vmcb01.ptr, svm->nested.vmcb02.ptr);
819 
820 	svm_switch_vmcb(svm, &svm->nested.vmcb02);
821 	nested_vmcb02_prepare_control(svm, vmcb12->save.rip, vmcb12->save.cs.base);
822 	nested_vmcb02_prepare_save(svm, vmcb12);
823 
824 	ret = nested_svm_load_cr3(&svm->vcpu, svm->nested.save.cr3,
825 				  nested_npt_enabled(svm), from_vmrun);
826 	if (ret)
827 		return ret;
828 
829 	if (!from_vmrun)
830 		kvm_make_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu);
831 
832 	svm_set_gif(svm, true);
833 
834 	if (kvm_vcpu_apicv_active(vcpu))
835 		kvm_make_request(KVM_REQ_APICV_UPDATE, vcpu);
836 
837 	nested_svm_hv_update_vm_vp_ids(vcpu);
838 
839 	return 0;
840 }
841 
842 int nested_svm_vmrun(struct kvm_vcpu *vcpu)
843 {
844 	struct vcpu_svm *svm = to_svm(vcpu);
845 	int ret;
846 	struct vmcb *vmcb12;
847 	struct kvm_host_map map;
848 	u64 vmcb12_gpa;
849 	struct vmcb *vmcb01 = svm->vmcb01.ptr;
850 
851 	if (!svm->nested.hsave_msr) {
852 		kvm_inject_gp(vcpu, 0);
853 		return 1;
854 	}
855 
856 	if (is_smm(vcpu)) {
857 		kvm_queue_exception(vcpu, UD_VECTOR);
858 		return 1;
859 	}
860 
861 	/* This fails when VP assist page is enabled but the supplied GPA is bogus */
862 	ret = kvm_hv_verify_vp_assist(vcpu);
863 	if (ret) {
864 		kvm_inject_gp(vcpu, 0);
865 		return ret;
866 	}
867 
868 	vmcb12_gpa = svm->vmcb->save.rax;
869 	ret = kvm_vcpu_map(vcpu, gpa_to_gfn(vmcb12_gpa), &map);
870 	if (ret == -EINVAL) {
871 		kvm_inject_gp(vcpu, 0);
872 		return 1;
873 	} else if (ret) {
874 		return kvm_skip_emulated_instruction(vcpu);
875 	}
876 
877 	ret = kvm_skip_emulated_instruction(vcpu);
878 
879 	vmcb12 = map.hva;
880 
881 	if (WARN_ON_ONCE(!svm->nested.initialized))
882 		return -EINVAL;
883 
884 	nested_copy_vmcb_control_to_cache(svm, &vmcb12->control);
885 	nested_copy_vmcb_save_to_cache(svm, &vmcb12->save);
886 
887 	if (!nested_vmcb_check_save(vcpu) ||
888 	    !nested_vmcb_check_controls(vcpu)) {
889 		vmcb12->control.exit_code    = SVM_EXIT_ERR;
890 		vmcb12->control.exit_code_hi = 0;
891 		vmcb12->control.exit_info_1  = 0;
892 		vmcb12->control.exit_info_2  = 0;
893 		goto out;
894 	}
895 
896 	/*
897 	 * Since vmcb01 is not in use, we can use it to store some of the L1
898 	 * state.
899 	 */
900 	vmcb01->save.efer   = vcpu->arch.efer;
901 	vmcb01->save.cr0    = kvm_read_cr0(vcpu);
902 	vmcb01->save.cr4    = vcpu->arch.cr4;
903 	vmcb01->save.rflags = kvm_get_rflags(vcpu);
904 	vmcb01->save.rip    = kvm_rip_read(vcpu);
905 
906 	if (!npt_enabled)
907 		vmcb01->save.cr3 = kvm_read_cr3(vcpu);
908 
909 	svm->nested.nested_run_pending = 1;
910 
911 	if (enter_svm_guest_mode(vcpu, vmcb12_gpa, vmcb12, true))
912 		goto out_exit_err;
913 
914 	if (nested_svm_vmrun_msrpm(svm))
915 		goto out;
916 
917 out_exit_err:
918 	svm->nested.nested_run_pending = 0;
919 	svm->nmi_l1_to_l2 = false;
920 	svm->soft_int_injected = false;
921 
922 	svm->vmcb->control.exit_code    = SVM_EXIT_ERR;
923 	svm->vmcb->control.exit_code_hi = 0;
924 	svm->vmcb->control.exit_info_1  = 0;
925 	svm->vmcb->control.exit_info_2  = 0;
926 
927 	nested_svm_vmexit(svm);
928 
929 out:
930 	kvm_vcpu_unmap(vcpu, &map, true);
931 
932 	return ret;
933 }
934 
935 /* Copy state save area fields which are handled by VMRUN */
936 void svm_copy_vmrun_state(struct vmcb_save_area *to_save,
937 			  struct vmcb_save_area *from_save)
938 {
939 	to_save->es = from_save->es;
940 	to_save->cs = from_save->cs;
941 	to_save->ss = from_save->ss;
942 	to_save->ds = from_save->ds;
943 	to_save->gdtr = from_save->gdtr;
944 	to_save->idtr = from_save->idtr;
945 	to_save->rflags = from_save->rflags | X86_EFLAGS_FIXED;
946 	to_save->efer = from_save->efer;
947 	to_save->cr0 = from_save->cr0;
948 	to_save->cr3 = from_save->cr3;
949 	to_save->cr4 = from_save->cr4;
950 	to_save->rax = from_save->rax;
951 	to_save->rsp = from_save->rsp;
952 	to_save->rip = from_save->rip;
953 	to_save->cpl = 0;
954 }
955 
956 void svm_copy_vmloadsave_state(struct vmcb *to_vmcb, struct vmcb *from_vmcb)
957 {
958 	to_vmcb->save.fs = from_vmcb->save.fs;
959 	to_vmcb->save.gs = from_vmcb->save.gs;
960 	to_vmcb->save.tr = from_vmcb->save.tr;
961 	to_vmcb->save.ldtr = from_vmcb->save.ldtr;
962 	to_vmcb->save.kernel_gs_base = from_vmcb->save.kernel_gs_base;
963 	to_vmcb->save.star = from_vmcb->save.star;
964 	to_vmcb->save.lstar = from_vmcb->save.lstar;
965 	to_vmcb->save.cstar = from_vmcb->save.cstar;
966 	to_vmcb->save.sfmask = from_vmcb->save.sfmask;
967 	to_vmcb->save.sysenter_cs = from_vmcb->save.sysenter_cs;
968 	to_vmcb->save.sysenter_esp = from_vmcb->save.sysenter_esp;
969 	to_vmcb->save.sysenter_eip = from_vmcb->save.sysenter_eip;
970 }
971 
972 int nested_svm_vmexit(struct vcpu_svm *svm)
973 {
974 	struct kvm_vcpu *vcpu = &svm->vcpu;
975 	struct vmcb *vmcb01 = svm->vmcb01.ptr;
976 	struct vmcb *vmcb02 = svm->nested.vmcb02.ptr;
977 	struct vmcb *vmcb12;
978 	struct kvm_host_map map;
979 	int rc;
980 
981 	rc = kvm_vcpu_map(vcpu, gpa_to_gfn(svm->nested.vmcb12_gpa), &map);
982 	if (rc) {
983 		if (rc == -EINVAL)
984 			kvm_inject_gp(vcpu, 0);
985 		return 1;
986 	}
987 
988 	vmcb12 = map.hva;
989 
990 	/* Exit Guest-Mode */
991 	leave_guest_mode(vcpu);
992 	svm->nested.vmcb12_gpa = 0;
993 	WARN_ON_ONCE(svm->nested.nested_run_pending);
994 
995 	kvm_clear_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu);
996 
997 	/* in case we halted in L2 */
998 	svm->vcpu.arch.mp_state = KVM_MP_STATE_RUNNABLE;
999 
1000 	/* Give the current vmcb to the guest */
1001 
1002 	vmcb12->save.es     = vmcb02->save.es;
1003 	vmcb12->save.cs     = vmcb02->save.cs;
1004 	vmcb12->save.ss     = vmcb02->save.ss;
1005 	vmcb12->save.ds     = vmcb02->save.ds;
1006 	vmcb12->save.gdtr   = vmcb02->save.gdtr;
1007 	vmcb12->save.idtr   = vmcb02->save.idtr;
1008 	vmcb12->save.efer   = svm->vcpu.arch.efer;
1009 	vmcb12->save.cr0    = kvm_read_cr0(vcpu);
1010 	vmcb12->save.cr3    = kvm_read_cr3(vcpu);
1011 	vmcb12->save.cr2    = vmcb02->save.cr2;
1012 	vmcb12->save.cr4    = svm->vcpu.arch.cr4;
1013 	vmcb12->save.rflags = kvm_get_rflags(vcpu);
1014 	vmcb12->save.rip    = kvm_rip_read(vcpu);
1015 	vmcb12->save.rsp    = kvm_rsp_read(vcpu);
1016 	vmcb12->save.rax    = kvm_rax_read(vcpu);
1017 	vmcb12->save.dr7    = vmcb02->save.dr7;
1018 	vmcb12->save.dr6    = svm->vcpu.arch.dr6;
1019 	vmcb12->save.cpl    = vmcb02->save.cpl;
1020 
1021 	vmcb12->control.int_state         = vmcb02->control.int_state;
1022 	vmcb12->control.exit_code         = vmcb02->control.exit_code;
1023 	vmcb12->control.exit_code_hi      = vmcb02->control.exit_code_hi;
1024 	vmcb12->control.exit_info_1       = vmcb02->control.exit_info_1;
1025 	vmcb12->control.exit_info_2       = vmcb02->control.exit_info_2;
1026 
1027 	if (vmcb12->control.exit_code != SVM_EXIT_ERR)
1028 		nested_save_pending_event_to_vmcb12(svm, vmcb12);
1029 
1030 	if (svm->nrips_enabled)
1031 		vmcb12->control.next_rip  = vmcb02->control.next_rip;
1032 
1033 	vmcb12->control.int_ctl           = svm->nested.ctl.int_ctl;
1034 	vmcb12->control.event_inj         = svm->nested.ctl.event_inj;
1035 	vmcb12->control.event_inj_err     = svm->nested.ctl.event_inj_err;
1036 
1037 	if (!kvm_pause_in_guest(vcpu->kvm)) {
1038 		vmcb01->control.pause_filter_count = vmcb02->control.pause_filter_count;
1039 		vmcb_mark_dirty(vmcb01, VMCB_INTERCEPTS);
1040 
1041 	}
1042 
1043 	nested_svm_copy_common_state(svm->nested.vmcb02.ptr, svm->vmcb01.ptr);
1044 
1045 	svm_switch_vmcb(svm, &svm->vmcb01);
1046 
1047 	/*
1048 	 * Rules for synchronizing int_ctl bits from vmcb02 to vmcb01:
1049 	 *
1050 	 * V_IRQ, V_IRQ_VECTOR, V_INTR_PRIO_MASK, V_IGN_TPR:  If L1 doesn't
1051 	 * intercept interrupts, then KVM will use vmcb02's V_IRQ (and related
1052 	 * flags) to detect interrupt windows for L1 IRQs (even if L1 uses
1053 	 * virtual interrupt masking).  Raise KVM_REQ_EVENT to ensure that
1054 	 * KVM re-requests an interrupt window if necessary, which implicitly
1055 	 * copies this bits from vmcb02 to vmcb01.
1056 	 *
1057 	 * V_TPR: If L1 doesn't use virtual interrupt masking, then L1's vTPR
1058 	 * is stored in vmcb02, but its value doesn't need to be copied from/to
1059 	 * vmcb01 because it is copied from/to the virtual APIC's TPR register
1060 	 * on each VM entry/exit.
1061 	 *
1062 	 * V_GIF: If nested vGIF is not used, KVM uses vmcb02's V_GIF for L1's
1063 	 * V_GIF.  However, GIF is architecturally clear on each VM exit, thus
1064 	 * there is no need to copy V_GIF from vmcb02 to vmcb01.
1065 	 */
1066 	if (!nested_exit_on_intr(svm))
1067 		kvm_make_request(KVM_REQ_EVENT, &svm->vcpu);
1068 
1069 	if (unlikely(svm->lbrv_enabled && (svm->nested.ctl.virt_ext & LBR_CTL_ENABLE_MASK))) {
1070 		svm_copy_lbrs(vmcb12, vmcb02);
1071 		svm_update_lbrv(vcpu);
1072 	} else if (unlikely(vmcb01->control.virt_ext & LBR_CTL_ENABLE_MASK)) {
1073 		svm_copy_lbrs(vmcb01, vmcb02);
1074 		svm_update_lbrv(vcpu);
1075 	}
1076 
1077 	if (vnmi) {
1078 		if (vmcb02->control.int_ctl & V_NMI_BLOCKING_MASK)
1079 			vmcb01->control.int_ctl |= V_NMI_BLOCKING_MASK;
1080 		else
1081 			vmcb01->control.int_ctl &= ~V_NMI_BLOCKING_MASK;
1082 
1083 		if (vcpu->arch.nmi_pending) {
1084 			vcpu->arch.nmi_pending--;
1085 			vmcb01->control.int_ctl |= V_NMI_PENDING_MASK;
1086 		} else {
1087 			vmcb01->control.int_ctl &= ~V_NMI_PENDING_MASK;
1088 		}
1089 	}
1090 
1091 	/*
1092 	 * On vmexit the  GIF is set to false and
1093 	 * no event can be injected in L1.
1094 	 */
1095 	svm_set_gif(svm, false);
1096 	vmcb01->control.exit_int_info = 0;
1097 
1098 	svm->vcpu.arch.tsc_offset = svm->vcpu.arch.l1_tsc_offset;
1099 	if (vmcb01->control.tsc_offset != svm->vcpu.arch.tsc_offset) {
1100 		vmcb01->control.tsc_offset = svm->vcpu.arch.tsc_offset;
1101 		vmcb_mark_dirty(vmcb01, VMCB_INTERCEPTS);
1102 	}
1103 
1104 	if (svm->tsc_ratio_msr != kvm_caps.default_tsc_scaling_ratio) {
1105 		WARN_ON(!svm->tsc_scaling_enabled);
1106 		vcpu->arch.tsc_scaling_ratio = vcpu->arch.l1_tsc_scaling_ratio;
1107 		__svm_write_tsc_multiplier(vcpu->arch.tsc_scaling_ratio);
1108 	}
1109 
1110 	svm->nested.ctl.nested_cr3 = 0;
1111 
1112 	/*
1113 	 * Restore processor state that had been saved in vmcb01
1114 	 */
1115 	kvm_set_rflags(vcpu, vmcb01->save.rflags);
1116 	svm_set_efer(vcpu, vmcb01->save.efer);
1117 	svm_set_cr0(vcpu, vmcb01->save.cr0 | X86_CR0_PE);
1118 	svm_set_cr4(vcpu, vmcb01->save.cr4);
1119 	kvm_rax_write(vcpu, vmcb01->save.rax);
1120 	kvm_rsp_write(vcpu, vmcb01->save.rsp);
1121 	kvm_rip_write(vcpu, vmcb01->save.rip);
1122 
1123 	svm->vcpu.arch.dr7 = DR7_FIXED_1;
1124 	kvm_update_dr7(&svm->vcpu);
1125 
1126 	trace_kvm_nested_vmexit_inject(vmcb12->control.exit_code,
1127 				       vmcb12->control.exit_info_1,
1128 				       vmcb12->control.exit_info_2,
1129 				       vmcb12->control.exit_int_info,
1130 				       vmcb12->control.exit_int_info_err,
1131 				       KVM_ISA_SVM);
1132 
1133 	kvm_vcpu_unmap(vcpu, &map, true);
1134 
1135 	nested_svm_transition_tlb_flush(vcpu);
1136 
1137 	nested_svm_uninit_mmu_context(vcpu);
1138 
1139 	rc = nested_svm_load_cr3(vcpu, vmcb01->save.cr3, false, true);
1140 	if (rc)
1141 		return 1;
1142 
1143 	/*
1144 	 * Drop what we picked up for L2 via svm_complete_interrupts() so it
1145 	 * doesn't end up in L1.
1146 	 */
1147 	svm->vcpu.arch.nmi_injected = false;
1148 	kvm_clear_exception_queue(vcpu);
1149 	kvm_clear_interrupt_queue(vcpu);
1150 
1151 	/*
1152 	 * If we are here following the completion of a VMRUN that
1153 	 * is being single-stepped, queue the pending #DB intercept
1154 	 * right now so that it an be accounted for before we execute
1155 	 * L1's next instruction.
1156 	 */
1157 	if (unlikely(vmcb01->save.rflags & X86_EFLAGS_TF))
1158 		kvm_queue_exception(&(svm->vcpu), DB_VECTOR);
1159 
1160 	/*
1161 	 * Un-inhibit the AVIC right away, so that other vCPUs can start
1162 	 * to benefit from it right away.
1163 	 */
1164 	if (kvm_apicv_activated(vcpu->kvm))
1165 		__kvm_vcpu_update_apicv(vcpu);
1166 
1167 	return 0;
1168 }
1169 
1170 static void nested_svm_triple_fault(struct kvm_vcpu *vcpu)
1171 {
1172 	struct vcpu_svm *svm = to_svm(vcpu);
1173 
1174 	if (!vmcb12_is_intercept(&svm->nested.ctl, INTERCEPT_SHUTDOWN))
1175 		return;
1176 
1177 	kvm_clear_request(KVM_REQ_TRIPLE_FAULT, vcpu);
1178 	nested_svm_simple_vmexit(to_svm(vcpu), SVM_EXIT_SHUTDOWN);
1179 }
1180 
1181 int svm_allocate_nested(struct vcpu_svm *svm)
1182 {
1183 	struct page *vmcb02_page;
1184 
1185 	if (svm->nested.initialized)
1186 		return 0;
1187 
1188 	vmcb02_page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_ZERO);
1189 	if (!vmcb02_page)
1190 		return -ENOMEM;
1191 	svm->nested.vmcb02.ptr = page_address(vmcb02_page);
1192 	svm->nested.vmcb02.pa = __sme_set(page_to_pfn(vmcb02_page) << PAGE_SHIFT);
1193 
1194 	svm->nested.msrpm = svm_vcpu_alloc_msrpm();
1195 	if (!svm->nested.msrpm)
1196 		goto err_free_vmcb02;
1197 	svm_vcpu_init_msrpm(&svm->vcpu, svm->nested.msrpm);
1198 
1199 	svm->nested.initialized = true;
1200 	return 0;
1201 
1202 err_free_vmcb02:
1203 	__free_page(vmcb02_page);
1204 	return -ENOMEM;
1205 }
1206 
1207 void svm_free_nested(struct vcpu_svm *svm)
1208 {
1209 	if (!svm->nested.initialized)
1210 		return;
1211 
1212 	if (WARN_ON_ONCE(svm->vmcb != svm->vmcb01.ptr))
1213 		svm_switch_vmcb(svm, &svm->vmcb01);
1214 
1215 	svm_vcpu_free_msrpm(svm->nested.msrpm);
1216 	svm->nested.msrpm = NULL;
1217 
1218 	__free_page(virt_to_page(svm->nested.vmcb02.ptr));
1219 	svm->nested.vmcb02.ptr = NULL;
1220 
1221 	/*
1222 	 * When last_vmcb12_gpa matches the current vmcb12 gpa,
1223 	 * some vmcb12 fields are not loaded if they are marked clean
1224 	 * in the vmcb12, since in this case they are up to date already.
1225 	 *
1226 	 * When the vmcb02 is freed, this optimization becomes invalid.
1227 	 */
1228 	svm->nested.last_vmcb12_gpa = INVALID_GPA;
1229 
1230 	svm->nested.initialized = false;
1231 }
1232 
1233 void svm_leave_nested(struct kvm_vcpu *vcpu)
1234 {
1235 	struct vcpu_svm *svm = to_svm(vcpu);
1236 
1237 	if (is_guest_mode(vcpu)) {
1238 		svm->nested.nested_run_pending = 0;
1239 		svm->nested.vmcb12_gpa = INVALID_GPA;
1240 
1241 		leave_guest_mode(vcpu);
1242 
1243 		svm_switch_vmcb(svm, &svm->vmcb01);
1244 
1245 		nested_svm_uninit_mmu_context(vcpu);
1246 		vmcb_mark_all_dirty(svm->vmcb);
1247 	}
1248 
1249 	kvm_clear_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu);
1250 }
1251 
1252 static int nested_svm_exit_handled_msr(struct vcpu_svm *svm)
1253 {
1254 	u32 offset, msr, value;
1255 	int write, mask;
1256 
1257 	if (!(vmcb12_is_intercept(&svm->nested.ctl, INTERCEPT_MSR_PROT)))
1258 		return NESTED_EXIT_HOST;
1259 
1260 	msr    = svm->vcpu.arch.regs[VCPU_REGS_RCX];
1261 	offset = svm_msrpm_offset(msr);
1262 	write  = svm->vmcb->control.exit_info_1 & 1;
1263 	mask   = 1 << ((2 * (msr & 0xf)) + write);
1264 
1265 	if (offset == MSR_INVALID)
1266 		return NESTED_EXIT_DONE;
1267 
1268 	/* Offset is in 32 bit units but need in 8 bit units */
1269 	offset *= 4;
1270 
1271 	if (kvm_vcpu_read_guest(&svm->vcpu, svm->nested.ctl.msrpm_base_pa + offset, &value, 4))
1272 		return NESTED_EXIT_DONE;
1273 
1274 	return (value & mask) ? NESTED_EXIT_DONE : NESTED_EXIT_HOST;
1275 }
1276 
1277 static int nested_svm_intercept_ioio(struct vcpu_svm *svm)
1278 {
1279 	unsigned port, size, iopm_len;
1280 	u16 val, mask;
1281 	u8 start_bit;
1282 	u64 gpa;
1283 
1284 	if (!(vmcb12_is_intercept(&svm->nested.ctl, INTERCEPT_IOIO_PROT)))
1285 		return NESTED_EXIT_HOST;
1286 
1287 	port = svm->vmcb->control.exit_info_1 >> 16;
1288 	size = (svm->vmcb->control.exit_info_1 & SVM_IOIO_SIZE_MASK) >>
1289 		SVM_IOIO_SIZE_SHIFT;
1290 	gpa  = svm->nested.ctl.iopm_base_pa + (port / 8);
1291 	start_bit = port % 8;
1292 	iopm_len = (start_bit + size > 8) ? 2 : 1;
1293 	mask = (0xf >> (4 - size)) << start_bit;
1294 	val = 0;
1295 
1296 	if (kvm_vcpu_read_guest(&svm->vcpu, gpa, &val, iopm_len))
1297 		return NESTED_EXIT_DONE;
1298 
1299 	return (val & mask) ? NESTED_EXIT_DONE : NESTED_EXIT_HOST;
1300 }
1301 
1302 static int nested_svm_intercept(struct vcpu_svm *svm)
1303 {
1304 	u32 exit_code = svm->vmcb->control.exit_code;
1305 	int vmexit = NESTED_EXIT_HOST;
1306 
1307 	switch (exit_code) {
1308 	case SVM_EXIT_MSR:
1309 		vmexit = nested_svm_exit_handled_msr(svm);
1310 		break;
1311 	case SVM_EXIT_IOIO:
1312 		vmexit = nested_svm_intercept_ioio(svm);
1313 		break;
1314 	case SVM_EXIT_READ_CR0 ... SVM_EXIT_WRITE_CR8: {
1315 		if (vmcb12_is_intercept(&svm->nested.ctl, exit_code))
1316 			vmexit = NESTED_EXIT_DONE;
1317 		break;
1318 	}
1319 	case SVM_EXIT_READ_DR0 ... SVM_EXIT_WRITE_DR7: {
1320 		if (vmcb12_is_intercept(&svm->nested.ctl, exit_code))
1321 			vmexit = NESTED_EXIT_DONE;
1322 		break;
1323 	}
1324 	case SVM_EXIT_EXCP_BASE ... SVM_EXIT_EXCP_BASE + 0x1f: {
1325 		/*
1326 		 * Host-intercepted exceptions have been checked already in
1327 		 * nested_svm_exit_special.  There is nothing to do here,
1328 		 * the vmexit is injected by svm_check_nested_events.
1329 		 */
1330 		vmexit = NESTED_EXIT_DONE;
1331 		break;
1332 	}
1333 	case SVM_EXIT_ERR: {
1334 		vmexit = NESTED_EXIT_DONE;
1335 		break;
1336 	}
1337 	default: {
1338 		if (vmcb12_is_intercept(&svm->nested.ctl, exit_code))
1339 			vmexit = NESTED_EXIT_DONE;
1340 	}
1341 	}
1342 
1343 	return vmexit;
1344 }
1345 
1346 int nested_svm_exit_handled(struct vcpu_svm *svm)
1347 {
1348 	int vmexit;
1349 
1350 	vmexit = nested_svm_intercept(svm);
1351 
1352 	if (vmexit == NESTED_EXIT_DONE)
1353 		nested_svm_vmexit(svm);
1354 
1355 	return vmexit;
1356 }
1357 
1358 int nested_svm_check_permissions(struct kvm_vcpu *vcpu)
1359 {
1360 	if (!(vcpu->arch.efer & EFER_SVME) || !is_paging(vcpu)) {
1361 		kvm_queue_exception(vcpu, UD_VECTOR);
1362 		return 1;
1363 	}
1364 
1365 	if (to_svm(vcpu)->vmcb->save.cpl) {
1366 		kvm_inject_gp(vcpu, 0);
1367 		return 1;
1368 	}
1369 
1370 	return 0;
1371 }
1372 
1373 static bool nested_svm_is_exception_vmexit(struct kvm_vcpu *vcpu, u8 vector,
1374 					   u32 error_code)
1375 {
1376 	struct vcpu_svm *svm = to_svm(vcpu);
1377 
1378 	return (svm->nested.ctl.intercepts[INTERCEPT_EXCEPTION] & BIT(vector));
1379 }
1380 
1381 static void nested_svm_inject_exception_vmexit(struct kvm_vcpu *vcpu)
1382 {
1383 	struct kvm_queued_exception *ex = &vcpu->arch.exception_vmexit;
1384 	struct vcpu_svm *svm = to_svm(vcpu);
1385 	struct vmcb *vmcb = svm->vmcb;
1386 
1387 	vmcb->control.exit_code = SVM_EXIT_EXCP_BASE + ex->vector;
1388 	vmcb->control.exit_code_hi = 0;
1389 
1390 	if (ex->has_error_code)
1391 		vmcb->control.exit_info_1 = ex->error_code;
1392 
1393 	/*
1394 	 * EXITINFO2 is undefined for all exception intercepts other
1395 	 * than #PF.
1396 	 */
1397 	if (ex->vector == PF_VECTOR) {
1398 		if (ex->has_payload)
1399 			vmcb->control.exit_info_2 = ex->payload;
1400 		else
1401 			vmcb->control.exit_info_2 = vcpu->arch.cr2;
1402 	} else if (ex->vector == DB_VECTOR) {
1403 		/* See kvm_check_and_inject_events().  */
1404 		kvm_deliver_exception_payload(vcpu, ex);
1405 
1406 		if (vcpu->arch.dr7 & DR7_GD) {
1407 			vcpu->arch.dr7 &= ~DR7_GD;
1408 			kvm_update_dr7(vcpu);
1409 		}
1410 	} else {
1411 		WARN_ON(ex->has_payload);
1412 	}
1413 
1414 	nested_svm_vmexit(svm);
1415 }
1416 
1417 static inline bool nested_exit_on_init(struct vcpu_svm *svm)
1418 {
1419 	return vmcb12_is_intercept(&svm->nested.ctl, INTERCEPT_INIT);
1420 }
1421 
1422 static int svm_check_nested_events(struct kvm_vcpu *vcpu)
1423 {
1424 	struct kvm_lapic *apic = vcpu->arch.apic;
1425 	struct vcpu_svm *svm = to_svm(vcpu);
1426 	/*
1427 	 * Only a pending nested run blocks a pending exception.  If there is a
1428 	 * previously injected event, the pending exception occurred while said
1429 	 * event was being delivered and thus needs to be handled.
1430 	 */
1431 	bool block_nested_exceptions = svm->nested.nested_run_pending;
1432 	/*
1433 	 * New events (not exceptions) are only recognized at instruction
1434 	 * boundaries.  If an event needs reinjection, then KVM is handling a
1435 	 * VM-Exit that occurred _during_ instruction execution; new events are
1436 	 * blocked until the instruction completes.
1437 	 */
1438 	bool block_nested_events = block_nested_exceptions ||
1439 				   kvm_event_needs_reinjection(vcpu);
1440 
1441 	if (lapic_in_kernel(vcpu) &&
1442 	    test_bit(KVM_APIC_INIT, &apic->pending_events)) {
1443 		if (block_nested_events)
1444 			return -EBUSY;
1445 		if (!nested_exit_on_init(svm))
1446 			return 0;
1447 		nested_svm_simple_vmexit(svm, SVM_EXIT_INIT);
1448 		return 0;
1449 	}
1450 
1451 	if (vcpu->arch.exception_vmexit.pending) {
1452 		if (block_nested_exceptions)
1453                         return -EBUSY;
1454 		nested_svm_inject_exception_vmexit(vcpu);
1455 		return 0;
1456 	}
1457 
1458 	if (vcpu->arch.exception.pending) {
1459 		if (block_nested_exceptions)
1460 			return -EBUSY;
1461 		return 0;
1462 	}
1463 
1464 #ifdef CONFIG_KVM_SMM
1465 	if (vcpu->arch.smi_pending && !svm_smi_blocked(vcpu)) {
1466 		if (block_nested_events)
1467 			return -EBUSY;
1468 		if (!nested_exit_on_smi(svm))
1469 			return 0;
1470 		nested_svm_simple_vmexit(svm, SVM_EXIT_SMI);
1471 		return 0;
1472 	}
1473 #endif
1474 
1475 	if (vcpu->arch.nmi_pending && !svm_nmi_blocked(vcpu)) {
1476 		if (block_nested_events)
1477 			return -EBUSY;
1478 		if (!nested_exit_on_nmi(svm))
1479 			return 0;
1480 		nested_svm_simple_vmexit(svm, SVM_EXIT_NMI);
1481 		return 0;
1482 	}
1483 
1484 	if (kvm_cpu_has_interrupt(vcpu) && !svm_interrupt_blocked(vcpu)) {
1485 		if (block_nested_events)
1486 			return -EBUSY;
1487 		if (!nested_exit_on_intr(svm))
1488 			return 0;
1489 		trace_kvm_nested_intr_vmexit(svm->vmcb->save.rip);
1490 		nested_svm_simple_vmexit(svm, SVM_EXIT_INTR);
1491 		return 0;
1492 	}
1493 
1494 	return 0;
1495 }
1496 
1497 int nested_svm_exit_special(struct vcpu_svm *svm)
1498 {
1499 	u32 exit_code = svm->vmcb->control.exit_code;
1500 	struct kvm_vcpu *vcpu = &svm->vcpu;
1501 
1502 	switch (exit_code) {
1503 	case SVM_EXIT_INTR:
1504 	case SVM_EXIT_NMI:
1505 	case SVM_EXIT_NPF:
1506 		return NESTED_EXIT_HOST;
1507 	case SVM_EXIT_EXCP_BASE ... SVM_EXIT_EXCP_BASE + 0x1f: {
1508 		u32 excp_bits = 1 << (exit_code - SVM_EXIT_EXCP_BASE);
1509 
1510 		if (svm->vmcb01.ptr->control.intercepts[INTERCEPT_EXCEPTION] &
1511 		    excp_bits)
1512 			return NESTED_EXIT_HOST;
1513 		else if (exit_code == SVM_EXIT_EXCP_BASE + PF_VECTOR &&
1514 			 svm->vcpu.arch.apf.host_apf_flags)
1515 			/* Trap async PF even if not shadowing */
1516 			return NESTED_EXIT_HOST;
1517 		break;
1518 	}
1519 	case SVM_EXIT_VMMCALL:
1520 		/* Hyper-V L2 TLB flush hypercall is handled by L0 */
1521 		if (guest_hv_cpuid_has_l2_tlb_flush(vcpu) &&
1522 		    nested_svm_l2_tlb_flush_enabled(vcpu) &&
1523 		    kvm_hv_is_tlb_flush_hcall(vcpu))
1524 			return NESTED_EXIT_HOST;
1525 		break;
1526 	default:
1527 		break;
1528 	}
1529 
1530 	return NESTED_EXIT_CONTINUE;
1531 }
1532 
1533 void nested_svm_update_tsc_ratio_msr(struct kvm_vcpu *vcpu)
1534 {
1535 	struct vcpu_svm *svm = to_svm(vcpu);
1536 
1537 	vcpu->arch.tsc_scaling_ratio =
1538 		kvm_calc_nested_tsc_multiplier(vcpu->arch.l1_tsc_scaling_ratio,
1539 					       svm->tsc_ratio_msr);
1540 	__svm_write_tsc_multiplier(vcpu->arch.tsc_scaling_ratio);
1541 }
1542 
1543 /* Inverse operation of nested_copy_vmcb_control_to_cache(). asid is copied too. */
1544 static void nested_copy_vmcb_cache_to_control(struct vmcb_control_area *dst,
1545 					      struct vmcb_ctrl_area_cached *from)
1546 {
1547 	unsigned int i;
1548 
1549 	memset(dst, 0, sizeof(struct vmcb_control_area));
1550 
1551 	for (i = 0; i < MAX_INTERCEPT; i++)
1552 		dst->intercepts[i] = from->intercepts[i];
1553 
1554 	dst->iopm_base_pa         = from->iopm_base_pa;
1555 	dst->msrpm_base_pa        = from->msrpm_base_pa;
1556 	dst->tsc_offset           = from->tsc_offset;
1557 	dst->asid                 = from->asid;
1558 	dst->tlb_ctl              = from->tlb_ctl;
1559 	dst->int_ctl              = from->int_ctl;
1560 	dst->int_vector           = from->int_vector;
1561 	dst->int_state            = from->int_state;
1562 	dst->exit_code            = from->exit_code;
1563 	dst->exit_code_hi         = from->exit_code_hi;
1564 	dst->exit_info_1          = from->exit_info_1;
1565 	dst->exit_info_2          = from->exit_info_2;
1566 	dst->exit_int_info        = from->exit_int_info;
1567 	dst->exit_int_info_err    = from->exit_int_info_err;
1568 	dst->nested_ctl           = from->nested_ctl;
1569 	dst->event_inj            = from->event_inj;
1570 	dst->event_inj_err        = from->event_inj_err;
1571 	dst->next_rip             = from->next_rip;
1572 	dst->nested_cr3           = from->nested_cr3;
1573 	dst->virt_ext              = from->virt_ext;
1574 	dst->pause_filter_count   = from->pause_filter_count;
1575 	dst->pause_filter_thresh  = from->pause_filter_thresh;
1576 	/* 'clean' and 'hv_enlightenments' are not changed by KVM */
1577 }
1578 
1579 static int svm_get_nested_state(struct kvm_vcpu *vcpu,
1580 				struct kvm_nested_state __user *user_kvm_nested_state,
1581 				u32 user_data_size)
1582 {
1583 	struct vcpu_svm *svm;
1584 	struct vmcb_control_area *ctl;
1585 	unsigned long r;
1586 	struct kvm_nested_state kvm_state = {
1587 		.flags = 0,
1588 		.format = KVM_STATE_NESTED_FORMAT_SVM,
1589 		.size = sizeof(kvm_state),
1590 	};
1591 	struct vmcb __user *user_vmcb = (struct vmcb __user *)
1592 		&user_kvm_nested_state->data.svm[0];
1593 
1594 	if (!vcpu)
1595 		return kvm_state.size + KVM_STATE_NESTED_SVM_VMCB_SIZE;
1596 
1597 	svm = to_svm(vcpu);
1598 
1599 	if (user_data_size < kvm_state.size)
1600 		goto out;
1601 
1602 	/* First fill in the header and copy it out.  */
1603 	if (is_guest_mode(vcpu)) {
1604 		kvm_state.hdr.svm.vmcb_pa = svm->nested.vmcb12_gpa;
1605 		kvm_state.size += KVM_STATE_NESTED_SVM_VMCB_SIZE;
1606 		kvm_state.flags |= KVM_STATE_NESTED_GUEST_MODE;
1607 
1608 		if (svm->nested.nested_run_pending)
1609 			kvm_state.flags |= KVM_STATE_NESTED_RUN_PENDING;
1610 	}
1611 
1612 	if (gif_set(svm))
1613 		kvm_state.flags |= KVM_STATE_NESTED_GIF_SET;
1614 
1615 	if (copy_to_user(user_kvm_nested_state, &kvm_state, sizeof(kvm_state)))
1616 		return -EFAULT;
1617 
1618 	if (!is_guest_mode(vcpu))
1619 		goto out;
1620 
1621 	/*
1622 	 * Copy over the full size of the VMCB rather than just the size
1623 	 * of the structs.
1624 	 */
1625 	if (clear_user(user_vmcb, KVM_STATE_NESTED_SVM_VMCB_SIZE))
1626 		return -EFAULT;
1627 
1628 	ctl = kzalloc(sizeof(*ctl), GFP_KERNEL);
1629 	if (!ctl)
1630 		return -ENOMEM;
1631 
1632 	nested_copy_vmcb_cache_to_control(ctl, &svm->nested.ctl);
1633 	r = copy_to_user(&user_vmcb->control, ctl,
1634 			 sizeof(user_vmcb->control));
1635 	kfree(ctl);
1636 	if (r)
1637 		return -EFAULT;
1638 
1639 	if (copy_to_user(&user_vmcb->save, &svm->vmcb01.ptr->save,
1640 			 sizeof(user_vmcb->save)))
1641 		return -EFAULT;
1642 out:
1643 	return kvm_state.size;
1644 }
1645 
1646 static int svm_set_nested_state(struct kvm_vcpu *vcpu,
1647 				struct kvm_nested_state __user *user_kvm_nested_state,
1648 				struct kvm_nested_state *kvm_state)
1649 {
1650 	struct vcpu_svm *svm = to_svm(vcpu);
1651 	struct vmcb __user *user_vmcb = (struct vmcb __user *)
1652 		&user_kvm_nested_state->data.svm[0];
1653 	struct vmcb_control_area *ctl;
1654 	struct vmcb_save_area *save;
1655 	struct vmcb_save_area_cached save_cached;
1656 	struct vmcb_ctrl_area_cached ctl_cached;
1657 	unsigned long cr0;
1658 	int ret;
1659 
1660 	BUILD_BUG_ON(sizeof(struct vmcb_control_area) + sizeof(struct vmcb_save_area) >
1661 		     KVM_STATE_NESTED_SVM_VMCB_SIZE);
1662 
1663 	if (kvm_state->format != KVM_STATE_NESTED_FORMAT_SVM)
1664 		return -EINVAL;
1665 
1666 	if (kvm_state->flags & ~(KVM_STATE_NESTED_GUEST_MODE |
1667 				 KVM_STATE_NESTED_RUN_PENDING |
1668 				 KVM_STATE_NESTED_GIF_SET))
1669 		return -EINVAL;
1670 
1671 	/*
1672 	 * If in guest mode, vcpu->arch.efer actually refers to the L2 guest's
1673 	 * EFER.SVME, but EFER.SVME still has to be 1 for VMRUN to succeed.
1674 	 */
1675 	if (!(vcpu->arch.efer & EFER_SVME)) {
1676 		/* GIF=1 and no guest mode are required if SVME=0.  */
1677 		if (kvm_state->flags != KVM_STATE_NESTED_GIF_SET)
1678 			return -EINVAL;
1679 	}
1680 
1681 	/* SMM temporarily disables SVM, so we cannot be in guest mode.  */
1682 	if (is_smm(vcpu) && (kvm_state->flags & KVM_STATE_NESTED_GUEST_MODE))
1683 		return -EINVAL;
1684 
1685 	if (!(kvm_state->flags & KVM_STATE_NESTED_GUEST_MODE)) {
1686 		svm_leave_nested(vcpu);
1687 		svm_set_gif(svm, !!(kvm_state->flags & KVM_STATE_NESTED_GIF_SET));
1688 		return 0;
1689 	}
1690 
1691 	if (!page_address_valid(vcpu, kvm_state->hdr.svm.vmcb_pa))
1692 		return -EINVAL;
1693 	if (kvm_state->size < sizeof(*kvm_state) + KVM_STATE_NESTED_SVM_VMCB_SIZE)
1694 		return -EINVAL;
1695 
1696 	ret  = -ENOMEM;
1697 	ctl  = kzalloc(sizeof(*ctl),  GFP_KERNEL_ACCOUNT);
1698 	save = kzalloc(sizeof(*save), GFP_KERNEL_ACCOUNT);
1699 	if (!ctl || !save)
1700 		goto out_free;
1701 
1702 	ret = -EFAULT;
1703 	if (copy_from_user(ctl, &user_vmcb->control, sizeof(*ctl)))
1704 		goto out_free;
1705 	if (copy_from_user(save, &user_vmcb->save, sizeof(*save)))
1706 		goto out_free;
1707 
1708 	ret = -EINVAL;
1709 	__nested_copy_vmcb_control_to_cache(vcpu, &ctl_cached, ctl);
1710 	if (!__nested_vmcb_check_controls(vcpu, &ctl_cached))
1711 		goto out_free;
1712 
1713 	/*
1714 	 * Processor state contains L2 state.  Check that it is
1715 	 * valid for guest mode (see nested_vmcb_check_save).
1716 	 */
1717 	cr0 = kvm_read_cr0(vcpu);
1718         if (((cr0 & X86_CR0_CD) == 0) && (cr0 & X86_CR0_NW))
1719 		goto out_free;
1720 
1721 	/*
1722 	 * Validate host state saved from before VMRUN (see
1723 	 * nested_svm_check_permissions).
1724 	 */
1725 	__nested_copy_vmcb_save_to_cache(&save_cached, save);
1726 	if (!(save->cr0 & X86_CR0_PG) ||
1727 	    !(save->cr0 & X86_CR0_PE) ||
1728 	    (save->rflags & X86_EFLAGS_VM) ||
1729 	    !__nested_vmcb_check_save(vcpu, &save_cached))
1730 		goto out_free;
1731 
1732 
1733 	/*
1734 	 * All checks done, we can enter guest mode. Userspace provides
1735 	 * vmcb12.control, which will be combined with L1 and stored into
1736 	 * vmcb02, and the L1 save state which we store in vmcb01.
1737 	 * L2 registers if needed are moved from the current VMCB to VMCB02.
1738 	 */
1739 
1740 	if (is_guest_mode(vcpu))
1741 		svm_leave_nested(vcpu);
1742 	else
1743 		svm->nested.vmcb02.ptr->save = svm->vmcb01.ptr->save;
1744 
1745 	svm_set_gif(svm, !!(kvm_state->flags & KVM_STATE_NESTED_GIF_SET));
1746 
1747 	svm->nested.nested_run_pending =
1748 		!!(kvm_state->flags & KVM_STATE_NESTED_RUN_PENDING);
1749 
1750 	svm->nested.vmcb12_gpa = kvm_state->hdr.svm.vmcb_pa;
1751 
1752 	svm_copy_vmrun_state(&svm->vmcb01.ptr->save, save);
1753 	nested_copy_vmcb_control_to_cache(svm, ctl);
1754 
1755 	svm_switch_vmcb(svm, &svm->nested.vmcb02);
1756 	nested_vmcb02_prepare_control(svm, svm->vmcb->save.rip, svm->vmcb->save.cs.base);
1757 
1758 	/*
1759 	 * While the nested guest CR3 is already checked and set by
1760 	 * KVM_SET_SREGS, it was set when nested state was yet loaded,
1761 	 * thus MMU might not be initialized correctly.
1762 	 * Set it again to fix this.
1763 	 */
1764 
1765 	ret = nested_svm_load_cr3(&svm->vcpu, vcpu->arch.cr3,
1766 				  nested_npt_enabled(svm), false);
1767 	if (WARN_ON_ONCE(ret))
1768 		goto out_free;
1769 
1770 	svm->nested.force_msr_bitmap_recalc = true;
1771 
1772 	kvm_make_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu);
1773 	ret = 0;
1774 out_free:
1775 	kfree(save);
1776 	kfree(ctl);
1777 
1778 	return ret;
1779 }
1780 
1781 static bool svm_get_nested_state_pages(struct kvm_vcpu *vcpu)
1782 {
1783 	struct vcpu_svm *svm = to_svm(vcpu);
1784 
1785 	if (WARN_ON(!is_guest_mode(vcpu)))
1786 		return true;
1787 
1788 	if (!vcpu->arch.pdptrs_from_userspace &&
1789 	    !nested_npt_enabled(svm) && is_pae_paging(vcpu))
1790 		/*
1791 		 * Reload the guest's PDPTRs since after a migration
1792 		 * the guest CR3 might be restored prior to setting the nested
1793 		 * state which can lead to a load of wrong PDPTRs.
1794 		 */
1795 		if (CC(!load_pdptrs(vcpu, vcpu->arch.cr3)))
1796 			return false;
1797 
1798 	if (!nested_svm_vmrun_msrpm(svm)) {
1799 		vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
1800 		vcpu->run->internal.suberror =
1801 			KVM_INTERNAL_ERROR_EMULATION;
1802 		vcpu->run->internal.ndata = 0;
1803 		return false;
1804 	}
1805 
1806 	if (kvm_hv_verify_vp_assist(vcpu))
1807 		return false;
1808 
1809 	return true;
1810 }
1811 
1812 struct kvm_x86_nested_ops svm_nested_ops = {
1813 	.leave_nested = svm_leave_nested,
1814 	.is_exception_vmexit = nested_svm_is_exception_vmexit,
1815 	.check_events = svm_check_nested_events,
1816 	.triple_fault = nested_svm_triple_fault,
1817 	.get_nested_state_pages = svm_get_nested_state_pages,
1818 	.get_state = svm_get_nested_state,
1819 	.set_state = svm_set_nested_state,
1820 	.hv_inject_synthetic_vmexit_post_tlb_flush = svm_hv_inject_synthetic_vmexit_post_tlb_flush,
1821 };
1822