1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef ARCH_X86_KVM_REVERSE_CPUID_H 3 #define ARCH_X86_KVM_REVERSE_CPUID_H 4 5 #include <uapi/asm/kvm.h> 6 #include <asm/cpufeature.h> 7 #include <asm/cpufeatures.h> 8 9 /* 10 * Hardware-defined CPUID leafs that are either scattered by the kernel or are 11 * unknown to the kernel, but need to be directly used by KVM. Note, these 12 * word values conflict with the kernel's "bug" caps, but KVM doesn't use those. 13 */ 14 enum kvm_only_cpuid_leafs { 15 CPUID_12_EAX = NCAPINTS, 16 CPUID_7_1_EDX, 17 CPUID_8000_0007_EDX, 18 CPUID_8000_0022_EAX, 19 NR_KVM_CPU_CAPS, 20 21 NKVMCAPINTS = NR_KVM_CPU_CAPS - NCAPINTS, 22 }; 23 24 /* 25 * Define a KVM-only feature flag. 26 * 27 * For features that are scattered by cpufeatures.h, __feature_translate() also 28 * needs to be updated to translate the kernel-defined feature into the 29 * KVM-defined feature. 30 * 31 * For features that are 100% KVM-only, i.e. not defined by cpufeatures.h, 32 * forego the intermediate KVM_X86_FEATURE and directly define X86_FEATURE_* so 33 * that X86_FEATURE_* can be used in KVM. No __feature_translate() handling is 34 * needed in this case. 35 */ 36 #define KVM_X86_FEATURE(w, f) ((w)*32 + (f)) 37 38 /* Intel-defined SGX sub-features, CPUID level 0x12 (EAX). */ 39 #define KVM_X86_FEATURE_SGX1 KVM_X86_FEATURE(CPUID_12_EAX, 0) 40 #define KVM_X86_FEATURE_SGX2 KVM_X86_FEATURE(CPUID_12_EAX, 1) 41 #define KVM_X86_FEATURE_SGX_EDECCSSA KVM_X86_FEATURE(CPUID_12_EAX, 11) 42 43 /* Intel-defined sub-features, CPUID level 0x00000007:1 (EDX) */ 44 #define X86_FEATURE_AVX_VNNI_INT8 KVM_X86_FEATURE(CPUID_7_1_EDX, 4) 45 #define X86_FEATURE_AVX_NE_CONVERT KVM_X86_FEATURE(CPUID_7_1_EDX, 5) 46 #define X86_FEATURE_PREFETCHITI KVM_X86_FEATURE(CPUID_7_1_EDX, 14) 47 48 /* CPUID level 0x80000007 (EDX). */ 49 #define KVM_X86_FEATURE_CONSTANT_TSC KVM_X86_FEATURE(CPUID_8000_0007_EDX, 8) 50 51 /* CPUID level 0x80000022 (EAX) */ 52 #define KVM_X86_FEATURE_PERFMON_V2 KVM_X86_FEATURE(CPUID_8000_0022_EAX, 0) 53 54 struct cpuid_reg { 55 u32 function; 56 u32 index; 57 int reg; 58 }; 59 60 static const struct cpuid_reg reverse_cpuid[] = { 61 [CPUID_1_EDX] = { 1, 0, CPUID_EDX}, 62 [CPUID_8000_0001_EDX] = {0x80000001, 0, CPUID_EDX}, 63 [CPUID_8086_0001_EDX] = {0x80860001, 0, CPUID_EDX}, 64 [CPUID_1_ECX] = { 1, 0, CPUID_ECX}, 65 [CPUID_C000_0001_EDX] = {0xc0000001, 0, CPUID_EDX}, 66 [CPUID_8000_0001_ECX] = {0x80000001, 0, CPUID_ECX}, 67 [CPUID_7_0_EBX] = { 7, 0, CPUID_EBX}, 68 [CPUID_D_1_EAX] = { 0xd, 1, CPUID_EAX}, 69 [CPUID_8000_0008_EBX] = {0x80000008, 0, CPUID_EBX}, 70 [CPUID_6_EAX] = { 6, 0, CPUID_EAX}, 71 [CPUID_8000_000A_EDX] = {0x8000000a, 0, CPUID_EDX}, 72 [CPUID_7_ECX] = { 7, 0, CPUID_ECX}, 73 [CPUID_8000_0007_EBX] = {0x80000007, 0, CPUID_EBX}, 74 [CPUID_7_EDX] = { 7, 0, CPUID_EDX}, 75 [CPUID_7_1_EAX] = { 7, 1, CPUID_EAX}, 76 [CPUID_12_EAX] = {0x00000012, 0, CPUID_EAX}, 77 [CPUID_8000_001F_EAX] = {0x8000001f, 0, CPUID_EAX}, 78 [CPUID_7_1_EDX] = { 7, 1, CPUID_EDX}, 79 [CPUID_8000_0007_EDX] = {0x80000007, 0, CPUID_EDX}, 80 [CPUID_8000_0021_EAX] = {0x80000021, 0, CPUID_EAX}, 81 [CPUID_8000_0022_EAX] = {0x80000022, 0, CPUID_EAX}, 82 }; 83 84 /* 85 * Reverse CPUID and its derivatives can only be used for hardware-defined 86 * feature words, i.e. words whose bits directly correspond to a CPUID leaf. 87 * Retrieving a feature bit or masking guest CPUID from a Linux-defined word 88 * is nonsensical as the bit number/mask is an arbitrary software-defined value 89 * and can't be used by KVM to query/control guest capabilities. And obviously 90 * the leaf being queried must have an entry in the lookup table. 91 */ 92 static __always_inline void reverse_cpuid_check(unsigned int x86_leaf) 93 { 94 BUILD_BUG_ON(x86_leaf == CPUID_LNX_1); 95 BUILD_BUG_ON(x86_leaf == CPUID_LNX_2); 96 BUILD_BUG_ON(x86_leaf == CPUID_LNX_3); 97 BUILD_BUG_ON(x86_leaf == CPUID_LNX_4); 98 BUILD_BUG_ON(x86_leaf >= ARRAY_SIZE(reverse_cpuid)); 99 BUILD_BUG_ON(reverse_cpuid[x86_leaf].function == 0); 100 } 101 102 /* 103 * Translate feature bits that are scattered in the kernel's cpufeatures word 104 * into KVM feature words that align with hardware's definitions. 105 */ 106 static __always_inline u32 __feature_translate(int x86_feature) 107 { 108 if (x86_feature == X86_FEATURE_SGX1) 109 return KVM_X86_FEATURE_SGX1; 110 else if (x86_feature == X86_FEATURE_SGX2) 111 return KVM_X86_FEATURE_SGX2; 112 else if (x86_feature == X86_FEATURE_SGX_EDECCSSA) 113 return KVM_X86_FEATURE_SGX_EDECCSSA; 114 else if (x86_feature == X86_FEATURE_CONSTANT_TSC) 115 return KVM_X86_FEATURE_CONSTANT_TSC; 116 else if (x86_feature == X86_FEATURE_PERFMON_V2) 117 return KVM_X86_FEATURE_PERFMON_V2; 118 119 return x86_feature; 120 } 121 122 static __always_inline u32 __feature_leaf(int x86_feature) 123 { 124 return __feature_translate(x86_feature) / 32; 125 } 126 127 /* 128 * Retrieve the bit mask from an X86_FEATURE_* definition. Features contain 129 * the hardware defined bit number (stored in bits 4:0) and a software defined 130 * "word" (stored in bits 31:5). The word is used to index into arrays of 131 * bit masks that hold the per-cpu feature capabilities, e.g. this_cpu_has(). 132 */ 133 static __always_inline u32 __feature_bit(int x86_feature) 134 { 135 x86_feature = __feature_translate(x86_feature); 136 137 reverse_cpuid_check(x86_feature / 32); 138 return 1 << (x86_feature & 31); 139 } 140 141 #define feature_bit(name) __feature_bit(X86_FEATURE_##name) 142 143 static __always_inline struct cpuid_reg x86_feature_cpuid(unsigned int x86_feature) 144 { 145 unsigned int x86_leaf = __feature_leaf(x86_feature); 146 147 reverse_cpuid_check(x86_leaf); 148 return reverse_cpuid[x86_leaf]; 149 } 150 151 static __always_inline u32 *__cpuid_entry_get_reg(struct kvm_cpuid_entry2 *entry, 152 u32 reg) 153 { 154 switch (reg) { 155 case CPUID_EAX: 156 return &entry->eax; 157 case CPUID_EBX: 158 return &entry->ebx; 159 case CPUID_ECX: 160 return &entry->ecx; 161 case CPUID_EDX: 162 return &entry->edx; 163 default: 164 BUILD_BUG(); 165 return NULL; 166 } 167 } 168 169 static __always_inline u32 *cpuid_entry_get_reg(struct kvm_cpuid_entry2 *entry, 170 unsigned int x86_feature) 171 { 172 const struct cpuid_reg cpuid = x86_feature_cpuid(x86_feature); 173 174 return __cpuid_entry_get_reg(entry, cpuid.reg); 175 } 176 177 static __always_inline u32 cpuid_entry_get(struct kvm_cpuid_entry2 *entry, 178 unsigned int x86_feature) 179 { 180 u32 *reg = cpuid_entry_get_reg(entry, x86_feature); 181 182 return *reg & __feature_bit(x86_feature); 183 } 184 185 static __always_inline bool cpuid_entry_has(struct kvm_cpuid_entry2 *entry, 186 unsigned int x86_feature) 187 { 188 return cpuid_entry_get(entry, x86_feature); 189 } 190 191 static __always_inline void cpuid_entry_clear(struct kvm_cpuid_entry2 *entry, 192 unsigned int x86_feature) 193 { 194 u32 *reg = cpuid_entry_get_reg(entry, x86_feature); 195 196 *reg &= ~__feature_bit(x86_feature); 197 } 198 199 static __always_inline void cpuid_entry_set(struct kvm_cpuid_entry2 *entry, 200 unsigned int x86_feature) 201 { 202 u32 *reg = cpuid_entry_get_reg(entry, x86_feature); 203 204 *reg |= __feature_bit(x86_feature); 205 } 206 207 static __always_inline void cpuid_entry_change(struct kvm_cpuid_entry2 *entry, 208 unsigned int x86_feature, 209 bool set) 210 { 211 u32 *reg = cpuid_entry_get_reg(entry, x86_feature); 212 213 /* 214 * Open coded instead of using cpuid_entry_{clear,set}() to coerce the 215 * compiler into using CMOV instead of Jcc when possible. 216 */ 217 if (set) 218 *reg |= __feature_bit(x86_feature); 219 else 220 *reg &= ~__feature_bit(x86_feature); 221 } 222 223 #endif /* ARCH_X86_KVM_REVERSE_CPUID_H */ 224