xref: /openbmc/linux/arch/x86/kvm/reverse_cpuid.h (revision 6486a57f)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef ARCH_X86_KVM_REVERSE_CPUID_H
3 #define ARCH_X86_KVM_REVERSE_CPUID_H
4 
5 #include <uapi/asm/kvm.h>
6 #include <asm/cpufeature.h>
7 #include <asm/cpufeatures.h>
8 
9 /*
10  * Hardware-defined CPUID leafs that are either scattered by the kernel or are
11  * unknown to the kernel, but need to be directly used by KVM.  Note, these
12  * word values conflict with the kernel's "bug" caps, but KVM doesn't use those.
13  */
14 enum kvm_only_cpuid_leafs {
15 	CPUID_12_EAX	 = NCAPINTS,
16 	CPUID_7_1_EDX,
17 	NR_KVM_CPU_CAPS,
18 
19 	NKVMCAPINTS = NR_KVM_CPU_CAPS - NCAPINTS,
20 };
21 
22 /*
23  * Define a KVM-only feature flag.
24  *
25  * For features that are scattered by cpufeatures.h, __feature_translate() also
26  * needs to be updated to translate the kernel-defined feature into the
27  * KVM-defined feature.
28  *
29  * For features that are 100% KVM-only, i.e. not defined by cpufeatures.h,
30  * forego the intermediate KVM_X86_FEATURE and directly define X86_FEATURE_* so
31  * that X86_FEATURE_* can be used in KVM.  No __feature_translate() handling is
32  * needed in this case.
33  */
34 #define KVM_X86_FEATURE(w, f)		((w)*32 + (f))
35 
36 /* Intel-defined SGX sub-features, CPUID level 0x12 (EAX). */
37 #define KVM_X86_FEATURE_SGX1		KVM_X86_FEATURE(CPUID_12_EAX, 0)
38 #define KVM_X86_FEATURE_SGX2		KVM_X86_FEATURE(CPUID_12_EAX, 1)
39 #define KVM_X86_FEATURE_SGX_EDECCSSA	KVM_X86_FEATURE(CPUID_12_EAX, 11)
40 
41 /* Intel-defined sub-features, CPUID level 0x00000007:1 (EDX) */
42 #define X86_FEATURE_AVX_VNNI_INT8       KVM_X86_FEATURE(CPUID_7_1_EDX, 4)
43 #define X86_FEATURE_AVX_NE_CONVERT      KVM_X86_FEATURE(CPUID_7_1_EDX, 5)
44 #define X86_FEATURE_PREFETCHITI         KVM_X86_FEATURE(CPUID_7_1_EDX, 14)
45 
46 struct cpuid_reg {
47 	u32 function;
48 	u32 index;
49 	int reg;
50 };
51 
52 static const struct cpuid_reg reverse_cpuid[] = {
53 	[CPUID_1_EDX]         = {         1, 0, CPUID_EDX},
54 	[CPUID_8000_0001_EDX] = {0x80000001, 0, CPUID_EDX},
55 	[CPUID_8086_0001_EDX] = {0x80860001, 0, CPUID_EDX},
56 	[CPUID_1_ECX]         = {         1, 0, CPUID_ECX},
57 	[CPUID_C000_0001_EDX] = {0xc0000001, 0, CPUID_EDX},
58 	[CPUID_8000_0001_ECX] = {0x80000001, 0, CPUID_ECX},
59 	[CPUID_7_0_EBX]       = {         7, 0, CPUID_EBX},
60 	[CPUID_D_1_EAX]       = {       0xd, 1, CPUID_EAX},
61 	[CPUID_8000_0008_EBX] = {0x80000008, 0, CPUID_EBX},
62 	[CPUID_6_EAX]         = {         6, 0, CPUID_EAX},
63 	[CPUID_8000_000A_EDX] = {0x8000000a, 0, CPUID_EDX},
64 	[CPUID_7_ECX]         = {         7, 0, CPUID_ECX},
65 	[CPUID_8000_0007_EBX] = {0x80000007, 0, CPUID_EBX},
66 	[CPUID_7_EDX]         = {         7, 0, CPUID_EDX},
67 	[CPUID_7_1_EAX]       = {         7, 1, CPUID_EAX},
68 	[CPUID_12_EAX]        = {0x00000012, 0, CPUID_EAX},
69 	[CPUID_8000_001F_EAX] = {0x8000001f, 0, CPUID_EAX},
70 	[CPUID_7_1_EDX]       = {         7, 1, CPUID_EDX},
71 	[CPUID_8000_0021_EAX] = {0x80000021, 0, CPUID_EAX},
72 };
73 
74 /*
75  * Reverse CPUID and its derivatives can only be used for hardware-defined
76  * feature words, i.e. words whose bits directly correspond to a CPUID leaf.
77  * Retrieving a feature bit or masking guest CPUID from a Linux-defined word
78  * is nonsensical as the bit number/mask is an arbitrary software-defined value
79  * and can't be used by KVM to query/control guest capabilities.  And obviously
80  * the leaf being queried must have an entry in the lookup table.
81  */
82 static __always_inline void reverse_cpuid_check(unsigned int x86_leaf)
83 {
84 	BUILD_BUG_ON(x86_leaf == CPUID_LNX_1);
85 	BUILD_BUG_ON(x86_leaf == CPUID_LNX_2);
86 	BUILD_BUG_ON(x86_leaf == CPUID_LNX_3);
87 	BUILD_BUG_ON(x86_leaf == CPUID_LNX_4);
88 	BUILD_BUG_ON(x86_leaf >= ARRAY_SIZE(reverse_cpuid));
89 	BUILD_BUG_ON(reverse_cpuid[x86_leaf].function == 0);
90 }
91 
92 /*
93  * Translate feature bits that are scattered in the kernel's cpufeatures word
94  * into KVM feature words that align with hardware's definitions.
95  */
96 static __always_inline u32 __feature_translate(int x86_feature)
97 {
98 	if (x86_feature == X86_FEATURE_SGX1)
99 		return KVM_X86_FEATURE_SGX1;
100 	else if (x86_feature == X86_FEATURE_SGX2)
101 		return KVM_X86_FEATURE_SGX2;
102 	else if (x86_feature == X86_FEATURE_SGX_EDECCSSA)
103 		return KVM_X86_FEATURE_SGX_EDECCSSA;
104 
105 	return x86_feature;
106 }
107 
108 static __always_inline u32 __feature_leaf(int x86_feature)
109 {
110 	return __feature_translate(x86_feature) / 32;
111 }
112 
113 /*
114  * Retrieve the bit mask from an X86_FEATURE_* definition.  Features contain
115  * the hardware defined bit number (stored in bits 4:0) and a software defined
116  * "word" (stored in bits 31:5).  The word is used to index into arrays of
117  * bit masks that hold the per-cpu feature capabilities, e.g. this_cpu_has().
118  */
119 static __always_inline u32 __feature_bit(int x86_feature)
120 {
121 	x86_feature = __feature_translate(x86_feature);
122 
123 	reverse_cpuid_check(x86_feature / 32);
124 	return 1 << (x86_feature & 31);
125 }
126 
127 #define feature_bit(name)  __feature_bit(X86_FEATURE_##name)
128 
129 static __always_inline struct cpuid_reg x86_feature_cpuid(unsigned int x86_feature)
130 {
131 	unsigned int x86_leaf = __feature_leaf(x86_feature);
132 
133 	reverse_cpuid_check(x86_leaf);
134 	return reverse_cpuid[x86_leaf];
135 }
136 
137 static __always_inline u32 *__cpuid_entry_get_reg(struct kvm_cpuid_entry2 *entry,
138 						  u32 reg)
139 {
140 	switch (reg) {
141 	case CPUID_EAX:
142 		return &entry->eax;
143 	case CPUID_EBX:
144 		return &entry->ebx;
145 	case CPUID_ECX:
146 		return &entry->ecx;
147 	case CPUID_EDX:
148 		return &entry->edx;
149 	default:
150 		BUILD_BUG();
151 		return NULL;
152 	}
153 }
154 
155 static __always_inline u32 *cpuid_entry_get_reg(struct kvm_cpuid_entry2 *entry,
156 						unsigned int x86_feature)
157 {
158 	const struct cpuid_reg cpuid = x86_feature_cpuid(x86_feature);
159 
160 	return __cpuid_entry_get_reg(entry, cpuid.reg);
161 }
162 
163 static __always_inline u32 cpuid_entry_get(struct kvm_cpuid_entry2 *entry,
164 					   unsigned int x86_feature)
165 {
166 	u32 *reg = cpuid_entry_get_reg(entry, x86_feature);
167 
168 	return *reg & __feature_bit(x86_feature);
169 }
170 
171 static __always_inline bool cpuid_entry_has(struct kvm_cpuid_entry2 *entry,
172 					    unsigned int x86_feature)
173 {
174 	return cpuid_entry_get(entry, x86_feature);
175 }
176 
177 static __always_inline void cpuid_entry_clear(struct kvm_cpuid_entry2 *entry,
178 					      unsigned int x86_feature)
179 {
180 	u32 *reg = cpuid_entry_get_reg(entry, x86_feature);
181 
182 	*reg &= ~__feature_bit(x86_feature);
183 }
184 
185 static __always_inline void cpuid_entry_set(struct kvm_cpuid_entry2 *entry,
186 					    unsigned int x86_feature)
187 {
188 	u32 *reg = cpuid_entry_get_reg(entry, x86_feature);
189 
190 	*reg |= __feature_bit(x86_feature);
191 }
192 
193 static __always_inline void cpuid_entry_change(struct kvm_cpuid_entry2 *entry,
194 					       unsigned int x86_feature,
195 					       bool set)
196 {
197 	u32 *reg = cpuid_entry_get_reg(entry, x86_feature);
198 
199 	/*
200 	 * Open coded instead of using cpuid_entry_{clear,set}() to coerce the
201 	 * compiler into using CMOV instead of Jcc when possible.
202 	 */
203 	if (set)
204 		*reg |= __feature_bit(x86_feature);
205 	else
206 		*reg &= ~__feature_bit(x86_feature);
207 }
208 
209 #endif /* ARCH_X86_KVM_REVERSE_CPUID_H */
210