1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef ARCH_X86_KVM_REVERSE_CPUID_H 3 #define ARCH_X86_KVM_REVERSE_CPUID_H 4 5 #include <uapi/asm/kvm.h> 6 #include <asm/cpufeature.h> 7 #include <asm/cpufeatures.h> 8 9 /* 10 * Hardware-defined CPUID leafs that are either scattered by the kernel or are 11 * unknown to the kernel, but need to be directly used by KVM. Note, these 12 * word values conflict with the kernel's "bug" caps, but KVM doesn't use those. 13 */ 14 enum kvm_only_cpuid_leafs { 15 CPUID_12_EAX = NCAPINTS, 16 CPUID_7_1_EDX, 17 CPUID_8000_0007_EDX, 18 CPUID_8000_0022_EAX, 19 NR_KVM_CPU_CAPS, 20 21 NKVMCAPINTS = NR_KVM_CPU_CAPS - NCAPINTS, 22 }; 23 24 /* 25 * Define a KVM-only feature flag. 26 * 27 * For features that are scattered by cpufeatures.h, __feature_translate() also 28 * needs to be updated to translate the kernel-defined feature into the 29 * KVM-defined feature. 30 * 31 * For features that are 100% KVM-only, i.e. not defined by cpufeatures.h, 32 * forego the intermediate KVM_X86_FEATURE and directly define X86_FEATURE_* so 33 * that X86_FEATURE_* can be used in KVM. No __feature_translate() handling is 34 * needed in this case. 35 */ 36 #define KVM_X86_FEATURE(w, f) ((w)*32 + (f)) 37 38 /* Intel-defined SGX sub-features, CPUID level 0x12 (EAX). */ 39 #define KVM_X86_FEATURE_SGX1 KVM_X86_FEATURE(CPUID_12_EAX, 0) 40 #define KVM_X86_FEATURE_SGX2 KVM_X86_FEATURE(CPUID_12_EAX, 1) 41 #define KVM_X86_FEATURE_SGX_EDECCSSA KVM_X86_FEATURE(CPUID_12_EAX, 11) 42 43 /* Intel-defined sub-features, CPUID level 0x00000007:1 (EDX) */ 44 #define X86_FEATURE_AVX_VNNI_INT8 KVM_X86_FEATURE(CPUID_7_1_EDX, 4) 45 #define X86_FEATURE_AVX_NE_CONVERT KVM_X86_FEATURE(CPUID_7_1_EDX, 5) 46 #define X86_FEATURE_AMX_COMPLEX KVM_X86_FEATURE(CPUID_7_1_EDX, 8) 47 #define X86_FEATURE_PREFETCHITI KVM_X86_FEATURE(CPUID_7_1_EDX, 14) 48 49 /* CPUID level 0x80000007 (EDX). */ 50 #define KVM_X86_FEATURE_CONSTANT_TSC KVM_X86_FEATURE(CPUID_8000_0007_EDX, 8) 51 52 /* CPUID level 0x80000022 (EAX) */ 53 #define KVM_X86_FEATURE_PERFMON_V2 KVM_X86_FEATURE(CPUID_8000_0022_EAX, 0) 54 55 struct cpuid_reg { 56 u32 function; 57 u32 index; 58 int reg; 59 }; 60 61 static const struct cpuid_reg reverse_cpuid[] = { 62 [CPUID_1_EDX] = { 1, 0, CPUID_EDX}, 63 [CPUID_8000_0001_EDX] = {0x80000001, 0, CPUID_EDX}, 64 [CPUID_8086_0001_EDX] = {0x80860001, 0, CPUID_EDX}, 65 [CPUID_1_ECX] = { 1, 0, CPUID_ECX}, 66 [CPUID_C000_0001_EDX] = {0xc0000001, 0, CPUID_EDX}, 67 [CPUID_8000_0001_ECX] = {0x80000001, 0, CPUID_ECX}, 68 [CPUID_7_0_EBX] = { 7, 0, CPUID_EBX}, 69 [CPUID_D_1_EAX] = { 0xd, 1, CPUID_EAX}, 70 [CPUID_8000_0008_EBX] = {0x80000008, 0, CPUID_EBX}, 71 [CPUID_6_EAX] = { 6, 0, CPUID_EAX}, 72 [CPUID_8000_000A_EDX] = {0x8000000a, 0, CPUID_EDX}, 73 [CPUID_7_ECX] = { 7, 0, CPUID_ECX}, 74 [CPUID_8000_0007_EBX] = {0x80000007, 0, CPUID_EBX}, 75 [CPUID_7_EDX] = { 7, 0, CPUID_EDX}, 76 [CPUID_7_1_EAX] = { 7, 1, CPUID_EAX}, 77 [CPUID_12_EAX] = {0x00000012, 0, CPUID_EAX}, 78 [CPUID_8000_001F_EAX] = {0x8000001f, 0, CPUID_EAX}, 79 [CPUID_7_1_EDX] = { 7, 1, CPUID_EDX}, 80 [CPUID_8000_0007_EDX] = {0x80000007, 0, CPUID_EDX}, 81 [CPUID_8000_0021_EAX] = {0x80000021, 0, CPUID_EAX}, 82 [CPUID_8000_0022_EAX] = {0x80000022, 0, CPUID_EAX}, 83 }; 84 85 /* 86 * Reverse CPUID and its derivatives can only be used for hardware-defined 87 * feature words, i.e. words whose bits directly correspond to a CPUID leaf. 88 * Retrieving a feature bit or masking guest CPUID from a Linux-defined word 89 * is nonsensical as the bit number/mask is an arbitrary software-defined value 90 * and can't be used by KVM to query/control guest capabilities. And obviously 91 * the leaf being queried must have an entry in the lookup table. 92 */ 93 static __always_inline void reverse_cpuid_check(unsigned int x86_leaf) 94 { 95 BUILD_BUG_ON(x86_leaf == CPUID_LNX_1); 96 BUILD_BUG_ON(x86_leaf == CPUID_LNX_2); 97 BUILD_BUG_ON(x86_leaf == CPUID_LNX_3); 98 BUILD_BUG_ON(x86_leaf == CPUID_LNX_4); 99 BUILD_BUG_ON(x86_leaf >= ARRAY_SIZE(reverse_cpuid)); 100 BUILD_BUG_ON(reverse_cpuid[x86_leaf].function == 0); 101 } 102 103 /* 104 * Translate feature bits that are scattered in the kernel's cpufeatures word 105 * into KVM feature words that align with hardware's definitions. 106 */ 107 static __always_inline u32 __feature_translate(int x86_feature) 108 { 109 if (x86_feature == X86_FEATURE_SGX1) 110 return KVM_X86_FEATURE_SGX1; 111 else if (x86_feature == X86_FEATURE_SGX2) 112 return KVM_X86_FEATURE_SGX2; 113 else if (x86_feature == X86_FEATURE_SGX_EDECCSSA) 114 return KVM_X86_FEATURE_SGX_EDECCSSA; 115 else if (x86_feature == X86_FEATURE_CONSTANT_TSC) 116 return KVM_X86_FEATURE_CONSTANT_TSC; 117 else if (x86_feature == X86_FEATURE_PERFMON_V2) 118 return KVM_X86_FEATURE_PERFMON_V2; 119 120 return x86_feature; 121 } 122 123 static __always_inline u32 __feature_leaf(int x86_feature) 124 { 125 return __feature_translate(x86_feature) / 32; 126 } 127 128 /* 129 * Retrieve the bit mask from an X86_FEATURE_* definition. Features contain 130 * the hardware defined bit number (stored in bits 4:0) and a software defined 131 * "word" (stored in bits 31:5). The word is used to index into arrays of 132 * bit masks that hold the per-cpu feature capabilities, e.g. this_cpu_has(). 133 */ 134 static __always_inline u32 __feature_bit(int x86_feature) 135 { 136 x86_feature = __feature_translate(x86_feature); 137 138 reverse_cpuid_check(x86_feature / 32); 139 return 1 << (x86_feature & 31); 140 } 141 142 #define feature_bit(name) __feature_bit(X86_FEATURE_##name) 143 144 static __always_inline struct cpuid_reg x86_feature_cpuid(unsigned int x86_feature) 145 { 146 unsigned int x86_leaf = __feature_leaf(x86_feature); 147 148 reverse_cpuid_check(x86_leaf); 149 return reverse_cpuid[x86_leaf]; 150 } 151 152 static __always_inline u32 *__cpuid_entry_get_reg(struct kvm_cpuid_entry2 *entry, 153 u32 reg) 154 { 155 switch (reg) { 156 case CPUID_EAX: 157 return &entry->eax; 158 case CPUID_EBX: 159 return &entry->ebx; 160 case CPUID_ECX: 161 return &entry->ecx; 162 case CPUID_EDX: 163 return &entry->edx; 164 default: 165 BUILD_BUG(); 166 return NULL; 167 } 168 } 169 170 static __always_inline u32 *cpuid_entry_get_reg(struct kvm_cpuid_entry2 *entry, 171 unsigned int x86_feature) 172 { 173 const struct cpuid_reg cpuid = x86_feature_cpuid(x86_feature); 174 175 return __cpuid_entry_get_reg(entry, cpuid.reg); 176 } 177 178 static __always_inline u32 cpuid_entry_get(struct kvm_cpuid_entry2 *entry, 179 unsigned int x86_feature) 180 { 181 u32 *reg = cpuid_entry_get_reg(entry, x86_feature); 182 183 return *reg & __feature_bit(x86_feature); 184 } 185 186 static __always_inline bool cpuid_entry_has(struct kvm_cpuid_entry2 *entry, 187 unsigned int x86_feature) 188 { 189 return cpuid_entry_get(entry, x86_feature); 190 } 191 192 static __always_inline void cpuid_entry_clear(struct kvm_cpuid_entry2 *entry, 193 unsigned int x86_feature) 194 { 195 u32 *reg = cpuid_entry_get_reg(entry, x86_feature); 196 197 *reg &= ~__feature_bit(x86_feature); 198 } 199 200 static __always_inline void cpuid_entry_set(struct kvm_cpuid_entry2 *entry, 201 unsigned int x86_feature) 202 { 203 u32 *reg = cpuid_entry_get_reg(entry, x86_feature); 204 205 *reg |= __feature_bit(x86_feature); 206 } 207 208 static __always_inline void cpuid_entry_change(struct kvm_cpuid_entry2 *entry, 209 unsigned int x86_feature, 210 bool set) 211 { 212 u32 *reg = cpuid_entry_get_reg(entry, x86_feature); 213 214 /* 215 * Open coded instead of using cpuid_entry_{clear,set}() to coerce the 216 * compiler into using CMOV instead of Jcc when possible. 217 */ 218 if (set) 219 *reg |= __feature_bit(x86_feature); 220 else 221 *reg &= ~__feature_bit(x86_feature); 222 } 223 224 #endif /* ARCH_X86_KVM_REVERSE_CPUID_H */ 225