xref: /openbmc/linux/arch/x86/kvm/pmu.h (revision 757cc3e9)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef __KVM_X86_PMU_H
3 #define __KVM_X86_PMU_H
4 
5 #define vcpu_to_pmu(vcpu) (&(vcpu)->arch.pmu)
6 #define pmu_to_vcpu(pmu)  (container_of((pmu), struct kvm_vcpu, arch.pmu))
7 #define pmc_to_pmu(pmc)   (&(pmc)->vcpu->arch.pmu)
8 
9 /* retrieve the 4 bits for EN and PMI out of IA32_FIXED_CTR_CTRL */
10 #define fixed_ctrl_field(ctrl_reg, idx) (((ctrl_reg) >> ((idx)*4)) & 0xf)
11 
12 #define VMWARE_BACKDOOR_PMC_HOST_TSC		0x10000
13 #define VMWARE_BACKDOOR_PMC_REAL_TIME		0x10001
14 #define VMWARE_BACKDOOR_PMC_APPARENT_TIME	0x10002
15 
16 struct kvm_event_hw_type_mapping {
17 	u8 eventsel;
18 	u8 unit_mask;
19 	unsigned event_type;
20 };
21 
22 struct kvm_pmu_ops {
23 	unsigned (*find_arch_event)(struct kvm_pmu *pmu, u8 event_select,
24 				    u8 unit_mask);
25 	unsigned (*find_fixed_event)(int idx);
26 	bool (*pmc_is_enabled)(struct kvm_pmc *pmc);
27 	struct kvm_pmc *(*pmc_idx_to_pmc)(struct kvm_pmu *pmu, int pmc_idx);
28 	struct kvm_pmc *(*rdpmc_ecx_to_pmc)(struct kvm_vcpu *vcpu,
29 		unsigned int idx, u64 *mask);
30 	struct kvm_pmc *(*msr_idx_to_pmc)(struct kvm_vcpu *vcpu, u32 msr);
31 	int (*is_valid_rdpmc_ecx)(struct kvm_vcpu *vcpu, unsigned int idx);
32 	bool (*is_valid_msr)(struct kvm_vcpu *vcpu, u32 msr);
33 	int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr, u64 *data);
34 	int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr_info);
35 	void (*refresh)(struct kvm_vcpu *vcpu);
36 	void (*init)(struct kvm_vcpu *vcpu);
37 	void (*reset)(struct kvm_vcpu *vcpu);
38 };
39 
40 static inline u64 pmc_bitmask(struct kvm_pmc *pmc)
41 {
42 	struct kvm_pmu *pmu = pmc_to_pmu(pmc);
43 
44 	return pmu->counter_bitmask[pmc->type];
45 }
46 
47 static inline u64 pmc_read_counter(struct kvm_pmc *pmc)
48 {
49 	u64 counter, enabled, running;
50 
51 	counter = pmc->counter;
52 	if (pmc->perf_event)
53 		counter += perf_event_read_value(pmc->perf_event,
54 						 &enabled, &running);
55 	/* FIXME: Scaling needed? */
56 	return counter & pmc_bitmask(pmc);
57 }
58 
59 static inline void pmc_release_perf_event(struct kvm_pmc *pmc)
60 {
61 	if (pmc->perf_event) {
62 		perf_event_release_kernel(pmc->perf_event);
63 		pmc->perf_event = NULL;
64 		pmc->current_config = 0;
65 		pmc_to_pmu(pmc)->event_count--;
66 	}
67 }
68 
69 static inline void pmc_stop_counter(struct kvm_pmc *pmc)
70 {
71 	if (pmc->perf_event) {
72 		pmc->counter = pmc_read_counter(pmc);
73 		pmc_release_perf_event(pmc);
74 	}
75 }
76 
77 static inline bool pmc_is_gp(struct kvm_pmc *pmc)
78 {
79 	return pmc->type == KVM_PMC_GP;
80 }
81 
82 static inline bool pmc_is_fixed(struct kvm_pmc *pmc)
83 {
84 	return pmc->type == KVM_PMC_FIXED;
85 }
86 
87 static inline bool pmc_is_enabled(struct kvm_pmc *pmc)
88 {
89 	return kvm_x86_ops->pmu_ops->pmc_is_enabled(pmc);
90 }
91 
92 static inline bool kvm_valid_perf_global_ctrl(struct kvm_pmu *pmu,
93 						 u64 data)
94 {
95 	return !(pmu->global_ctrl_mask & data);
96 }
97 
98 /* returns general purpose PMC with the specified MSR. Note that it can be
99  * used for both PERFCTRn and EVNTSELn; that is why it accepts base as a
100  * paramenter to tell them apart.
101  */
102 static inline struct kvm_pmc *get_gp_pmc(struct kvm_pmu *pmu, u32 msr,
103 					 u32 base)
104 {
105 	if (msr >= base && msr < base + pmu->nr_arch_gp_counters)
106 		return &pmu->gp_counters[msr - base];
107 
108 	return NULL;
109 }
110 
111 /* returns fixed PMC with the specified MSR */
112 static inline struct kvm_pmc *get_fixed_pmc(struct kvm_pmu *pmu, u32 msr)
113 {
114 	int base = MSR_CORE_PERF_FIXED_CTR0;
115 
116 	if (msr >= base && msr < base + pmu->nr_arch_fixed_counters)
117 		return &pmu->fixed_counters[msr - base];
118 
119 	return NULL;
120 }
121 
122 void reprogram_gp_counter(struct kvm_pmc *pmc, u64 eventsel);
123 void reprogram_fixed_counter(struct kvm_pmc *pmc, u8 ctrl, int fixed_idx);
124 void reprogram_counter(struct kvm_pmu *pmu, int pmc_idx);
125 
126 void kvm_pmu_deliver_pmi(struct kvm_vcpu *vcpu);
127 void kvm_pmu_handle_event(struct kvm_vcpu *vcpu);
128 int kvm_pmu_rdpmc(struct kvm_vcpu *vcpu, unsigned pmc, u64 *data);
129 int kvm_pmu_is_valid_rdpmc_ecx(struct kvm_vcpu *vcpu, unsigned int idx);
130 bool kvm_pmu_is_valid_msr(struct kvm_vcpu *vcpu, u32 msr);
131 int kvm_pmu_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *data);
132 int kvm_pmu_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info);
133 void kvm_pmu_refresh(struct kvm_vcpu *vcpu);
134 void kvm_pmu_reset(struct kvm_vcpu *vcpu);
135 void kvm_pmu_init(struct kvm_vcpu *vcpu);
136 void kvm_pmu_cleanup(struct kvm_vcpu *vcpu);
137 void kvm_pmu_destroy(struct kvm_vcpu *vcpu);
138 int kvm_vm_ioctl_set_pmu_event_filter(struct kvm *kvm, void __user *argp);
139 
140 bool is_vmware_backdoor_pmc(u32 pmc_idx);
141 
142 extern struct kvm_pmu_ops intel_pmu_ops;
143 extern struct kvm_pmu_ops amd_pmu_ops;
144 #endif /* __KVM_X86_PMU_H */
145