1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef __KVM_X86_PMU_H 3 #define __KVM_X86_PMU_H 4 5 #define vcpu_to_pmu(vcpu) (&(vcpu)->arch.pmu) 6 #define pmu_to_vcpu(pmu) (container_of((pmu), struct kvm_vcpu, arch.pmu)) 7 #define pmc_to_pmu(pmc) (&(pmc)->vcpu->arch.pmu) 8 9 /* retrieve the 4 bits for EN and PMI out of IA32_FIXED_CTR_CTRL */ 10 #define fixed_ctrl_field(ctrl_reg, idx) (((ctrl_reg) >> ((idx)*4)) & 0xf) 11 12 #define VMWARE_BACKDOOR_PMC_HOST_TSC 0x10000 13 #define VMWARE_BACKDOOR_PMC_REAL_TIME 0x10001 14 #define VMWARE_BACKDOOR_PMC_APPARENT_TIME 0x10002 15 16 struct kvm_event_hw_type_mapping { 17 u8 eventsel; 18 u8 unit_mask; 19 unsigned event_type; 20 }; 21 22 struct kvm_pmu_ops { 23 unsigned (*find_arch_event)(struct kvm_pmu *pmu, u8 event_select, 24 u8 unit_mask); 25 unsigned (*find_fixed_event)(int idx); 26 bool (*pmc_is_enabled)(struct kvm_pmc *pmc); 27 struct kvm_pmc *(*pmc_idx_to_pmc)(struct kvm_pmu *pmu, int pmc_idx); 28 struct kvm_pmc *(*msr_idx_to_pmc)(struct kvm_vcpu *vcpu, unsigned idx); 29 int (*is_valid_msr_idx)(struct kvm_vcpu *vcpu, unsigned idx); 30 bool (*is_valid_msr)(struct kvm_vcpu *vcpu, u32 msr); 31 int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr, u64 *data); 32 int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr_info); 33 void (*refresh)(struct kvm_vcpu *vcpu); 34 void (*init)(struct kvm_vcpu *vcpu); 35 void (*reset)(struct kvm_vcpu *vcpu); 36 }; 37 38 static inline u64 pmc_bitmask(struct kvm_pmc *pmc) 39 { 40 struct kvm_pmu *pmu = pmc_to_pmu(pmc); 41 42 return pmu->counter_bitmask[pmc->type]; 43 } 44 45 static inline u64 pmc_read_counter(struct kvm_pmc *pmc) 46 { 47 u64 counter, enabled, running; 48 49 counter = pmc->counter; 50 if (pmc->perf_event) 51 counter += perf_event_read_value(pmc->perf_event, 52 &enabled, &running); 53 /* FIXME: Scaling needed? */ 54 return counter & pmc_bitmask(pmc); 55 } 56 57 static inline void pmc_stop_counter(struct kvm_pmc *pmc) 58 { 59 if (pmc->perf_event) { 60 pmc->counter = pmc_read_counter(pmc); 61 perf_event_release_kernel(pmc->perf_event); 62 pmc->perf_event = NULL; 63 } 64 } 65 66 static inline bool pmc_is_gp(struct kvm_pmc *pmc) 67 { 68 return pmc->type == KVM_PMC_GP; 69 } 70 71 static inline bool pmc_is_fixed(struct kvm_pmc *pmc) 72 { 73 return pmc->type == KVM_PMC_FIXED; 74 } 75 76 static inline bool pmc_is_enabled(struct kvm_pmc *pmc) 77 { 78 return kvm_x86_ops->pmu_ops->pmc_is_enabled(pmc); 79 } 80 81 /* returns general purpose PMC with the specified MSR. Note that it can be 82 * used for both PERFCTRn and EVNTSELn; that is why it accepts base as a 83 * paramenter to tell them apart. 84 */ 85 static inline struct kvm_pmc *get_gp_pmc(struct kvm_pmu *pmu, u32 msr, 86 u32 base) 87 { 88 if (msr >= base && msr < base + pmu->nr_arch_gp_counters) 89 return &pmu->gp_counters[msr - base]; 90 91 return NULL; 92 } 93 94 /* returns fixed PMC with the specified MSR */ 95 static inline struct kvm_pmc *get_fixed_pmc(struct kvm_pmu *pmu, u32 msr) 96 { 97 int base = MSR_CORE_PERF_FIXED_CTR0; 98 99 if (msr >= base && msr < base + pmu->nr_arch_fixed_counters) 100 return &pmu->fixed_counters[msr - base]; 101 102 return NULL; 103 } 104 105 void reprogram_gp_counter(struct kvm_pmc *pmc, u64 eventsel); 106 void reprogram_fixed_counter(struct kvm_pmc *pmc, u8 ctrl, int fixed_idx); 107 void reprogram_counter(struct kvm_pmu *pmu, int pmc_idx); 108 109 void kvm_pmu_deliver_pmi(struct kvm_vcpu *vcpu); 110 void kvm_pmu_handle_event(struct kvm_vcpu *vcpu); 111 int kvm_pmu_rdpmc(struct kvm_vcpu *vcpu, unsigned pmc, u64 *data); 112 int kvm_pmu_is_valid_msr_idx(struct kvm_vcpu *vcpu, unsigned idx); 113 bool kvm_pmu_is_valid_msr(struct kvm_vcpu *vcpu, u32 msr); 114 int kvm_pmu_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *data); 115 int kvm_pmu_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info); 116 void kvm_pmu_refresh(struct kvm_vcpu *vcpu); 117 void kvm_pmu_reset(struct kvm_vcpu *vcpu); 118 void kvm_pmu_init(struct kvm_vcpu *vcpu); 119 void kvm_pmu_destroy(struct kvm_vcpu *vcpu); 120 121 bool is_vmware_backdoor_pmc(u32 pmc_idx); 122 123 extern struct kvm_pmu_ops intel_pmu_ops; 124 extern struct kvm_pmu_ops amd_pmu_ops; 125 #endif /* __KVM_X86_PMU_H */ 126