xref: /openbmc/linux/arch/x86/kvm/irq_comm.c (revision 4e1a33b1)
1 /*
2  * irq_comm.c: Common API for in kernel interrupt controller
3  * Copyright (c) 2007, Intel Corporation.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms and conditions of the GNU General Public License,
7  * version 2, as published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12  * more details.
13  *
14  * You should have received a copy of the GNU General Public License along with
15  * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
16  * Place - Suite 330, Boston, MA 02111-1307 USA.
17  * Authors:
18  *   Yaozu (Eddie) Dong <Eddie.dong@intel.com>
19  *
20  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
21  */
22 
23 #include <linux/kvm_host.h>
24 #include <linux/slab.h>
25 #include <linux/export.h>
26 #include <trace/events/kvm.h>
27 
28 #include <asm/msidef.h>
29 
30 #include "irq.h"
31 
32 #include "ioapic.h"
33 
34 #include "lapic.h"
35 
36 #include "hyperv.h"
37 #include "x86.h"
38 
39 static int kvm_set_pic_irq(struct kvm_kernel_irq_routing_entry *e,
40 			   struct kvm *kvm, int irq_source_id, int level,
41 			   bool line_status)
42 {
43 	struct kvm_pic *pic = pic_irqchip(kvm);
44 	return kvm_pic_set_irq(pic, e->irqchip.pin, irq_source_id, level);
45 }
46 
47 static int kvm_set_ioapic_irq(struct kvm_kernel_irq_routing_entry *e,
48 			      struct kvm *kvm, int irq_source_id, int level,
49 			      bool line_status)
50 {
51 	struct kvm_ioapic *ioapic = kvm->arch.vioapic;
52 	return kvm_ioapic_set_irq(ioapic, e->irqchip.pin, irq_source_id, level,
53 				line_status);
54 }
55 
56 int kvm_irq_delivery_to_apic(struct kvm *kvm, struct kvm_lapic *src,
57 		struct kvm_lapic_irq *irq, struct dest_map *dest_map)
58 {
59 	int i, r = -1;
60 	struct kvm_vcpu *vcpu, *lowest = NULL;
61 	unsigned long dest_vcpu_bitmap[BITS_TO_LONGS(KVM_MAX_VCPUS)];
62 	unsigned int dest_vcpus = 0;
63 
64 	if (irq->dest_mode == 0 && irq->dest_id == 0xff &&
65 			kvm_lowest_prio_delivery(irq)) {
66 		printk(KERN_INFO "kvm: apic: phys broadcast and lowest prio\n");
67 		irq->delivery_mode = APIC_DM_FIXED;
68 	}
69 
70 	if (kvm_irq_delivery_to_apic_fast(kvm, src, irq, &r, dest_map))
71 		return r;
72 
73 	memset(dest_vcpu_bitmap, 0, sizeof(dest_vcpu_bitmap));
74 
75 	kvm_for_each_vcpu(i, vcpu, kvm) {
76 		if (!kvm_apic_present(vcpu))
77 			continue;
78 
79 		if (!kvm_apic_match_dest(vcpu, src, irq->shorthand,
80 					irq->dest_id, irq->dest_mode))
81 			continue;
82 
83 		if (!kvm_lowest_prio_delivery(irq)) {
84 			if (r < 0)
85 				r = 0;
86 			r += kvm_apic_set_irq(vcpu, irq, dest_map);
87 		} else if (kvm_lapic_enabled(vcpu)) {
88 			if (!kvm_vector_hashing_enabled()) {
89 				if (!lowest)
90 					lowest = vcpu;
91 				else if (kvm_apic_compare_prio(vcpu, lowest) < 0)
92 					lowest = vcpu;
93 			} else {
94 				__set_bit(i, dest_vcpu_bitmap);
95 				dest_vcpus++;
96 			}
97 		}
98 	}
99 
100 	if (dest_vcpus != 0) {
101 		int idx = kvm_vector_to_index(irq->vector, dest_vcpus,
102 					dest_vcpu_bitmap, KVM_MAX_VCPUS);
103 
104 		lowest = kvm_get_vcpu(kvm, idx);
105 	}
106 
107 	if (lowest)
108 		r = kvm_apic_set_irq(lowest, irq, dest_map);
109 
110 	return r;
111 }
112 
113 void kvm_set_msi_irq(struct kvm *kvm, struct kvm_kernel_irq_routing_entry *e,
114 		     struct kvm_lapic_irq *irq)
115 {
116 	trace_kvm_msi_set_irq(e->msi.address_lo | (kvm->arch.x2apic_format ?
117 	                                     (u64)e->msi.address_hi << 32 : 0),
118 	                      e->msi.data);
119 
120 	irq->dest_id = (e->msi.address_lo &
121 			MSI_ADDR_DEST_ID_MASK) >> MSI_ADDR_DEST_ID_SHIFT;
122 	if (kvm->arch.x2apic_format)
123 		irq->dest_id |= MSI_ADDR_EXT_DEST_ID(e->msi.address_hi);
124 	irq->vector = (e->msi.data &
125 			MSI_DATA_VECTOR_MASK) >> MSI_DATA_VECTOR_SHIFT;
126 	irq->dest_mode = (1 << MSI_ADDR_DEST_MODE_SHIFT) & e->msi.address_lo;
127 	irq->trig_mode = (1 << MSI_DATA_TRIGGER_SHIFT) & e->msi.data;
128 	irq->delivery_mode = e->msi.data & 0x700;
129 	irq->msi_redir_hint = ((e->msi.address_lo
130 		& MSI_ADDR_REDIRECTION_LOWPRI) > 0);
131 	irq->level = 1;
132 	irq->shorthand = 0;
133 }
134 EXPORT_SYMBOL_GPL(kvm_set_msi_irq);
135 
136 static inline bool kvm_msi_route_invalid(struct kvm *kvm,
137 		struct kvm_kernel_irq_routing_entry *e)
138 {
139 	return kvm->arch.x2apic_format && (e->msi.address_hi & 0xff);
140 }
141 
142 int kvm_set_msi(struct kvm_kernel_irq_routing_entry *e,
143 		struct kvm *kvm, int irq_source_id, int level, bool line_status)
144 {
145 	struct kvm_lapic_irq irq;
146 
147 	if (kvm_msi_route_invalid(kvm, e))
148 		return -EINVAL;
149 
150 	if (!level)
151 		return -1;
152 
153 	kvm_set_msi_irq(kvm, e, &irq);
154 
155 	return kvm_irq_delivery_to_apic(kvm, NULL, &irq, NULL);
156 }
157 
158 
159 static int kvm_hv_set_sint(struct kvm_kernel_irq_routing_entry *e,
160 		    struct kvm *kvm, int irq_source_id, int level,
161 		    bool line_status)
162 {
163 	if (!level)
164 		return -1;
165 
166 	return kvm_hv_synic_set_irq(kvm, e->hv_sint.vcpu, e->hv_sint.sint);
167 }
168 
169 int kvm_arch_set_irq_inatomic(struct kvm_kernel_irq_routing_entry *e,
170 			      struct kvm *kvm, int irq_source_id, int level,
171 			      bool line_status)
172 {
173 	struct kvm_lapic_irq irq;
174 	int r;
175 
176 	switch (e->type) {
177 	case KVM_IRQ_ROUTING_HV_SINT:
178 		return kvm_hv_set_sint(e, kvm, irq_source_id, level,
179 				       line_status);
180 
181 	case KVM_IRQ_ROUTING_MSI:
182 		if (kvm_msi_route_invalid(kvm, e))
183 			return -EINVAL;
184 
185 		kvm_set_msi_irq(kvm, e, &irq);
186 
187 		if (kvm_irq_delivery_to_apic_fast(kvm, NULL, &irq, &r, NULL))
188 			return r;
189 		break;
190 
191 	default:
192 		break;
193 	}
194 
195 	return -EWOULDBLOCK;
196 }
197 
198 int kvm_request_irq_source_id(struct kvm *kvm)
199 {
200 	unsigned long *bitmap = &kvm->arch.irq_sources_bitmap;
201 	int irq_source_id;
202 
203 	mutex_lock(&kvm->irq_lock);
204 	irq_source_id = find_first_zero_bit(bitmap, BITS_PER_LONG);
205 
206 	if (irq_source_id >= BITS_PER_LONG) {
207 		printk(KERN_WARNING "kvm: exhaust allocatable IRQ sources!\n");
208 		irq_source_id = -EFAULT;
209 		goto unlock;
210 	}
211 
212 	ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID);
213 	ASSERT(irq_source_id != KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID);
214 	set_bit(irq_source_id, bitmap);
215 unlock:
216 	mutex_unlock(&kvm->irq_lock);
217 
218 	return irq_source_id;
219 }
220 
221 void kvm_free_irq_source_id(struct kvm *kvm, int irq_source_id)
222 {
223 	ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID);
224 	ASSERT(irq_source_id != KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID);
225 
226 	mutex_lock(&kvm->irq_lock);
227 	if (irq_source_id < 0 ||
228 	    irq_source_id >= BITS_PER_LONG) {
229 		printk(KERN_ERR "kvm: IRQ source ID out of range!\n");
230 		goto unlock;
231 	}
232 	clear_bit(irq_source_id, &kvm->arch.irq_sources_bitmap);
233 	if (!ioapic_in_kernel(kvm))
234 		goto unlock;
235 
236 	kvm_ioapic_clear_all(kvm->arch.vioapic, irq_source_id);
237 	kvm_pic_clear_all(pic_irqchip(kvm), irq_source_id);
238 unlock:
239 	mutex_unlock(&kvm->irq_lock);
240 }
241 
242 void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq,
243 				    struct kvm_irq_mask_notifier *kimn)
244 {
245 	mutex_lock(&kvm->irq_lock);
246 	kimn->irq = irq;
247 	hlist_add_head_rcu(&kimn->link, &kvm->arch.mask_notifier_list);
248 	mutex_unlock(&kvm->irq_lock);
249 }
250 
251 void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq,
252 				      struct kvm_irq_mask_notifier *kimn)
253 {
254 	mutex_lock(&kvm->irq_lock);
255 	hlist_del_rcu(&kimn->link);
256 	mutex_unlock(&kvm->irq_lock);
257 	synchronize_srcu(&kvm->irq_srcu);
258 }
259 
260 void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin,
261 			     bool mask)
262 {
263 	struct kvm_irq_mask_notifier *kimn;
264 	int idx, gsi;
265 
266 	idx = srcu_read_lock(&kvm->irq_srcu);
267 	gsi = kvm_irq_map_chip_pin(kvm, irqchip, pin);
268 	if (gsi != -1)
269 		hlist_for_each_entry_rcu(kimn, &kvm->arch.mask_notifier_list, link)
270 			if (kimn->irq == gsi)
271 				kimn->func(kimn, mask);
272 	srcu_read_unlock(&kvm->irq_srcu, idx);
273 }
274 
275 int kvm_set_routing_entry(struct kvm *kvm,
276 			  struct kvm_kernel_irq_routing_entry *e,
277 			  const struct kvm_irq_routing_entry *ue)
278 {
279 	int r = -EINVAL;
280 	int delta;
281 	unsigned max_pin;
282 
283 	switch (ue->type) {
284 	case KVM_IRQ_ROUTING_IRQCHIP:
285 		delta = 0;
286 		switch (ue->u.irqchip.irqchip) {
287 		case KVM_IRQCHIP_PIC_SLAVE:
288 			delta = 8;
289 			/* fall through */
290 		case KVM_IRQCHIP_PIC_MASTER:
291 			if (!pic_in_kernel(kvm))
292 				goto out;
293 
294 			e->set = kvm_set_pic_irq;
295 			max_pin = PIC_NUM_PINS;
296 			break;
297 		case KVM_IRQCHIP_IOAPIC:
298 			if (!ioapic_in_kernel(kvm))
299 				goto out;
300 
301 			max_pin = KVM_IOAPIC_NUM_PINS;
302 			e->set = kvm_set_ioapic_irq;
303 			break;
304 		default:
305 			goto out;
306 		}
307 		e->irqchip.irqchip = ue->u.irqchip.irqchip;
308 		e->irqchip.pin = ue->u.irqchip.pin + delta;
309 		if (e->irqchip.pin >= max_pin)
310 			goto out;
311 		break;
312 	case KVM_IRQ_ROUTING_MSI:
313 		e->set = kvm_set_msi;
314 		e->msi.address_lo = ue->u.msi.address_lo;
315 		e->msi.address_hi = ue->u.msi.address_hi;
316 		e->msi.data = ue->u.msi.data;
317 
318 		if (kvm_msi_route_invalid(kvm, e))
319 			goto out;
320 		break;
321 	case KVM_IRQ_ROUTING_HV_SINT:
322 		e->set = kvm_hv_set_sint;
323 		e->hv_sint.vcpu = ue->u.hv_sint.vcpu;
324 		e->hv_sint.sint = ue->u.hv_sint.sint;
325 		break;
326 	default:
327 		goto out;
328 	}
329 
330 	r = 0;
331 out:
332 	return r;
333 }
334 
335 bool kvm_intr_is_single_vcpu(struct kvm *kvm, struct kvm_lapic_irq *irq,
336 			     struct kvm_vcpu **dest_vcpu)
337 {
338 	int i, r = 0;
339 	struct kvm_vcpu *vcpu;
340 
341 	if (kvm_intr_is_single_vcpu_fast(kvm, irq, dest_vcpu))
342 		return true;
343 
344 	kvm_for_each_vcpu(i, vcpu, kvm) {
345 		if (!kvm_apic_present(vcpu))
346 			continue;
347 
348 		if (!kvm_apic_match_dest(vcpu, NULL, irq->shorthand,
349 					irq->dest_id, irq->dest_mode))
350 			continue;
351 
352 		if (++r == 2)
353 			return false;
354 
355 		*dest_vcpu = vcpu;
356 	}
357 
358 	return r == 1;
359 }
360 EXPORT_SYMBOL_GPL(kvm_intr_is_single_vcpu);
361 
362 #define IOAPIC_ROUTING_ENTRY(irq) \
363 	{ .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP,	\
364 	  .u.irqchip = { .irqchip = KVM_IRQCHIP_IOAPIC, .pin = (irq) } }
365 #define ROUTING_ENTRY1(irq) IOAPIC_ROUTING_ENTRY(irq)
366 
367 #define PIC_ROUTING_ENTRY(irq) \
368 	{ .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP,	\
369 	  .u.irqchip = { .irqchip = SELECT_PIC(irq), .pin = (irq) % 8 } }
370 #define ROUTING_ENTRY2(irq) \
371 	IOAPIC_ROUTING_ENTRY(irq), PIC_ROUTING_ENTRY(irq)
372 
373 static const struct kvm_irq_routing_entry default_routing[] = {
374 	ROUTING_ENTRY2(0), ROUTING_ENTRY2(1),
375 	ROUTING_ENTRY2(2), ROUTING_ENTRY2(3),
376 	ROUTING_ENTRY2(4), ROUTING_ENTRY2(5),
377 	ROUTING_ENTRY2(6), ROUTING_ENTRY2(7),
378 	ROUTING_ENTRY2(8), ROUTING_ENTRY2(9),
379 	ROUTING_ENTRY2(10), ROUTING_ENTRY2(11),
380 	ROUTING_ENTRY2(12), ROUTING_ENTRY2(13),
381 	ROUTING_ENTRY2(14), ROUTING_ENTRY2(15),
382 	ROUTING_ENTRY1(16), ROUTING_ENTRY1(17),
383 	ROUTING_ENTRY1(18), ROUTING_ENTRY1(19),
384 	ROUTING_ENTRY1(20), ROUTING_ENTRY1(21),
385 	ROUTING_ENTRY1(22), ROUTING_ENTRY1(23),
386 };
387 
388 int kvm_setup_default_irq_routing(struct kvm *kvm)
389 {
390 	return kvm_set_irq_routing(kvm, default_routing,
391 				   ARRAY_SIZE(default_routing), 0);
392 }
393 
394 static const struct kvm_irq_routing_entry empty_routing[] = {};
395 
396 int kvm_setup_empty_irq_routing(struct kvm *kvm)
397 {
398 	return kvm_set_irq_routing(kvm, empty_routing, 0, 0);
399 }
400 
401 void kvm_arch_post_irq_routing_update(struct kvm *kvm)
402 {
403 	if (!irqchip_split(kvm))
404 		return;
405 	kvm_make_scan_ioapic_request(kvm);
406 }
407 
408 void kvm_scan_ioapic_routes(struct kvm_vcpu *vcpu,
409 			    ulong *ioapic_handled_vectors)
410 {
411 	struct kvm *kvm = vcpu->kvm;
412 	struct kvm_kernel_irq_routing_entry *entry;
413 	struct kvm_irq_routing_table *table;
414 	u32 i, nr_ioapic_pins;
415 	int idx;
416 
417 	idx = srcu_read_lock(&kvm->irq_srcu);
418 	table = srcu_dereference(kvm->irq_routing, &kvm->irq_srcu);
419 	nr_ioapic_pins = min_t(u32, table->nr_rt_entries,
420 			       kvm->arch.nr_reserved_ioapic_pins);
421 	for (i = 0; i < nr_ioapic_pins; ++i) {
422 		hlist_for_each_entry(entry, &table->map[i], link) {
423 			struct kvm_lapic_irq irq;
424 
425 			if (entry->type != KVM_IRQ_ROUTING_MSI)
426 				continue;
427 
428 			kvm_set_msi_irq(vcpu->kvm, entry, &irq);
429 
430 			if (irq.level && kvm_apic_match_dest(vcpu, NULL, 0,
431 						irq.dest_id, irq.dest_mode))
432 				__set_bit(irq.vector, ioapic_handled_vectors);
433 		}
434 	}
435 	srcu_read_unlock(&kvm->irq_srcu, idx);
436 }
437 
438 void kvm_arch_irq_routing_update(struct kvm *kvm)
439 {
440 	kvm_hv_irq_routing_update(kvm);
441 }
442