1 /* 2 * irq.h: in kernel interrupt controller related definitions 3 * Copyright (c) 2007, Intel Corporation. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms and conditions of the GNU General Public License, 7 * version 2, as published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * You should have received a copy of the GNU General Public License along with 15 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple 16 * Place - Suite 330, Boston, MA 02111-1307 USA. 17 * Authors: 18 * Yaozu (Eddie) Dong <Eddie.dong@intel.com> 19 * 20 */ 21 22 #ifndef __IRQ_H 23 #define __IRQ_H 24 25 #include <linux/mm_types.h> 26 #include <linux/hrtimer.h> 27 #include <linux/kvm_host.h> 28 #include <linux/spinlock.h> 29 30 #include <kvm/iodev.h> 31 #include "ioapic.h" 32 #include "lapic.h" 33 34 #define PIC_NUM_PINS 16 35 #define SELECT_PIC(irq) \ 36 ((irq) < 8 ? KVM_IRQCHIP_PIC_MASTER : KVM_IRQCHIP_PIC_SLAVE) 37 38 struct kvm; 39 struct kvm_vcpu; 40 41 struct kvm_kpic_state { 42 u8 last_irr; /* edge detection */ 43 u8 irr; /* interrupt request register */ 44 u8 imr; /* interrupt mask register */ 45 u8 isr; /* interrupt service register */ 46 u8 priority_add; /* highest irq priority */ 47 u8 irq_base; 48 u8 read_reg_select; 49 u8 poll; 50 u8 special_mask; 51 u8 init_state; 52 u8 auto_eoi; 53 u8 rotate_on_auto_eoi; 54 u8 special_fully_nested_mode; 55 u8 init4; /* true if 4 byte init */ 56 u8 elcr; /* PIIX edge/trigger selection */ 57 u8 elcr_mask; 58 u8 isr_ack; /* interrupt ack detection */ 59 struct kvm_pic *pics_state; 60 }; 61 62 struct kvm_pic { 63 spinlock_t lock; 64 bool wakeup_needed; 65 unsigned pending_acks; 66 struct kvm *kvm; 67 struct kvm_kpic_state pics[2]; /* 0 is master pic, 1 is slave pic */ 68 int output; /* intr from master PIC */ 69 struct kvm_io_device dev_master; 70 struct kvm_io_device dev_slave; 71 struct kvm_io_device dev_eclr; 72 void (*ack_notifier)(void *opaque, int irq); 73 unsigned long irq_states[PIC_NUM_PINS]; 74 }; 75 76 int kvm_pic_init(struct kvm *kvm); 77 void kvm_pic_destroy(struct kvm *kvm); 78 int kvm_pic_read_irq(struct kvm *kvm); 79 void kvm_pic_update_irq(struct kvm_pic *s); 80 81 static inline int pic_in_kernel(struct kvm *kvm) 82 { 83 int mode = kvm->arch.irqchip_mode; 84 85 /* Matches smp_wmb() when setting irqchip_mode */ 86 smp_rmb(); 87 return mode == KVM_IRQCHIP_KERNEL; 88 } 89 90 static inline int irqchip_split(struct kvm *kvm) 91 { 92 int mode = kvm->arch.irqchip_mode; 93 94 /* Matches smp_wmb() when setting irqchip_mode */ 95 smp_rmb(); 96 return mode == KVM_IRQCHIP_SPLIT; 97 } 98 99 static inline int irqchip_kernel(struct kvm *kvm) 100 { 101 int mode = kvm->arch.irqchip_mode; 102 103 /* Matches smp_wmb() when setting irqchip_mode */ 104 smp_rmb(); 105 return mode == KVM_IRQCHIP_KERNEL; 106 } 107 108 static inline int irqchip_in_kernel(struct kvm *kvm) 109 { 110 int mode = kvm->arch.irqchip_mode; 111 112 /* Matches smp_wmb() when setting irqchip_mode */ 113 smp_rmb(); 114 return mode != KVM_IRQCHIP_NONE; 115 } 116 117 bool kvm_arch_irqfd_allowed(struct kvm *kvm, struct kvm_irqfd *args); 118 void kvm_inject_pending_timer_irqs(struct kvm_vcpu *vcpu); 119 void kvm_inject_apic_timer_irqs(struct kvm_vcpu *vcpu); 120 void kvm_apic_nmi_wd_deliver(struct kvm_vcpu *vcpu); 121 void __kvm_migrate_apic_timer(struct kvm_vcpu *vcpu); 122 void __kvm_migrate_pit_timer(struct kvm_vcpu *vcpu); 123 void __kvm_migrate_timers(struct kvm_vcpu *vcpu); 124 125 int apic_has_pending_timer(struct kvm_vcpu *vcpu); 126 127 int kvm_setup_default_irq_routing(struct kvm *kvm); 128 int kvm_setup_empty_irq_routing(struct kvm *kvm); 129 130 #endif 131