xref: /openbmc/linux/arch/x86/kvm/irq.c (revision 7af6fbdd)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * irq.c: API for in kernel interrupt controller
4  * Copyright (c) 2007, Intel Corporation.
5  * Copyright 2009 Red Hat, Inc. and/or its affiliates.
6  *
7  * Authors:
8  *   Yaozu (Eddie) Dong <Eddie.dong@intel.com>
9  */
10 
11 #include <linux/export.h>
12 #include <linux/kvm_host.h>
13 
14 #include "irq.h"
15 #include "i8254.h"
16 #include "x86.h"
17 
18 /*
19  * check if there are pending timer events
20  * to be processed.
21  */
22 int kvm_cpu_has_pending_timer(struct kvm_vcpu *vcpu)
23 {
24 	if (lapic_in_kernel(vcpu))
25 		return apic_has_pending_timer(vcpu);
26 
27 	return 0;
28 }
29 EXPORT_SYMBOL(kvm_cpu_has_pending_timer);
30 
31 /*
32  * check if there is a pending userspace external interrupt
33  */
34 static int pending_userspace_extint(struct kvm_vcpu *v)
35 {
36 	return v->arch.pending_external_vector != -1;
37 }
38 
39 /*
40  * check if there is pending interrupt from
41  * non-APIC source without intack.
42  */
43 static int kvm_cpu_has_extint(struct kvm_vcpu *v)
44 {
45 	u8 accept = kvm_apic_accept_pic_intr(v);
46 
47 	if (accept) {
48 		if (irqchip_split(v->kvm))
49 			return pending_userspace_extint(v);
50 		else
51 			return v->kvm->arch.vpic->output;
52 	} else
53 		return 0;
54 }
55 
56 /*
57  * check if there is injectable interrupt:
58  * when virtual interrupt delivery enabled,
59  * interrupt from apic will handled by hardware,
60  * we don't need to check it here.
61  */
62 int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v)
63 {
64 	/*
65 	 * FIXME: interrupt.injected represents an interrupt that it's
66 	 * side-effects have already been applied (e.g. bit from IRR
67 	 * already moved to ISR). Therefore, it is incorrect to rely
68 	 * on interrupt.injected to know if there is a pending
69 	 * interrupt in the user-mode LAPIC.
70 	 * This leads to nVMX/nSVM not be able to distinguish
71 	 * if it should exit from L2 to L1 on EXTERNAL_INTERRUPT on
72 	 * pending interrupt or should re-inject an injected
73 	 * interrupt.
74 	 */
75 	if (!lapic_in_kernel(v))
76 		return v->arch.interrupt.injected;
77 
78 	if (kvm_cpu_has_extint(v))
79 		return 1;
80 
81 	if (!is_guest_mode(v) && kvm_vcpu_apicv_active(v))
82 		return 0;
83 
84 	return kvm_apic_has_interrupt(v) != -1; /* LAPIC */
85 }
86 EXPORT_SYMBOL_GPL(kvm_cpu_has_injectable_intr);
87 
88 /*
89  * check if there is pending interrupt without
90  * intack.
91  */
92 int kvm_cpu_has_interrupt(struct kvm_vcpu *v)
93 {
94 	/*
95 	 * FIXME: interrupt.injected represents an interrupt that it's
96 	 * side-effects have already been applied (e.g. bit from IRR
97 	 * already moved to ISR). Therefore, it is incorrect to rely
98 	 * on interrupt.injected to know if there is a pending
99 	 * interrupt in the user-mode LAPIC.
100 	 * This leads to nVMX/nSVM not be able to distinguish
101 	 * if it should exit from L2 to L1 on EXTERNAL_INTERRUPT on
102 	 * pending interrupt or should re-inject an injected
103 	 * interrupt.
104 	 */
105 	if (!lapic_in_kernel(v))
106 		return v->arch.interrupt.injected;
107 
108 	if (kvm_cpu_has_extint(v))
109 		return 1;
110 
111 	return kvm_apic_has_interrupt(v) != -1;	/* LAPIC */
112 }
113 EXPORT_SYMBOL_GPL(kvm_cpu_has_interrupt);
114 
115 /*
116  * Read pending interrupt(from non-APIC source)
117  * vector and intack.
118  */
119 static int kvm_cpu_get_extint(struct kvm_vcpu *v)
120 {
121 	if (kvm_cpu_has_extint(v)) {
122 		if (irqchip_split(v->kvm)) {
123 			int vector = v->arch.pending_external_vector;
124 
125 			v->arch.pending_external_vector = -1;
126 			return vector;
127 		} else
128 			return kvm_pic_read_irq(v->kvm); /* PIC */
129 	} else
130 		return -1;
131 }
132 
133 /*
134  * Read pending interrupt vector and intack.
135  */
136 int kvm_cpu_get_interrupt(struct kvm_vcpu *v)
137 {
138 	int vector;
139 
140 	if (!lapic_in_kernel(v))
141 		return v->arch.interrupt.nr;
142 
143 	vector = kvm_cpu_get_extint(v);
144 
145 	if (vector != -1)
146 		return vector;			/* PIC */
147 
148 	return kvm_get_apic_interrupt(v);	/* APIC */
149 }
150 EXPORT_SYMBOL_GPL(kvm_cpu_get_interrupt);
151 
152 void kvm_inject_pending_timer_irqs(struct kvm_vcpu *vcpu)
153 {
154 	if (lapic_in_kernel(vcpu))
155 		kvm_inject_apic_timer_irqs(vcpu);
156 }
157 EXPORT_SYMBOL_GPL(kvm_inject_pending_timer_irqs);
158 
159 void __kvm_migrate_timers(struct kvm_vcpu *vcpu)
160 {
161 	__kvm_migrate_apic_timer(vcpu);
162 	__kvm_migrate_pit_timer(vcpu);
163 	if (kvm_x86_ops.migrate_timers)
164 		kvm_x86_ops.migrate_timers(vcpu);
165 }
166 
167 bool kvm_arch_irqfd_allowed(struct kvm *kvm, struct kvm_irqfd *args)
168 {
169 	bool resample = args->flags & KVM_IRQFD_FLAG_RESAMPLE;
170 
171 	return resample ? irqchip_kernel(kvm) : irqchip_in_kernel(kvm);
172 }
173