1 /* 2 * 8259 interrupt controller emulation 3 * 4 * Copyright (c) 2003-2004 Fabrice Bellard 5 * Copyright (c) 2007 Intel Corporation 6 * Copyright 2009 Red Hat, Inc. and/or its affiliates. 7 * 8 * Permission is hereby granted, free of charge, to any person obtaining a copy 9 * of this software and associated documentation files (the "Software"), to deal 10 * in the Software without restriction, including without limitation the rights 11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 12 * copies of the Software, and to permit persons to whom the Software is 13 * furnished to do so, subject to the following conditions: 14 * 15 * The above copyright notice and this permission notice shall be included in 16 * all copies or substantial portions of the Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 24 * THE SOFTWARE. 25 * Authors: 26 * Yaozu (Eddie) Dong <Eddie.dong@intel.com> 27 * Port from Qemu. 28 */ 29 #include <linux/mm.h> 30 #include <linux/slab.h> 31 #include <linux/bitops.h> 32 #include "irq.h" 33 34 #include <linux/kvm_host.h> 35 #include "trace.h" 36 37 #define pr_pic_unimpl(fmt, ...) \ 38 pr_err_ratelimited("kvm: pic: " fmt, ## __VA_ARGS__) 39 40 static void pic_irq_request(struct kvm *kvm, int level); 41 42 static void pic_lock(struct kvm_pic *s) 43 __acquires(&s->lock) 44 { 45 spin_lock(&s->lock); 46 } 47 48 static void pic_unlock(struct kvm_pic *s) 49 __releases(&s->lock) 50 { 51 bool wakeup = s->wakeup_needed; 52 struct kvm_vcpu *vcpu, *found = NULL; 53 int i; 54 55 s->wakeup_needed = false; 56 57 spin_unlock(&s->lock); 58 59 if (wakeup) { 60 kvm_for_each_vcpu(i, vcpu, s->kvm) { 61 if (kvm_apic_accept_pic_intr(vcpu)) { 62 found = vcpu; 63 break; 64 } 65 } 66 67 if (!found) 68 return; 69 70 kvm_make_request(KVM_REQ_EVENT, found); 71 kvm_vcpu_kick(found); 72 } 73 } 74 75 static void pic_clear_isr(struct kvm_kpic_state *s, int irq) 76 { 77 s->isr &= ~(1 << irq); 78 if (s != &s->pics_state->pics[0]) 79 irq += 8; 80 /* 81 * We are dropping lock while calling ack notifiers since ack 82 * notifier callbacks for assigned devices call into PIC recursively. 83 * Other interrupt may be delivered to PIC while lock is dropped but 84 * it should be safe since PIC state is already updated at this stage. 85 */ 86 pic_unlock(s->pics_state); 87 kvm_notify_acked_irq(s->pics_state->kvm, SELECT_PIC(irq), irq); 88 pic_lock(s->pics_state); 89 } 90 91 /* 92 * set irq level. If an edge is detected, then the IRR is set to 1 93 */ 94 static inline int pic_set_irq1(struct kvm_kpic_state *s, int irq, int level) 95 { 96 int mask, ret = 1; 97 mask = 1 << irq; 98 if (s->elcr & mask) /* level triggered */ 99 if (level) { 100 ret = !(s->irr & mask); 101 s->irr |= mask; 102 s->last_irr |= mask; 103 } else { 104 s->irr &= ~mask; 105 s->last_irr &= ~mask; 106 } 107 else /* edge triggered */ 108 if (level) { 109 if ((s->last_irr & mask) == 0) { 110 ret = !(s->irr & mask); 111 s->irr |= mask; 112 } 113 s->last_irr |= mask; 114 } else 115 s->last_irr &= ~mask; 116 117 return (s->imr & mask) ? -1 : ret; 118 } 119 120 /* 121 * return the highest priority found in mask (highest = smallest 122 * number). Return 8 if no irq 123 */ 124 static inline int get_priority(struct kvm_kpic_state *s, int mask) 125 { 126 int priority; 127 if (mask == 0) 128 return 8; 129 priority = 0; 130 while ((mask & (1 << ((priority + s->priority_add) & 7))) == 0) 131 priority++; 132 return priority; 133 } 134 135 /* 136 * return the pic wanted interrupt. return -1 if none 137 */ 138 static int pic_get_irq(struct kvm_kpic_state *s) 139 { 140 int mask, cur_priority, priority; 141 142 mask = s->irr & ~s->imr; 143 priority = get_priority(s, mask); 144 if (priority == 8) 145 return -1; 146 /* 147 * compute current priority. If special fully nested mode on the 148 * master, the IRQ coming from the slave is not taken into account 149 * for the priority computation. 150 */ 151 mask = s->isr; 152 if (s->special_fully_nested_mode && s == &s->pics_state->pics[0]) 153 mask &= ~(1 << 2); 154 cur_priority = get_priority(s, mask); 155 if (priority < cur_priority) 156 /* 157 * higher priority found: an irq should be generated 158 */ 159 return (priority + s->priority_add) & 7; 160 else 161 return -1; 162 } 163 164 /* 165 * raise irq to CPU if necessary. must be called every time the active 166 * irq may change 167 */ 168 static void pic_update_irq(struct kvm_pic *s) 169 { 170 int irq2, irq; 171 172 irq2 = pic_get_irq(&s->pics[1]); 173 if (irq2 >= 0) { 174 /* 175 * if irq request by slave pic, signal master PIC 176 */ 177 pic_set_irq1(&s->pics[0], 2, 1); 178 pic_set_irq1(&s->pics[0], 2, 0); 179 } 180 irq = pic_get_irq(&s->pics[0]); 181 pic_irq_request(s->kvm, irq >= 0); 182 } 183 184 void kvm_pic_update_irq(struct kvm_pic *s) 185 { 186 pic_lock(s); 187 pic_update_irq(s); 188 pic_unlock(s); 189 } 190 191 int kvm_pic_set_irq(struct kvm_pic *s, int irq, int irq_source_id, int level) 192 { 193 int ret = -1; 194 195 pic_lock(s); 196 if (irq >= 0 && irq < PIC_NUM_PINS) { 197 int irq_level = __kvm_irq_line_state(&s->irq_states[irq], 198 irq_source_id, level); 199 ret = pic_set_irq1(&s->pics[irq >> 3], irq & 7, irq_level); 200 pic_update_irq(s); 201 trace_kvm_pic_set_irq(irq >> 3, irq & 7, s->pics[irq >> 3].elcr, 202 s->pics[irq >> 3].imr, ret == 0); 203 } 204 pic_unlock(s); 205 206 return ret; 207 } 208 209 void kvm_pic_clear_all(struct kvm_pic *s, int irq_source_id) 210 { 211 int i; 212 213 pic_lock(s); 214 for (i = 0; i < PIC_NUM_PINS; i++) 215 __clear_bit(irq_source_id, &s->irq_states[i]); 216 pic_unlock(s); 217 } 218 219 /* 220 * acknowledge interrupt 'irq' 221 */ 222 static inline void pic_intack(struct kvm_kpic_state *s, int irq) 223 { 224 s->isr |= 1 << irq; 225 /* 226 * We don't clear a level sensitive interrupt here 227 */ 228 if (!(s->elcr & (1 << irq))) 229 s->irr &= ~(1 << irq); 230 231 if (s->auto_eoi) { 232 if (s->rotate_on_auto_eoi) 233 s->priority_add = (irq + 1) & 7; 234 pic_clear_isr(s, irq); 235 } 236 237 } 238 239 int kvm_pic_read_irq(struct kvm *kvm) 240 { 241 int irq, irq2, intno; 242 struct kvm_pic *s = pic_irqchip(kvm); 243 244 pic_lock(s); 245 irq = pic_get_irq(&s->pics[0]); 246 if (irq >= 0) { 247 pic_intack(&s->pics[0], irq); 248 if (irq == 2) { 249 irq2 = pic_get_irq(&s->pics[1]); 250 if (irq2 >= 0) 251 pic_intack(&s->pics[1], irq2); 252 else 253 /* 254 * spurious IRQ on slave controller 255 */ 256 irq2 = 7; 257 intno = s->pics[1].irq_base + irq2; 258 irq = irq2 + 8; 259 } else 260 intno = s->pics[0].irq_base + irq; 261 } else { 262 /* 263 * spurious IRQ on host controller 264 */ 265 irq = 7; 266 intno = s->pics[0].irq_base + irq; 267 } 268 pic_update_irq(s); 269 pic_unlock(s); 270 271 return intno; 272 } 273 274 void kvm_pic_reset(struct kvm_kpic_state *s) 275 { 276 int irq, i; 277 struct kvm_vcpu *vcpu; 278 u8 irr = s->irr, isr = s->imr; 279 bool found = false; 280 281 s->last_irr = 0; 282 s->irr = 0; 283 s->imr = 0; 284 s->isr = 0; 285 s->priority_add = 0; 286 s->irq_base = 0; 287 s->read_reg_select = 0; 288 s->poll = 0; 289 s->special_mask = 0; 290 s->init_state = 0; 291 s->auto_eoi = 0; 292 s->rotate_on_auto_eoi = 0; 293 s->special_fully_nested_mode = 0; 294 s->init4 = 0; 295 296 kvm_for_each_vcpu(i, vcpu, s->pics_state->kvm) 297 if (kvm_apic_accept_pic_intr(vcpu)) { 298 found = true; 299 break; 300 } 301 302 303 if (!found) 304 return; 305 306 for (irq = 0; irq < PIC_NUM_PINS/2; irq++) 307 if (irr & (1 << irq) || isr & (1 << irq)) 308 pic_clear_isr(s, irq); 309 } 310 311 static void pic_ioport_write(void *opaque, u32 addr, u32 val) 312 { 313 struct kvm_kpic_state *s = opaque; 314 int priority, cmd, irq; 315 316 addr &= 1; 317 if (addr == 0) { 318 if (val & 0x10) { 319 u8 edge_irr = s->irr & ~s->elcr; 320 int i; 321 bool found = false; 322 struct kvm_vcpu *vcpu; 323 324 s->init4 = val & 1; 325 s->last_irr = 0; 326 s->irr &= s->elcr; 327 s->imr = 0; 328 s->priority_add = 0; 329 s->special_mask = 0; 330 s->read_reg_select = 0; 331 if (!s->init4) { 332 s->special_fully_nested_mode = 0; 333 s->auto_eoi = 0; 334 } 335 s->init_state = 1; 336 if (val & 0x02) 337 pr_pic_unimpl("single mode not supported"); 338 if (val & 0x08) 339 pr_pic_unimpl( 340 "level sensitive irq not supported"); 341 342 kvm_for_each_vcpu(i, vcpu, s->pics_state->kvm) 343 if (kvm_apic_accept_pic_intr(vcpu)) { 344 found = true; 345 break; 346 } 347 348 349 if (found) 350 for (irq = 0; irq < PIC_NUM_PINS/2; irq++) 351 if (edge_irr & (1 << irq)) 352 pic_clear_isr(s, irq); 353 } else if (val & 0x08) { 354 if (val & 0x04) 355 s->poll = 1; 356 if (val & 0x02) 357 s->read_reg_select = val & 1; 358 if (val & 0x40) 359 s->special_mask = (val >> 5) & 1; 360 } else { 361 cmd = val >> 5; 362 switch (cmd) { 363 case 0: 364 case 4: 365 s->rotate_on_auto_eoi = cmd >> 2; 366 break; 367 case 1: /* end of interrupt */ 368 case 5: 369 priority = get_priority(s, s->isr); 370 if (priority != 8) { 371 irq = (priority + s->priority_add) & 7; 372 if (cmd == 5) 373 s->priority_add = (irq + 1) & 7; 374 pic_clear_isr(s, irq); 375 pic_update_irq(s->pics_state); 376 } 377 break; 378 case 3: 379 irq = val & 7; 380 pic_clear_isr(s, irq); 381 pic_update_irq(s->pics_state); 382 break; 383 case 6: 384 s->priority_add = (val + 1) & 7; 385 pic_update_irq(s->pics_state); 386 break; 387 case 7: 388 irq = val & 7; 389 s->priority_add = (irq + 1) & 7; 390 pic_clear_isr(s, irq); 391 pic_update_irq(s->pics_state); 392 break; 393 default: 394 break; /* no operation */ 395 } 396 } 397 } else 398 switch (s->init_state) { 399 case 0: { /* normal mode */ 400 u8 imr_diff = s->imr ^ val, 401 off = (s == &s->pics_state->pics[0]) ? 0 : 8; 402 s->imr = val; 403 for (irq = 0; irq < PIC_NUM_PINS/2; irq++) 404 if (imr_diff & (1 << irq)) 405 kvm_fire_mask_notifiers( 406 s->pics_state->kvm, 407 SELECT_PIC(irq + off), 408 irq + off, 409 !!(s->imr & (1 << irq))); 410 pic_update_irq(s->pics_state); 411 break; 412 } 413 case 1: 414 s->irq_base = val & 0xf8; 415 s->init_state = 2; 416 break; 417 case 2: 418 if (s->init4) 419 s->init_state = 3; 420 else 421 s->init_state = 0; 422 break; 423 case 3: 424 s->special_fully_nested_mode = (val >> 4) & 1; 425 s->auto_eoi = (val >> 1) & 1; 426 s->init_state = 0; 427 break; 428 } 429 } 430 431 static u32 pic_poll_read(struct kvm_kpic_state *s, u32 addr1) 432 { 433 int ret; 434 435 ret = pic_get_irq(s); 436 if (ret >= 0) { 437 if (addr1 >> 7) { 438 s->pics_state->pics[0].isr &= ~(1 << 2); 439 s->pics_state->pics[0].irr &= ~(1 << 2); 440 } 441 s->irr &= ~(1 << ret); 442 pic_clear_isr(s, ret); 443 if (addr1 >> 7 || ret != 2) 444 pic_update_irq(s->pics_state); 445 } else { 446 ret = 0x07; 447 pic_update_irq(s->pics_state); 448 } 449 450 return ret; 451 } 452 453 static u32 pic_ioport_read(void *opaque, u32 addr1) 454 { 455 struct kvm_kpic_state *s = opaque; 456 unsigned int addr; 457 int ret; 458 459 addr = addr1; 460 addr &= 1; 461 if (s->poll) { 462 ret = pic_poll_read(s, addr1); 463 s->poll = 0; 464 } else 465 if (addr == 0) 466 if (s->read_reg_select) 467 ret = s->isr; 468 else 469 ret = s->irr; 470 else 471 ret = s->imr; 472 return ret; 473 } 474 475 static void elcr_ioport_write(void *opaque, u32 addr, u32 val) 476 { 477 struct kvm_kpic_state *s = opaque; 478 s->elcr = val & s->elcr_mask; 479 } 480 481 static u32 elcr_ioport_read(void *opaque, u32 addr1) 482 { 483 struct kvm_kpic_state *s = opaque; 484 return s->elcr; 485 } 486 487 static int picdev_in_range(gpa_t addr) 488 { 489 switch (addr) { 490 case 0x20: 491 case 0x21: 492 case 0xa0: 493 case 0xa1: 494 case 0x4d0: 495 case 0x4d1: 496 return 1; 497 default: 498 return 0; 499 } 500 } 501 502 static int picdev_write(struct kvm_pic *s, 503 gpa_t addr, int len, const void *val) 504 { 505 unsigned char data = *(unsigned char *)val; 506 if (!picdev_in_range(addr)) 507 return -EOPNOTSUPP; 508 509 if (len != 1) { 510 pr_pic_unimpl("non byte write\n"); 511 return 0; 512 } 513 pic_lock(s); 514 switch (addr) { 515 case 0x20: 516 case 0x21: 517 case 0xa0: 518 case 0xa1: 519 pic_ioport_write(&s->pics[addr >> 7], addr, data); 520 break; 521 case 0x4d0: 522 case 0x4d1: 523 elcr_ioport_write(&s->pics[addr & 1], addr, data); 524 break; 525 } 526 pic_unlock(s); 527 return 0; 528 } 529 530 static int picdev_read(struct kvm_pic *s, 531 gpa_t addr, int len, void *val) 532 { 533 unsigned char data = 0; 534 if (!picdev_in_range(addr)) 535 return -EOPNOTSUPP; 536 537 if (len != 1) { 538 pr_pic_unimpl("non byte read\n"); 539 return 0; 540 } 541 pic_lock(s); 542 switch (addr) { 543 case 0x20: 544 case 0x21: 545 case 0xa0: 546 case 0xa1: 547 data = pic_ioport_read(&s->pics[addr >> 7], addr); 548 break; 549 case 0x4d0: 550 case 0x4d1: 551 data = elcr_ioport_read(&s->pics[addr & 1], addr); 552 break; 553 } 554 *(unsigned char *)val = data; 555 pic_unlock(s); 556 return 0; 557 } 558 559 static int picdev_master_write(struct kvm_io_device *dev, 560 gpa_t addr, int len, const void *val) 561 { 562 return picdev_write(container_of(dev, struct kvm_pic, dev_master), 563 addr, len, val); 564 } 565 566 static int picdev_master_read(struct kvm_io_device *dev, 567 gpa_t addr, int len, void *val) 568 { 569 return picdev_read(container_of(dev, struct kvm_pic, dev_master), 570 addr, len, val); 571 } 572 573 static int picdev_slave_write(struct kvm_io_device *dev, 574 gpa_t addr, int len, const void *val) 575 { 576 return picdev_write(container_of(dev, struct kvm_pic, dev_slave), 577 addr, len, val); 578 } 579 580 static int picdev_slave_read(struct kvm_io_device *dev, 581 gpa_t addr, int len, void *val) 582 { 583 return picdev_read(container_of(dev, struct kvm_pic, dev_slave), 584 addr, len, val); 585 } 586 587 static int picdev_eclr_write(struct kvm_io_device *dev, 588 gpa_t addr, int len, const void *val) 589 { 590 return picdev_write(container_of(dev, struct kvm_pic, dev_eclr), 591 addr, len, val); 592 } 593 594 static int picdev_eclr_read(struct kvm_io_device *dev, 595 gpa_t addr, int len, void *val) 596 { 597 return picdev_read(container_of(dev, struct kvm_pic, dev_eclr), 598 addr, len, val); 599 } 600 601 /* 602 * callback when PIC0 irq status changed 603 */ 604 static void pic_irq_request(struct kvm *kvm, int level) 605 { 606 struct kvm_pic *s = pic_irqchip(kvm); 607 608 if (!s->output) 609 s->wakeup_needed = true; 610 s->output = level; 611 } 612 613 static const struct kvm_io_device_ops picdev_master_ops = { 614 .read = picdev_master_read, 615 .write = picdev_master_write, 616 }; 617 618 static const struct kvm_io_device_ops picdev_slave_ops = { 619 .read = picdev_slave_read, 620 .write = picdev_slave_write, 621 }; 622 623 static const struct kvm_io_device_ops picdev_eclr_ops = { 624 .read = picdev_eclr_read, 625 .write = picdev_eclr_write, 626 }; 627 628 struct kvm_pic *kvm_create_pic(struct kvm *kvm) 629 { 630 struct kvm_pic *s; 631 int ret; 632 633 s = kzalloc(sizeof(struct kvm_pic), GFP_KERNEL); 634 if (!s) 635 return NULL; 636 spin_lock_init(&s->lock); 637 s->kvm = kvm; 638 s->pics[0].elcr_mask = 0xf8; 639 s->pics[1].elcr_mask = 0xde; 640 s->pics[0].pics_state = s; 641 s->pics[1].pics_state = s; 642 643 /* 644 * Initialize PIO device 645 */ 646 kvm_iodevice_init(&s->dev_master, &picdev_master_ops); 647 kvm_iodevice_init(&s->dev_slave, &picdev_slave_ops); 648 kvm_iodevice_init(&s->dev_eclr, &picdev_eclr_ops); 649 mutex_lock(&kvm->slots_lock); 650 ret = kvm_io_bus_register_dev(kvm, KVM_PIO_BUS, 0x20, 2, 651 &s->dev_master); 652 if (ret < 0) 653 goto fail_unlock; 654 655 ret = kvm_io_bus_register_dev(kvm, KVM_PIO_BUS, 0xa0, 2, &s->dev_slave); 656 if (ret < 0) 657 goto fail_unreg_2; 658 659 ret = kvm_io_bus_register_dev(kvm, KVM_PIO_BUS, 0x4d0, 2, &s->dev_eclr); 660 if (ret < 0) 661 goto fail_unreg_1; 662 663 mutex_unlock(&kvm->slots_lock); 664 665 return s; 666 667 fail_unreg_1: 668 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS, &s->dev_slave); 669 670 fail_unreg_2: 671 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS, &s->dev_master); 672 673 fail_unlock: 674 mutex_unlock(&kvm->slots_lock); 675 676 kfree(s); 677 678 return NULL; 679 } 680 681 void kvm_destroy_pic(struct kvm *kvm) 682 { 683 struct kvm_pic *vpic = kvm->arch.vpic; 684 685 if (vpic) { 686 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS, &vpic->dev_master); 687 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS, &vpic->dev_slave); 688 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS, &vpic->dev_eclr); 689 kvm->arch.vpic = NULL; 690 kfree(vpic); 691 } 692 } 693