xref: /openbmc/linux/arch/x86/kvm/i8254.c (revision 7490ca1e)
1 /*
2  * 8253/8254 interval timer emulation
3  *
4  * Copyright (c) 2003-2004 Fabrice Bellard
5  * Copyright (c) 2006 Intel Corporation
6  * Copyright (c) 2007 Keir Fraser, XenSource Inc
7  * Copyright (c) 2008 Intel Corporation
8  * Copyright 2009 Red Hat, Inc. and/or its affiliates.
9  *
10  * Permission is hereby granted, free of charge, to any person obtaining a copy
11  * of this software and associated documentation files (the "Software"), to deal
12  * in the Software without restriction, including without limitation the rights
13  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
14  * copies of the Software, and to permit persons to whom the Software is
15  * furnished to do so, subject to the following conditions:
16  *
17  * The above copyright notice and this permission notice shall be included in
18  * all copies or substantial portions of the Software.
19  *
20  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
21  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
22  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
23  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
24  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
25  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
26  * THE SOFTWARE.
27  *
28  * Authors:
29  *   Sheng Yang <sheng.yang@intel.com>
30  *   Based on QEMU and Xen.
31  */
32 
33 #define pr_fmt(fmt) "pit: " fmt
34 
35 #include <linux/kvm_host.h>
36 #include <linux/slab.h>
37 #include <linux/workqueue.h>
38 
39 #include "irq.h"
40 #include "i8254.h"
41 
42 #ifndef CONFIG_X86_64
43 #define mod_64(x, y) ((x) - (y) * div64_u64(x, y))
44 #else
45 #define mod_64(x, y) ((x) % (y))
46 #endif
47 
48 #define RW_STATE_LSB 1
49 #define RW_STATE_MSB 2
50 #define RW_STATE_WORD0 3
51 #define RW_STATE_WORD1 4
52 
53 /* Compute with 96 bit intermediate result: (a*b)/c */
54 static u64 muldiv64(u64 a, u32 b, u32 c)
55 {
56 	union {
57 		u64 ll;
58 		struct {
59 			u32 low, high;
60 		} l;
61 	} u, res;
62 	u64 rl, rh;
63 
64 	u.ll = a;
65 	rl = (u64)u.l.low * (u64)b;
66 	rh = (u64)u.l.high * (u64)b;
67 	rh += (rl >> 32);
68 	res.l.high = div64_u64(rh, c);
69 	res.l.low = div64_u64(((mod_64(rh, c) << 32) + (rl & 0xffffffff)), c);
70 	return res.ll;
71 }
72 
73 static void pit_set_gate(struct kvm *kvm, int channel, u32 val)
74 {
75 	struct kvm_kpit_channel_state *c =
76 		&kvm->arch.vpit->pit_state.channels[channel];
77 
78 	WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
79 
80 	switch (c->mode) {
81 	default:
82 	case 0:
83 	case 4:
84 		/* XXX: just disable/enable counting */
85 		break;
86 	case 1:
87 	case 2:
88 	case 3:
89 	case 5:
90 		/* Restart counting on rising edge. */
91 		if (c->gate < val)
92 			c->count_load_time = ktime_get();
93 		break;
94 	}
95 
96 	c->gate = val;
97 }
98 
99 static int pit_get_gate(struct kvm *kvm, int channel)
100 {
101 	WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
102 
103 	return kvm->arch.vpit->pit_state.channels[channel].gate;
104 }
105 
106 static s64 __kpit_elapsed(struct kvm *kvm)
107 {
108 	s64 elapsed;
109 	ktime_t remaining;
110 	struct kvm_kpit_state *ps = &kvm->arch.vpit->pit_state;
111 
112 	if (!ps->pit_timer.period)
113 		return 0;
114 
115 	/*
116 	 * The Counter does not stop when it reaches zero. In
117 	 * Modes 0, 1, 4, and 5 the Counter ``wraps around'' to
118 	 * the highest count, either FFFF hex for binary counting
119 	 * or 9999 for BCD counting, and continues counting.
120 	 * Modes 2 and 3 are periodic; the Counter reloads
121 	 * itself with the initial count and continues counting
122 	 * from there.
123 	 */
124 	remaining = hrtimer_get_remaining(&ps->pit_timer.timer);
125 	elapsed = ps->pit_timer.period - ktime_to_ns(remaining);
126 	elapsed = mod_64(elapsed, ps->pit_timer.period);
127 
128 	return elapsed;
129 }
130 
131 static s64 kpit_elapsed(struct kvm *kvm, struct kvm_kpit_channel_state *c,
132 			int channel)
133 {
134 	if (channel == 0)
135 		return __kpit_elapsed(kvm);
136 
137 	return ktime_to_ns(ktime_sub(ktime_get(), c->count_load_time));
138 }
139 
140 static int pit_get_count(struct kvm *kvm, int channel)
141 {
142 	struct kvm_kpit_channel_state *c =
143 		&kvm->arch.vpit->pit_state.channels[channel];
144 	s64 d, t;
145 	int counter;
146 
147 	WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
148 
149 	t = kpit_elapsed(kvm, c, channel);
150 	d = muldiv64(t, KVM_PIT_FREQ, NSEC_PER_SEC);
151 
152 	switch (c->mode) {
153 	case 0:
154 	case 1:
155 	case 4:
156 	case 5:
157 		counter = (c->count - d) & 0xffff;
158 		break;
159 	case 3:
160 		/* XXX: may be incorrect for odd counts */
161 		counter = c->count - (mod_64((2 * d), c->count));
162 		break;
163 	default:
164 		counter = c->count - mod_64(d, c->count);
165 		break;
166 	}
167 	return counter;
168 }
169 
170 static int pit_get_out(struct kvm *kvm, int channel)
171 {
172 	struct kvm_kpit_channel_state *c =
173 		&kvm->arch.vpit->pit_state.channels[channel];
174 	s64 d, t;
175 	int out;
176 
177 	WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
178 
179 	t = kpit_elapsed(kvm, c, channel);
180 	d = muldiv64(t, KVM_PIT_FREQ, NSEC_PER_SEC);
181 
182 	switch (c->mode) {
183 	default:
184 	case 0:
185 		out = (d >= c->count);
186 		break;
187 	case 1:
188 		out = (d < c->count);
189 		break;
190 	case 2:
191 		out = ((mod_64(d, c->count) == 0) && (d != 0));
192 		break;
193 	case 3:
194 		out = (mod_64(d, c->count) < ((c->count + 1) >> 1));
195 		break;
196 	case 4:
197 	case 5:
198 		out = (d == c->count);
199 		break;
200 	}
201 
202 	return out;
203 }
204 
205 static void pit_latch_count(struct kvm *kvm, int channel)
206 {
207 	struct kvm_kpit_channel_state *c =
208 		&kvm->arch.vpit->pit_state.channels[channel];
209 
210 	WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
211 
212 	if (!c->count_latched) {
213 		c->latched_count = pit_get_count(kvm, channel);
214 		c->count_latched = c->rw_mode;
215 	}
216 }
217 
218 static void pit_latch_status(struct kvm *kvm, int channel)
219 {
220 	struct kvm_kpit_channel_state *c =
221 		&kvm->arch.vpit->pit_state.channels[channel];
222 
223 	WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
224 
225 	if (!c->status_latched) {
226 		/* TODO: Return NULL COUNT (bit 6). */
227 		c->status = ((pit_get_out(kvm, channel) << 7) |
228 				(c->rw_mode << 4) |
229 				(c->mode << 1) |
230 				c->bcd);
231 		c->status_latched = 1;
232 	}
233 }
234 
235 static void kvm_pit_ack_irq(struct kvm_irq_ack_notifier *kian)
236 {
237 	struct kvm_kpit_state *ps = container_of(kian, struct kvm_kpit_state,
238 						 irq_ack_notifier);
239 	int value;
240 
241 	spin_lock(&ps->inject_lock);
242 	value = atomic_dec_return(&ps->pit_timer.pending);
243 	if (value < 0)
244 		/* spurious acks can be generated if, for example, the
245 		 * PIC is being reset.  Handle it gracefully here
246 		 */
247 		atomic_inc(&ps->pit_timer.pending);
248 	else if (value > 0)
249 		/* in this case, we had multiple outstanding pit interrupts
250 		 * that we needed to inject.  Reinject
251 		 */
252 		queue_work(ps->pit->wq, &ps->pit->expired);
253 	ps->irq_ack = 1;
254 	spin_unlock(&ps->inject_lock);
255 }
256 
257 void __kvm_migrate_pit_timer(struct kvm_vcpu *vcpu)
258 {
259 	struct kvm_pit *pit = vcpu->kvm->arch.vpit;
260 	struct hrtimer *timer;
261 
262 	if (!kvm_vcpu_is_bsp(vcpu) || !pit)
263 		return;
264 
265 	timer = &pit->pit_state.pit_timer.timer;
266 	if (hrtimer_cancel(timer))
267 		hrtimer_start_expires(timer, HRTIMER_MODE_ABS);
268 }
269 
270 static void destroy_pit_timer(struct kvm_pit *pit)
271 {
272 	hrtimer_cancel(&pit->pit_state.pit_timer.timer);
273 	cancel_work_sync(&pit->expired);
274 }
275 
276 static bool kpit_is_periodic(struct kvm_timer *ktimer)
277 {
278 	struct kvm_kpit_state *ps = container_of(ktimer, struct kvm_kpit_state,
279 						 pit_timer);
280 	return ps->is_periodic;
281 }
282 
283 static struct kvm_timer_ops kpit_ops = {
284 	.is_periodic = kpit_is_periodic,
285 };
286 
287 static void pit_do_work(struct work_struct *work)
288 {
289 	struct kvm_pit *pit = container_of(work, struct kvm_pit, expired);
290 	struct kvm *kvm = pit->kvm;
291 	struct kvm_vcpu *vcpu;
292 	int i;
293 	struct kvm_kpit_state *ps = &pit->pit_state;
294 	int inject = 0;
295 
296 	/* Try to inject pending interrupts when
297 	 * last one has been acked.
298 	 */
299 	spin_lock(&ps->inject_lock);
300 	if (ps->irq_ack) {
301 		ps->irq_ack = 0;
302 		inject = 1;
303 	}
304 	spin_unlock(&ps->inject_lock);
305 	if (inject) {
306 		kvm_set_irq(kvm, kvm->arch.vpit->irq_source_id, 0, 1);
307 		kvm_set_irq(kvm, kvm->arch.vpit->irq_source_id, 0, 0);
308 
309 		/*
310 		 * Provides NMI watchdog support via Virtual Wire mode.
311 		 * The route is: PIT -> PIC -> LVT0 in NMI mode.
312 		 *
313 		 * Note: Our Virtual Wire implementation is simplified, only
314 		 * propagating PIT interrupts to all VCPUs when they have set
315 		 * LVT0 to NMI delivery. Other PIC interrupts are just sent to
316 		 * VCPU0, and only if its LVT0 is in EXTINT mode.
317 		 */
318 		if (kvm->arch.vapics_in_nmi_mode > 0)
319 			kvm_for_each_vcpu(i, vcpu, kvm)
320 				kvm_apic_nmi_wd_deliver(vcpu);
321 	}
322 }
323 
324 static enum hrtimer_restart pit_timer_fn(struct hrtimer *data)
325 {
326 	struct kvm_timer *ktimer = container_of(data, struct kvm_timer, timer);
327 	struct kvm_pit *pt = ktimer->kvm->arch.vpit;
328 
329 	if (ktimer->reinject || !atomic_read(&ktimer->pending)) {
330 		atomic_inc(&ktimer->pending);
331 		queue_work(pt->wq, &pt->expired);
332 	}
333 
334 	if (ktimer->t_ops->is_periodic(ktimer)) {
335 		hrtimer_add_expires_ns(&ktimer->timer, ktimer->period);
336 		return HRTIMER_RESTART;
337 	} else
338 		return HRTIMER_NORESTART;
339 }
340 
341 static void create_pit_timer(struct kvm *kvm, u32 val, int is_period)
342 {
343 	struct kvm_kpit_state *ps = &kvm->arch.vpit->pit_state;
344 	struct kvm_timer *pt = &ps->pit_timer;
345 	s64 interval;
346 
347 	if (!irqchip_in_kernel(kvm) || ps->flags & KVM_PIT_FLAGS_HPET_LEGACY)
348 		return;
349 
350 	interval = muldiv64(val, NSEC_PER_SEC, KVM_PIT_FREQ);
351 
352 	pr_debug("create pit timer, interval is %llu nsec\n", interval);
353 
354 	/* TODO The new value only affected after the retriggered */
355 	hrtimer_cancel(&pt->timer);
356 	cancel_work_sync(&ps->pit->expired);
357 	pt->period = interval;
358 	ps->is_periodic = is_period;
359 
360 	pt->timer.function = pit_timer_fn;
361 	pt->t_ops = &kpit_ops;
362 	pt->kvm = ps->pit->kvm;
363 
364 	atomic_set(&pt->pending, 0);
365 	ps->irq_ack = 1;
366 
367 	hrtimer_start(&pt->timer, ktime_add_ns(ktime_get(), interval),
368 		      HRTIMER_MODE_ABS);
369 }
370 
371 static void pit_load_count(struct kvm *kvm, int channel, u32 val)
372 {
373 	struct kvm_kpit_state *ps = &kvm->arch.vpit->pit_state;
374 
375 	WARN_ON(!mutex_is_locked(&ps->lock));
376 
377 	pr_debug("load_count val is %d, channel is %d\n", val, channel);
378 
379 	/*
380 	 * The largest possible initial count is 0; this is equivalent
381 	 * to 216 for binary counting and 104 for BCD counting.
382 	 */
383 	if (val == 0)
384 		val = 0x10000;
385 
386 	ps->channels[channel].count = val;
387 
388 	if (channel != 0) {
389 		ps->channels[channel].count_load_time = ktime_get();
390 		return;
391 	}
392 
393 	/* Two types of timer
394 	 * mode 1 is one shot, mode 2 is period, otherwise del timer */
395 	switch (ps->channels[0].mode) {
396 	case 0:
397 	case 1:
398         /* FIXME: enhance mode 4 precision */
399 	case 4:
400 		create_pit_timer(kvm, val, 0);
401 		break;
402 	case 2:
403 	case 3:
404 		create_pit_timer(kvm, val, 1);
405 		break;
406 	default:
407 		destroy_pit_timer(kvm->arch.vpit);
408 	}
409 }
410 
411 void kvm_pit_load_count(struct kvm *kvm, int channel, u32 val, int hpet_legacy_start)
412 {
413 	u8 saved_mode;
414 	if (hpet_legacy_start) {
415 		/* save existing mode for later reenablement */
416 		saved_mode = kvm->arch.vpit->pit_state.channels[0].mode;
417 		kvm->arch.vpit->pit_state.channels[0].mode = 0xff; /* disable timer */
418 		pit_load_count(kvm, channel, val);
419 		kvm->arch.vpit->pit_state.channels[0].mode = saved_mode;
420 	} else {
421 		pit_load_count(kvm, channel, val);
422 	}
423 }
424 
425 static inline struct kvm_pit *dev_to_pit(struct kvm_io_device *dev)
426 {
427 	return container_of(dev, struct kvm_pit, dev);
428 }
429 
430 static inline struct kvm_pit *speaker_to_pit(struct kvm_io_device *dev)
431 {
432 	return container_of(dev, struct kvm_pit, speaker_dev);
433 }
434 
435 static inline int pit_in_range(gpa_t addr)
436 {
437 	return ((addr >= KVM_PIT_BASE_ADDRESS) &&
438 		(addr < KVM_PIT_BASE_ADDRESS + KVM_PIT_MEM_LENGTH));
439 }
440 
441 static int pit_ioport_write(struct kvm_io_device *this,
442 			    gpa_t addr, int len, const void *data)
443 {
444 	struct kvm_pit *pit = dev_to_pit(this);
445 	struct kvm_kpit_state *pit_state = &pit->pit_state;
446 	struct kvm *kvm = pit->kvm;
447 	int channel, access;
448 	struct kvm_kpit_channel_state *s;
449 	u32 val = *(u32 *) data;
450 	if (!pit_in_range(addr))
451 		return -EOPNOTSUPP;
452 
453 	val  &= 0xff;
454 	addr &= KVM_PIT_CHANNEL_MASK;
455 
456 	mutex_lock(&pit_state->lock);
457 
458 	if (val != 0)
459 		pr_debug("write addr is 0x%x, len is %d, val is 0x%x\n",
460 			 (unsigned int)addr, len, val);
461 
462 	if (addr == 3) {
463 		channel = val >> 6;
464 		if (channel == 3) {
465 			/* Read-Back Command. */
466 			for (channel = 0; channel < 3; channel++) {
467 				s = &pit_state->channels[channel];
468 				if (val & (2 << channel)) {
469 					if (!(val & 0x20))
470 						pit_latch_count(kvm, channel);
471 					if (!(val & 0x10))
472 						pit_latch_status(kvm, channel);
473 				}
474 			}
475 		} else {
476 			/* Select Counter <channel>. */
477 			s = &pit_state->channels[channel];
478 			access = (val >> 4) & KVM_PIT_CHANNEL_MASK;
479 			if (access == 0) {
480 				pit_latch_count(kvm, channel);
481 			} else {
482 				s->rw_mode = access;
483 				s->read_state = access;
484 				s->write_state = access;
485 				s->mode = (val >> 1) & 7;
486 				if (s->mode > 5)
487 					s->mode -= 4;
488 				s->bcd = val & 1;
489 			}
490 		}
491 	} else {
492 		/* Write Count. */
493 		s = &pit_state->channels[addr];
494 		switch (s->write_state) {
495 		default:
496 		case RW_STATE_LSB:
497 			pit_load_count(kvm, addr, val);
498 			break;
499 		case RW_STATE_MSB:
500 			pit_load_count(kvm, addr, val << 8);
501 			break;
502 		case RW_STATE_WORD0:
503 			s->write_latch = val;
504 			s->write_state = RW_STATE_WORD1;
505 			break;
506 		case RW_STATE_WORD1:
507 			pit_load_count(kvm, addr, s->write_latch | (val << 8));
508 			s->write_state = RW_STATE_WORD0;
509 			break;
510 		}
511 	}
512 
513 	mutex_unlock(&pit_state->lock);
514 	return 0;
515 }
516 
517 static int pit_ioport_read(struct kvm_io_device *this,
518 			   gpa_t addr, int len, void *data)
519 {
520 	struct kvm_pit *pit = dev_to_pit(this);
521 	struct kvm_kpit_state *pit_state = &pit->pit_state;
522 	struct kvm *kvm = pit->kvm;
523 	int ret, count;
524 	struct kvm_kpit_channel_state *s;
525 	if (!pit_in_range(addr))
526 		return -EOPNOTSUPP;
527 
528 	addr &= KVM_PIT_CHANNEL_MASK;
529 	if (addr == 3)
530 		return 0;
531 
532 	s = &pit_state->channels[addr];
533 
534 	mutex_lock(&pit_state->lock);
535 
536 	if (s->status_latched) {
537 		s->status_latched = 0;
538 		ret = s->status;
539 	} else if (s->count_latched) {
540 		switch (s->count_latched) {
541 		default:
542 		case RW_STATE_LSB:
543 			ret = s->latched_count & 0xff;
544 			s->count_latched = 0;
545 			break;
546 		case RW_STATE_MSB:
547 			ret = s->latched_count >> 8;
548 			s->count_latched = 0;
549 			break;
550 		case RW_STATE_WORD0:
551 			ret = s->latched_count & 0xff;
552 			s->count_latched = RW_STATE_MSB;
553 			break;
554 		}
555 	} else {
556 		switch (s->read_state) {
557 		default:
558 		case RW_STATE_LSB:
559 			count = pit_get_count(kvm, addr);
560 			ret = count & 0xff;
561 			break;
562 		case RW_STATE_MSB:
563 			count = pit_get_count(kvm, addr);
564 			ret = (count >> 8) & 0xff;
565 			break;
566 		case RW_STATE_WORD0:
567 			count = pit_get_count(kvm, addr);
568 			ret = count & 0xff;
569 			s->read_state = RW_STATE_WORD1;
570 			break;
571 		case RW_STATE_WORD1:
572 			count = pit_get_count(kvm, addr);
573 			ret = (count >> 8) & 0xff;
574 			s->read_state = RW_STATE_WORD0;
575 			break;
576 		}
577 	}
578 
579 	if (len > sizeof(ret))
580 		len = sizeof(ret);
581 	memcpy(data, (char *)&ret, len);
582 
583 	mutex_unlock(&pit_state->lock);
584 	return 0;
585 }
586 
587 static int speaker_ioport_write(struct kvm_io_device *this,
588 				gpa_t addr, int len, const void *data)
589 {
590 	struct kvm_pit *pit = speaker_to_pit(this);
591 	struct kvm_kpit_state *pit_state = &pit->pit_state;
592 	struct kvm *kvm = pit->kvm;
593 	u32 val = *(u32 *) data;
594 	if (addr != KVM_SPEAKER_BASE_ADDRESS)
595 		return -EOPNOTSUPP;
596 
597 	mutex_lock(&pit_state->lock);
598 	pit_state->speaker_data_on = (val >> 1) & 1;
599 	pit_set_gate(kvm, 2, val & 1);
600 	mutex_unlock(&pit_state->lock);
601 	return 0;
602 }
603 
604 static int speaker_ioport_read(struct kvm_io_device *this,
605 			       gpa_t addr, int len, void *data)
606 {
607 	struct kvm_pit *pit = speaker_to_pit(this);
608 	struct kvm_kpit_state *pit_state = &pit->pit_state;
609 	struct kvm *kvm = pit->kvm;
610 	unsigned int refresh_clock;
611 	int ret;
612 	if (addr != KVM_SPEAKER_BASE_ADDRESS)
613 		return -EOPNOTSUPP;
614 
615 	/* Refresh clock toggles at about 15us. We approximate as 2^14ns. */
616 	refresh_clock = ((unsigned int)ktime_to_ns(ktime_get()) >> 14) & 1;
617 
618 	mutex_lock(&pit_state->lock);
619 	ret = ((pit_state->speaker_data_on << 1) | pit_get_gate(kvm, 2) |
620 		(pit_get_out(kvm, 2) << 5) | (refresh_clock << 4));
621 	if (len > sizeof(ret))
622 		len = sizeof(ret);
623 	memcpy(data, (char *)&ret, len);
624 	mutex_unlock(&pit_state->lock);
625 	return 0;
626 }
627 
628 void kvm_pit_reset(struct kvm_pit *pit)
629 {
630 	int i;
631 	struct kvm_kpit_channel_state *c;
632 
633 	mutex_lock(&pit->pit_state.lock);
634 	pit->pit_state.flags = 0;
635 	for (i = 0; i < 3; i++) {
636 		c = &pit->pit_state.channels[i];
637 		c->mode = 0xff;
638 		c->gate = (i != 2);
639 		pit_load_count(pit->kvm, i, 0);
640 	}
641 	mutex_unlock(&pit->pit_state.lock);
642 
643 	atomic_set(&pit->pit_state.pit_timer.pending, 0);
644 	pit->pit_state.irq_ack = 1;
645 }
646 
647 static void pit_mask_notifer(struct kvm_irq_mask_notifier *kimn, bool mask)
648 {
649 	struct kvm_pit *pit = container_of(kimn, struct kvm_pit, mask_notifier);
650 
651 	if (!mask) {
652 		atomic_set(&pit->pit_state.pit_timer.pending, 0);
653 		pit->pit_state.irq_ack = 1;
654 	}
655 }
656 
657 static const struct kvm_io_device_ops pit_dev_ops = {
658 	.read     = pit_ioport_read,
659 	.write    = pit_ioport_write,
660 };
661 
662 static const struct kvm_io_device_ops speaker_dev_ops = {
663 	.read     = speaker_ioport_read,
664 	.write    = speaker_ioport_write,
665 };
666 
667 /* Caller must hold slots_lock */
668 struct kvm_pit *kvm_create_pit(struct kvm *kvm, u32 flags)
669 {
670 	struct kvm_pit *pit;
671 	struct kvm_kpit_state *pit_state;
672 	int ret;
673 
674 	pit = kzalloc(sizeof(struct kvm_pit), GFP_KERNEL);
675 	if (!pit)
676 		return NULL;
677 
678 	pit->irq_source_id = kvm_request_irq_source_id(kvm);
679 	if (pit->irq_source_id < 0) {
680 		kfree(pit);
681 		return NULL;
682 	}
683 
684 	mutex_init(&pit->pit_state.lock);
685 	mutex_lock(&pit->pit_state.lock);
686 	spin_lock_init(&pit->pit_state.inject_lock);
687 
688 	pit->wq = create_singlethread_workqueue("kvm-pit-wq");
689 	if (!pit->wq) {
690 		mutex_unlock(&pit->pit_state.lock);
691 		kvm_free_irq_source_id(kvm, pit->irq_source_id);
692 		kfree(pit);
693 		return NULL;
694 	}
695 	INIT_WORK(&pit->expired, pit_do_work);
696 
697 	kvm->arch.vpit = pit;
698 	pit->kvm = kvm;
699 
700 	pit_state = &pit->pit_state;
701 	pit_state->pit = pit;
702 	hrtimer_init(&pit_state->pit_timer.timer,
703 		     CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
704 	pit_state->irq_ack_notifier.gsi = 0;
705 	pit_state->irq_ack_notifier.irq_acked = kvm_pit_ack_irq;
706 	kvm_register_irq_ack_notifier(kvm, &pit_state->irq_ack_notifier);
707 	pit_state->pit_timer.reinject = true;
708 	mutex_unlock(&pit->pit_state.lock);
709 
710 	kvm_pit_reset(pit);
711 
712 	pit->mask_notifier.func = pit_mask_notifer;
713 	kvm_register_irq_mask_notifier(kvm, 0, &pit->mask_notifier);
714 
715 	kvm_iodevice_init(&pit->dev, &pit_dev_ops);
716 	ret = kvm_io_bus_register_dev(kvm, KVM_PIO_BUS, KVM_PIT_BASE_ADDRESS,
717 				      KVM_PIT_MEM_LENGTH, &pit->dev);
718 	if (ret < 0)
719 		goto fail;
720 
721 	if (flags & KVM_PIT_SPEAKER_DUMMY) {
722 		kvm_iodevice_init(&pit->speaker_dev, &speaker_dev_ops);
723 		ret = kvm_io_bus_register_dev(kvm, KVM_PIO_BUS,
724 					      KVM_SPEAKER_BASE_ADDRESS, 4,
725 					      &pit->speaker_dev);
726 		if (ret < 0)
727 			goto fail_unregister;
728 	}
729 
730 	return pit;
731 
732 fail_unregister:
733 	kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS, &pit->dev);
734 
735 fail:
736 	kvm_unregister_irq_mask_notifier(kvm, 0, &pit->mask_notifier);
737 	kvm_unregister_irq_ack_notifier(kvm, &pit_state->irq_ack_notifier);
738 	kvm_free_irq_source_id(kvm, pit->irq_source_id);
739 	destroy_workqueue(pit->wq);
740 	kfree(pit);
741 	return NULL;
742 }
743 
744 void kvm_free_pit(struct kvm *kvm)
745 {
746 	struct hrtimer *timer;
747 
748 	if (kvm->arch.vpit) {
749 		kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS, &kvm->arch.vpit->dev);
750 		kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
751 					      &kvm->arch.vpit->speaker_dev);
752 		kvm_unregister_irq_mask_notifier(kvm, 0,
753 					       &kvm->arch.vpit->mask_notifier);
754 		kvm_unregister_irq_ack_notifier(kvm,
755 				&kvm->arch.vpit->pit_state.irq_ack_notifier);
756 		mutex_lock(&kvm->arch.vpit->pit_state.lock);
757 		timer = &kvm->arch.vpit->pit_state.pit_timer.timer;
758 		hrtimer_cancel(timer);
759 		cancel_work_sync(&kvm->arch.vpit->expired);
760 		kvm_free_irq_source_id(kvm, kvm->arch.vpit->irq_source_id);
761 		mutex_unlock(&kvm->arch.vpit->pit_state.lock);
762 		destroy_workqueue(kvm->arch.vpit->wq);
763 		kfree(kvm->arch.vpit);
764 	}
765 }
766