1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Kernel-based Virtual Machine driver for Linux 4 * cpuid support routines 5 * 6 * derived from arch/x86/kvm/x86.c 7 * 8 * Copyright 2011 Red Hat, Inc. and/or its affiliates. 9 * Copyright IBM Corporation, 2008 10 */ 11 12 #include <linux/kvm_host.h> 13 #include <linux/export.h> 14 #include <linux/vmalloc.h> 15 #include <linux/uaccess.h> 16 #include <linux/sched/stat.h> 17 18 #include <asm/processor.h> 19 #include <asm/user.h> 20 #include <asm/fpu/xstate.h> 21 #include "cpuid.h" 22 #include "lapic.h" 23 #include "mmu.h" 24 #include "trace.h" 25 #include "pmu.h" 26 27 static u32 xstate_required_size(u64 xstate_bv, bool compacted) 28 { 29 int feature_bit = 0; 30 u32 ret = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET; 31 32 xstate_bv &= XFEATURE_MASK_EXTEND; 33 while (xstate_bv) { 34 if (xstate_bv & 0x1) { 35 u32 eax, ebx, ecx, edx, offset; 36 cpuid_count(0xD, feature_bit, &eax, &ebx, &ecx, &edx); 37 offset = compacted ? ret : ebx; 38 ret = max(ret, offset + eax); 39 } 40 41 xstate_bv >>= 1; 42 feature_bit++; 43 } 44 45 return ret; 46 } 47 48 bool kvm_mpx_supported(void) 49 { 50 return ((host_xcr0 & (XFEATURE_MASK_BNDREGS | XFEATURE_MASK_BNDCSR)) 51 && kvm_x86_ops->mpx_supported()); 52 } 53 EXPORT_SYMBOL_GPL(kvm_mpx_supported); 54 55 u64 kvm_supported_xcr0(void) 56 { 57 u64 xcr0 = KVM_SUPPORTED_XCR0 & host_xcr0; 58 59 if (!kvm_mpx_supported()) 60 xcr0 &= ~(XFEATURE_MASK_BNDREGS | XFEATURE_MASK_BNDCSR); 61 62 return xcr0; 63 } 64 65 #define F(x) bit(X86_FEATURE_##x) 66 67 int kvm_update_cpuid(struct kvm_vcpu *vcpu) 68 { 69 struct kvm_cpuid_entry2 *best; 70 struct kvm_lapic *apic = vcpu->arch.apic; 71 72 best = kvm_find_cpuid_entry(vcpu, 1, 0); 73 if (!best) 74 return 0; 75 76 /* Update OSXSAVE bit */ 77 if (boot_cpu_has(X86_FEATURE_XSAVE) && best->function == 0x1) { 78 best->ecx &= ~F(OSXSAVE); 79 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) 80 best->ecx |= F(OSXSAVE); 81 } 82 83 best->edx &= ~F(APIC); 84 if (vcpu->arch.apic_base & MSR_IA32_APICBASE_ENABLE) 85 best->edx |= F(APIC); 86 87 if (apic) { 88 if (best->ecx & F(TSC_DEADLINE_TIMER)) 89 apic->lapic_timer.timer_mode_mask = 3 << 17; 90 else 91 apic->lapic_timer.timer_mode_mask = 1 << 17; 92 } 93 94 best = kvm_find_cpuid_entry(vcpu, 7, 0); 95 if (best) { 96 /* Update OSPKE bit */ 97 if (boot_cpu_has(X86_FEATURE_PKU) && best->function == 0x7) { 98 best->ecx &= ~F(OSPKE); 99 if (kvm_read_cr4_bits(vcpu, X86_CR4_PKE)) 100 best->ecx |= F(OSPKE); 101 } 102 } 103 104 best = kvm_find_cpuid_entry(vcpu, 0xD, 0); 105 if (!best) { 106 vcpu->arch.guest_supported_xcr0 = 0; 107 vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET; 108 } else { 109 vcpu->arch.guest_supported_xcr0 = 110 (best->eax | ((u64)best->edx << 32)) & 111 kvm_supported_xcr0(); 112 vcpu->arch.guest_xstate_size = best->ebx = 113 xstate_required_size(vcpu->arch.xcr0, false); 114 } 115 116 best = kvm_find_cpuid_entry(vcpu, 0xD, 1); 117 if (best && (best->eax & (F(XSAVES) | F(XSAVEC)))) 118 best->ebx = xstate_required_size(vcpu->arch.xcr0, true); 119 120 /* 121 * The existing code assumes virtual address is 48-bit or 57-bit in the 122 * canonical address checks; exit if it is ever changed. 123 */ 124 best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0); 125 if (best) { 126 int vaddr_bits = (best->eax & 0xff00) >> 8; 127 128 if (vaddr_bits != 48 && vaddr_bits != 57 && vaddr_bits != 0) 129 return -EINVAL; 130 } 131 132 best = kvm_find_cpuid_entry(vcpu, KVM_CPUID_FEATURES, 0); 133 if (kvm_hlt_in_guest(vcpu->kvm) && best && 134 (best->eax & (1 << KVM_FEATURE_PV_UNHALT))) 135 best->eax &= ~(1 << KVM_FEATURE_PV_UNHALT); 136 137 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT)) { 138 best = kvm_find_cpuid_entry(vcpu, 0x1, 0); 139 if (best) { 140 if (vcpu->arch.ia32_misc_enable_msr & MSR_IA32_MISC_ENABLE_MWAIT) 141 best->ecx |= F(MWAIT); 142 else 143 best->ecx &= ~F(MWAIT); 144 } 145 } 146 147 /* Update physical-address width */ 148 vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu); 149 kvm_mmu_reset_context(vcpu); 150 151 kvm_pmu_refresh(vcpu); 152 return 0; 153 } 154 155 static int is_efer_nx(void) 156 { 157 unsigned long long efer = 0; 158 159 rdmsrl_safe(MSR_EFER, &efer); 160 return efer & EFER_NX; 161 } 162 163 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu) 164 { 165 int i; 166 struct kvm_cpuid_entry2 *e, *entry; 167 168 entry = NULL; 169 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) { 170 e = &vcpu->arch.cpuid_entries[i]; 171 if (e->function == 0x80000001) { 172 entry = e; 173 break; 174 } 175 } 176 if (entry && (entry->edx & F(NX)) && !is_efer_nx()) { 177 entry->edx &= ~F(NX); 178 printk(KERN_INFO "kvm: guest NX capability removed\n"); 179 } 180 } 181 182 int cpuid_query_maxphyaddr(struct kvm_vcpu *vcpu) 183 { 184 struct kvm_cpuid_entry2 *best; 185 186 best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0); 187 if (!best || best->eax < 0x80000008) 188 goto not_found; 189 best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0); 190 if (best) 191 return best->eax & 0xff; 192 not_found: 193 return 36; 194 } 195 EXPORT_SYMBOL_GPL(cpuid_query_maxphyaddr); 196 197 /* when an old userspace process fills a new kernel module */ 198 int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu, 199 struct kvm_cpuid *cpuid, 200 struct kvm_cpuid_entry __user *entries) 201 { 202 int r, i; 203 struct kvm_cpuid_entry *cpuid_entries = NULL; 204 205 r = -E2BIG; 206 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES) 207 goto out; 208 r = -ENOMEM; 209 if (cpuid->nent) { 210 cpuid_entries = 211 vmalloc(array_size(sizeof(struct kvm_cpuid_entry), 212 cpuid->nent)); 213 if (!cpuid_entries) 214 goto out; 215 r = -EFAULT; 216 if (copy_from_user(cpuid_entries, entries, 217 cpuid->nent * sizeof(struct kvm_cpuid_entry))) 218 goto out; 219 } 220 for (i = 0; i < cpuid->nent; i++) { 221 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function; 222 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax; 223 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx; 224 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx; 225 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx; 226 vcpu->arch.cpuid_entries[i].index = 0; 227 vcpu->arch.cpuid_entries[i].flags = 0; 228 vcpu->arch.cpuid_entries[i].padding[0] = 0; 229 vcpu->arch.cpuid_entries[i].padding[1] = 0; 230 vcpu->arch.cpuid_entries[i].padding[2] = 0; 231 } 232 vcpu->arch.cpuid_nent = cpuid->nent; 233 cpuid_fix_nx_cap(vcpu); 234 kvm_apic_set_version(vcpu); 235 kvm_x86_ops->cpuid_update(vcpu); 236 r = kvm_update_cpuid(vcpu); 237 238 out: 239 vfree(cpuid_entries); 240 return r; 241 } 242 243 int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu, 244 struct kvm_cpuid2 *cpuid, 245 struct kvm_cpuid_entry2 __user *entries) 246 { 247 int r; 248 249 r = -E2BIG; 250 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES) 251 goto out; 252 r = -EFAULT; 253 if (copy_from_user(&vcpu->arch.cpuid_entries, entries, 254 cpuid->nent * sizeof(struct kvm_cpuid_entry2))) 255 goto out; 256 vcpu->arch.cpuid_nent = cpuid->nent; 257 kvm_apic_set_version(vcpu); 258 kvm_x86_ops->cpuid_update(vcpu); 259 r = kvm_update_cpuid(vcpu); 260 out: 261 return r; 262 } 263 264 int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu, 265 struct kvm_cpuid2 *cpuid, 266 struct kvm_cpuid_entry2 __user *entries) 267 { 268 int r; 269 270 r = -E2BIG; 271 if (cpuid->nent < vcpu->arch.cpuid_nent) 272 goto out; 273 r = -EFAULT; 274 if (copy_to_user(entries, &vcpu->arch.cpuid_entries, 275 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2))) 276 goto out; 277 return 0; 278 279 out: 280 cpuid->nent = vcpu->arch.cpuid_nent; 281 return r; 282 } 283 284 static void cpuid_mask(u32 *word, int wordnum) 285 { 286 *word &= boot_cpu_data.x86_capability[wordnum]; 287 } 288 289 static void do_host_cpuid(struct kvm_cpuid_entry2 *entry, u32 function, 290 u32 index) 291 { 292 entry->function = function; 293 entry->index = index; 294 entry->flags = 0; 295 296 cpuid_count(entry->function, entry->index, 297 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx); 298 299 switch (function) { 300 case 2: 301 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC; 302 break; 303 case 4: 304 case 7: 305 case 0xb: 306 case 0xd: 307 case 0x14: 308 case 0x8000001d: 309 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX; 310 break; 311 } 312 } 313 314 static int __do_cpuid_func_emulated(struct kvm_cpuid_entry2 *entry, 315 u32 func, int *nent, int maxnent) 316 { 317 entry->function = func; 318 entry->index = 0; 319 entry->flags = 0; 320 321 switch (func) { 322 case 0: 323 entry->eax = 7; 324 ++*nent; 325 break; 326 case 1: 327 entry->ecx = F(MOVBE); 328 ++*nent; 329 break; 330 case 7: 331 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX; 332 entry->eax = 0; 333 entry->ecx = F(RDPID); 334 ++*nent; 335 default: 336 break; 337 } 338 339 return 0; 340 } 341 342 static inline void do_cpuid_7_mask(struct kvm_cpuid_entry2 *entry, int index) 343 { 344 unsigned f_invpcid = kvm_x86_ops->invpcid_supported() ? F(INVPCID) : 0; 345 unsigned f_mpx = kvm_mpx_supported() ? F(MPX) : 0; 346 unsigned f_umip = kvm_x86_ops->umip_emulated() ? F(UMIP) : 0; 347 unsigned f_intel_pt = kvm_x86_ops->pt_supported() ? F(INTEL_PT) : 0; 348 unsigned f_la57; 349 350 /* cpuid 7.0.ebx */ 351 const u32 kvm_cpuid_7_0_ebx_x86_features = 352 F(FSGSBASE) | F(BMI1) | F(HLE) | F(AVX2) | F(SMEP) | 353 F(BMI2) | F(ERMS) | f_invpcid | F(RTM) | f_mpx | F(RDSEED) | 354 F(ADX) | F(SMAP) | F(AVX512IFMA) | F(AVX512F) | F(AVX512PF) | 355 F(AVX512ER) | F(AVX512CD) | F(CLFLUSHOPT) | F(CLWB) | F(AVX512DQ) | 356 F(SHA_NI) | F(AVX512BW) | F(AVX512VL) | f_intel_pt; 357 358 /* cpuid 7.0.ecx*/ 359 const u32 kvm_cpuid_7_0_ecx_x86_features = 360 F(AVX512VBMI) | F(LA57) | F(PKU) | 0 /*OSPKE*/ | 361 F(AVX512_VPOPCNTDQ) | F(UMIP) | F(AVX512_VBMI2) | F(GFNI) | 362 F(VAES) | F(VPCLMULQDQ) | F(AVX512_VNNI) | F(AVX512_BITALG) | 363 F(CLDEMOTE) | F(MOVDIRI) | F(MOVDIR64B); 364 365 /* cpuid 7.0.edx*/ 366 const u32 kvm_cpuid_7_0_edx_x86_features = 367 F(AVX512_4VNNIW) | F(AVX512_4FMAPS) | F(SPEC_CTRL) | 368 F(SPEC_CTRL_SSBD) | F(ARCH_CAPABILITIES) | F(INTEL_STIBP) | 369 F(MD_CLEAR); 370 371 /* cpuid 7.1.eax */ 372 const u32 kvm_cpuid_7_1_eax_x86_features = 373 F(AVX512_BF16); 374 375 switch (index) { 376 case 0: 377 entry->eax = min(entry->eax, 1u); 378 entry->ebx &= kvm_cpuid_7_0_ebx_x86_features; 379 cpuid_mask(&entry->ebx, CPUID_7_0_EBX); 380 /* TSC_ADJUST is emulated */ 381 entry->ebx |= F(TSC_ADJUST); 382 383 entry->ecx &= kvm_cpuid_7_0_ecx_x86_features; 384 f_la57 = entry->ecx & F(LA57); 385 cpuid_mask(&entry->ecx, CPUID_7_ECX); 386 /* Set LA57 based on hardware capability. */ 387 entry->ecx |= f_la57; 388 entry->ecx |= f_umip; 389 /* PKU is not yet implemented for shadow paging. */ 390 if (!tdp_enabled || !boot_cpu_has(X86_FEATURE_OSPKE)) 391 entry->ecx &= ~F(PKU); 392 393 entry->edx &= kvm_cpuid_7_0_edx_x86_features; 394 cpuid_mask(&entry->edx, CPUID_7_EDX); 395 if (boot_cpu_has(X86_FEATURE_IBPB) && boot_cpu_has(X86_FEATURE_IBRS)) 396 entry->edx |= F(SPEC_CTRL); 397 if (boot_cpu_has(X86_FEATURE_STIBP)) 398 entry->edx |= F(INTEL_STIBP); 399 if (boot_cpu_has(X86_FEATURE_SSBD)) 400 entry->edx |= F(SPEC_CTRL_SSBD); 401 /* 402 * We emulate ARCH_CAPABILITIES in software even 403 * if the host doesn't support it. 404 */ 405 entry->edx |= F(ARCH_CAPABILITIES); 406 break; 407 case 1: 408 entry->eax &= kvm_cpuid_7_1_eax_x86_features; 409 entry->ebx = 0; 410 entry->ecx = 0; 411 entry->edx = 0; 412 break; 413 default: 414 WARN_ON_ONCE(1); 415 entry->eax = 0; 416 entry->ebx = 0; 417 entry->ecx = 0; 418 entry->edx = 0; 419 break; 420 } 421 } 422 423 static inline int __do_cpuid_func(struct kvm_cpuid_entry2 *entry, u32 function, 424 int *nent, int maxnent) 425 { 426 int r; 427 unsigned f_nx = is_efer_nx() ? F(NX) : 0; 428 #ifdef CONFIG_X86_64 429 unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL) 430 ? F(GBPAGES) : 0; 431 unsigned f_lm = F(LM); 432 #else 433 unsigned f_gbpages = 0; 434 unsigned f_lm = 0; 435 #endif 436 unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0; 437 unsigned f_xsaves = kvm_x86_ops->xsaves_supported() ? F(XSAVES) : 0; 438 unsigned f_intel_pt = kvm_x86_ops->pt_supported() ? F(INTEL_PT) : 0; 439 440 /* cpuid 1.edx */ 441 const u32 kvm_cpuid_1_edx_x86_features = 442 F(FPU) | F(VME) | F(DE) | F(PSE) | 443 F(TSC) | F(MSR) | F(PAE) | F(MCE) | 444 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) | 445 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) | 446 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLUSH) | 447 0 /* Reserved, DS, ACPI */ | F(MMX) | 448 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) | 449 0 /* HTT, TM, Reserved, PBE */; 450 /* cpuid 0x80000001.edx */ 451 const u32 kvm_cpuid_8000_0001_edx_x86_features = 452 F(FPU) | F(VME) | F(DE) | F(PSE) | 453 F(TSC) | F(MSR) | F(PAE) | F(MCE) | 454 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) | 455 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) | 456 F(PAT) | F(PSE36) | 0 /* Reserved */ | 457 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) | 458 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp | 459 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW); 460 /* cpuid 1.ecx */ 461 const u32 kvm_cpuid_1_ecx_x86_features = 462 /* NOTE: MONITOR (and MWAIT) are emulated as NOP, 463 * but *not* advertised to guests via CPUID ! */ 464 F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ | 465 0 /* DS-CPL, VMX, SMX, EST */ | 466 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ | 467 F(FMA) | F(CX16) | 0 /* xTPR Update, PDCM */ | 468 F(PCID) | 0 /* Reserved, DCA */ | F(XMM4_1) | 469 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) | 470 0 /* Reserved*/ | F(AES) | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX) | 471 F(F16C) | F(RDRAND); 472 /* cpuid 0x80000001.ecx */ 473 const u32 kvm_cpuid_8000_0001_ecx_x86_features = 474 F(LAHF_LM) | F(CMP_LEGACY) | 0 /*SVM*/ | 0 /* ExtApicSpace */ | 475 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) | 476 F(3DNOWPREFETCH) | F(OSVW) | 0 /* IBS */ | F(XOP) | 477 0 /* SKINIT, WDT, LWP */ | F(FMA4) | F(TBM) | 478 F(TOPOEXT) | F(PERFCTR_CORE); 479 480 /* cpuid 0x80000008.ebx */ 481 const u32 kvm_cpuid_8000_0008_ebx_x86_features = 482 F(WBNOINVD) | F(AMD_IBPB) | F(AMD_IBRS) | F(AMD_SSBD) | F(VIRT_SSBD) | 483 F(AMD_SSB_NO) | F(AMD_STIBP) | F(AMD_STIBP_ALWAYS_ON); 484 485 /* cpuid 0xC0000001.edx */ 486 const u32 kvm_cpuid_C000_0001_edx_x86_features = 487 F(XSTORE) | F(XSTORE_EN) | F(XCRYPT) | F(XCRYPT_EN) | 488 F(ACE2) | F(ACE2_EN) | F(PHE) | F(PHE_EN) | 489 F(PMM) | F(PMM_EN); 490 491 /* cpuid 0xD.1.eax */ 492 const u32 kvm_cpuid_D_1_eax_x86_features = 493 F(XSAVEOPT) | F(XSAVEC) | F(XGETBV1) | f_xsaves; 494 495 /* all calls to cpuid_count() should be made on the same cpu */ 496 get_cpu(); 497 498 r = -E2BIG; 499 500 if (*nent >= maxnent) 501 goto out; 502 503 do_host_cpuid(entry, function, 0); 504 ++*nent; 505 506 switch (function) { 507 case 0: 508 /* Limited to the highest leaf implemented in KVM. */ 509 entry->eax = min(entry->eax, 0x1fU); 510 break; 511 case 1: 512 entry->edx &= kvm_cpuid_1_edx_x86_features; 513 cpuid_mask(&entry->edx, CPUID_1_EDX); 514 entry->ecx &= kvm_cpuid_1_ecx_x86_features; 515 cpuid_mask(&entry->ecx, CPUID_1_ECX); 516 /* we support x2apic emulation even if host does not support 517 * it since we emulate x2apic in software */ 518 entry->ecx |= F(X2APIC); 519 break; 520 /* function 2 entries are STATEFUL. That is, repeated cpuid commands 521 * may return different values. This forces us to get_cpu() before 522 * issuing the first command, and also to emulate this annoying behavior 523 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */ 524 case 2: { 525 int t, times = entry->eax & 0xff; 526 527 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT; 528 for (t = 1; t < times; ++t) { 529 if (*nent >= maxnent) 530 goto out; 531 532 do_host_cpuid(&entry[t], function, 0); 533 ++*nent; 534 } 535 break; 536 } 537 /* functions 4 and 0x8000001d have additional index. */ 538 case 4: 539 case 0x8000001d: { 540 int i, cache_type; 541 542 /* read more entries until cache_type is zero */ 543 for (i = 1; ; ++i) { 544 if (*nent >= maxnent) 545 goto out; 546 547 cache_type = entry[i - 1].eax & 0x1f; 548 if (!cache_type) 549 break; 550 do_host_cpuid(&entry[i], function, i); 551 ++*nent; 552 } 553 break; 554 } 555 case 6: /* Thermal management */ 556 entry->eax = 0x4; /* allow ARAT */ 557 entry->ebx = 0; 558 entry->ecx = 0; 559 entry->edx = 0; 560 break; 561 /* function 7 has additional index. */ 562 case 7: { 563 int i; 564 565 for (i = 0; ; ) { 566 do_cpuid_7_mask(&entry[i], i); 567 if (i == entry->eax) 568 break; 569 if (*nent >= maxnent) 570 goto out; 571 572 ++i; 573 do_host_cpuid(&entry[i], function, i); 574 ++*nent; 575 } 576 break; 577 } 578 case 9: 579 break; 580 case 0xa: { /* Architectural Performance Monitoring */ 581 struct x86_pmu_capability cap; 582 union cpuid10_eax eax; 583 union cpuid10_edx edx; 584 585 perf_get_x86_pmu_capability(&cap); 586 587 /* 588 * Only support guest architectural pmu on a host 589 * with architectural pmu. 590 */ 591 if (!cap.version) 592 memset(&cap, 0, sizeof(cap)); 593 594 eax.split.version_id = min(cap.version, 2); 595 eax.split.num_counters = cap.num_counters_gp; 596 eax.split.bit_width = cap.bit_width_gp; 597 eax.split.mask_length = cap.events_mask_len; 598 599 edx.split.num_counters_fixed = cap.num_counters_fixed; 600 edx.split.bit_width_fixed = cap.bit_width_fixed; 601 edx.split.reserved = 0; 602 603 entry->eax = eax.full; 604 entry->ebx = cap.events_mask; 605 entry->ecx = 0; 606 entry->edx = edx.full; 607 break; 608 } 609 /* 610 * Per Intel's SDM, the 0x1f is a superset of 0xb, 611 * thus they can be handled by common code. 612 */ 613 case 0x1f: 614 case 0xb: { 615 int i, level_type; 616 617 /* read more entries until level_type is zero */ 618 for (i = 1; ; ++i) { 619 if (*nent >= maxnent) 620 goto out; 621 622 level_type = entry[i - 1].ecx & 0xff00; 623 if (!level_type) 624 break; 625 do_host_cpuid(&entry[i], function, i); 626 ++*nent; 627 } 628 break; 629 } 630 case 0xd: { 631 int idx, i; 632 u64 supported = kvm_supported_xcr0(); 633 634 entry->eax &= supported; 635 entry->ebx = xstate_required_size(supported, false); 636 entry->ecx = entry->ebx; 637 entry->edx &= supported >> 32; 638 if (!supported) 639 break; 640 641 for (idx = 1, i = 1; idx < 64; ++idx) { 642 u64 mask = ((u64)1 << idx); 643 if (*nent >= maxnent) 644 goto out; 645 646 do_host_cpuid(&entry[i], function, idx); 647 if (idx == 1) { 648 entry[i].eax &= kvm_cpuid_D_1_eax_x86_features; 649 cpuid_mask(&entry[i].eax, CPUID_D_1_EAX); 650 entry[i].ebx = 0; 651 if (entry[i].eax & (F(XSAVES)|F(XSAVEC))) 652 entry[i].ebx = 653 xstate_required_size(supported, 654 true); 655 } else { 656 if (entry[i].eax == 0 || !(supported & mask)) 657 continue; 658 if (WARN_ON_ONCE(entry[i].ecx & 1)) 659 continue; 660 } 661 entry[i].ecx = 0; 662 entry[i].edx = 0; 663 ++*nent; 664 ++i; 665 } 666 break; 667 } 668 /* Intel PT */ 669 case 0x14: { 670 int t, times = entry->eax; 671 672 if (!f_intel_pt) 673 break; 674 675 for (t = 1; t <= times; ++t) { 676 if (*nent >= maxnent) 677 goto out; 678 do_host_cpuid(&entry[t], function, t); 679 ++*nent; 680 } 681 break; 682 } 683 case KVM_CPUID_SIGNATURE: { 684 static const char signature[12] = "KVMKVMKVM\0\0"; 685 const u32 *sigptr = (const u32 *)signature; 686 entry->eax = KVM_CPUID_FEATURES; 687 entry->ebx = sigptr[0]; 688 entry->ecx = sigptr[1]; 689 entry->edx = sigptr[2]; 690 break; 691 } 692 case KVM_CPUID_FEATURES: 693 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) | 694 (1 << KVM_FEATURE_NOP_IO_DELAY) | 695 (1 << KVM_FEATURE_CLOCKSOURCE2) | 696 (1 << KVM_FEATURE_ASYNC_PF) | 697 (1 << KVM_FEATURE_PV_EOI) | 698 (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT) | 699 (1 << KVM_FEATURE_PV_UNHALT) | 700 (1 << KVM_FEATURE_PV_TLB_FLUSH) | 701 (1 << KVM_FEATURE_ASYNC_PF_VMEXIT) | 702 (1 << KVM_FEATURE_PV_SEND_IPI) | 703 (1 << KVM_FEATURE_POLL_CONTROL) | 704 (1 << KVM_FEATURE_PV_SCHED_YIELD); 705 706 if (sched_info_on()) 707 entry->eax |= (1 << KVM_FEATURE_STEAL_TIME); 708 709 entry->ebx = 0; 710 entry->ecx = 0; 711 entry->edx = 0; 712 break; 713 case 0x80000000: 714 entry->eax = min(entry->eax, 0x8000001f); 715 break; 716 case 0x80000001: 717 entry->edx &= kvm_cpuid_8000_0001_edx_x86_features; 718 cpuid_mask(&entry->edx, CPUID_8000_0001_EDX); 719 entry->ecx &= kvm_cpuid_8000_0001_ecx_x86_features; 720 cpuid_mask(&entry->ecx, CPUID_8000_0001_ECX); 721 break; 722 case 0x80000007: /* Advanced power management */ 723 /* invariant TSC is CPUID.80000007H:EDX[8] */ 724 entry->edx &= (1 << 8); 725 /* mask against host */ 726 entry->edx &= boot_cpu_data.x86_power; 727 entry->eax = entry->ebx = entry->ecx = 0; 728 break; 729 case 0x80000008: { 730 unsigned g_phys_as = (entry->eax >> 16) & 0xff; 731 unsigned virt_as = max((entry->eax >> 8) & 0xff, 48U); 732 unsigned phys_as = entry->eax & 0xff; 733 734 if (!g_phys_as) 735 g_phys_as = phys_as; 736 entry->eax = g_phys_as | (virt_as << 8); 737 entry->edx = 0; 738 entry->ebx &= kvm_cpuid_8000_0008_ebx_x86_features; 739 cpuid_mask(&entry->ebx, CPUID_8000_0008_EBX); 740 /* 741 * AMD has separate bits for each SPEC_CTRL bit. 742 * arch/x86/kernel/cpu/bugs.c is kind enough to 743 * record that in cpufeatures so use them. 744 */ 745 if (boot_cpu_has(X86_FEATURE_IBPB)) 746 entry->ebx |= F(AMD_IBPB); 747 if (boot_cpu_has(X86_FEATURE_IBRS)) 748 entry->ebx |= F(AMD_IBRS); 749 if (boot_cpu_has(X86_FEATURE_STIBP)) 750 entry->ebx |= F(AMD_STIBP); 751 if (boot_cpu_has(X86_FEATURE_SSBD)) 752 entry->ebx |= F(AMD_SSBD); 753 if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS)) 754 entry->ebx |= F(AMD_SSB_NO); 755 /* 756 * The preference is to use SPEC CTRL MSR instead of the 757 * VIRT_SPEC MSR. 758 */ 759 if (boot_cpu_has(X86_FEATURE_LS_CFG_SSBD) && 760 !boot_cpu_has(X86_FEATURE_AMD_SSBD)) 761 entry->ebx |= F(VIRT_SSBD); 762 break; 763 } 764 case 0x80000019: 765 entry->ecx = entry->edx = 0; 766 break; 767 case 0x8000001a: 768 case 0x8000001e: 769 break; 770 /*Add support for Centaur's CPUID instruction*/ 771 case 0xC0000000: 772 /*Just support up to 0xC0000004 now*/ 773 entry->eax = min(entry->eax, 0xC0000004); 774 break; 775 case 0xC0000001: 776 entry->edx &= kvm_cpuid_C000_0001_edx_x86_features; 777 cpuid_mask(&entry->edx, CPUID_C000_0001_EDX); 778 break; 779 case 3: /* Processor serial number */ 780 case 5: /* MONITOR/MWAIT */ 781 case 0xC0000002: 782 case 0xC0000003: 783 case 0xC0000004: 784 default: 785 entry->eax = entry->ebx = entry->ecx = entry->edx = 0; 786 break; 787 } 788 789 kvm_x86_ops->set_supported_cpuid(function, entry); 790 791 r = 0; 792 793 out: 794 put_cpu(); 795 796 return r; 797 } 798 799 static int do_cpuid_func(struct kvm_cpuid_entry2 *entry, u32 func, 800 int *nent, int maxnent, unsigned int type) 801 { 802 if (type == KVM_GET_EMULATED_CPUID) 803 return __do_cpuid_func_emulated(entry, func, nent, maxnent); 804 805 return __do_cpuid_func(entry, func, nent, maxnent); 806 } 807 808 #undef F 809 810 struct kvm_cpuid_param { 811 u32 func; 812 bool (*qualifier)(const struct kvm_cpuid_param *param); 813 }; 814 815 static bool is_centaur_cpu(const struct kvm_cpuid_param *param) 816 { 817 return boot_cpu_data.x86_vendor == X86_VENDOR_CENTAUR; 818 } 819 820 static bool sanity_check_entries(struct kvm_cpuid_entry2 __user *entries, 821 __u32 num_entries, unsigned int ioctl_type) 822 { 823 int i; 824 __u32 pad[3]; 825 826 if (ioctl_type != KVM_GET_EMULATED_CPUID) 827 return false; 828 829 /* 830 * We want to make sure that ->padding is being passed clean from 831 * userspace in case we want to use it for something in the future. 832 * 833 * Sadly, this wasn't enforced for KVM_GET_SUPPORTED_CPUID and so we 834 * have to give ourselves satisfied only with the emulated side. /me 835 * sheds a tear. 836 */ 837 for (i = 0; i < num_entries; i++) { 838 if (copy_from_user(pad, entries[i].padding, sizeof(pad))) 839 return true; 840 841 if (pad[0] || pad[1] || pad[2]) 842 return true; 843 } 844 return false; 845 } 846 847 int kvm_dev_ioctl_get_cpuid(struct kvm_cpuid2 *cpuid, 848 struct kvm_cpuid_entry2 __user *entries, 849 unsigned int type) 850 { 851 struct kvm_cpuid_entry2 *cpuid_entries; 852 int limit, nent = 0, r = -E2BIG, i; 853 u32 func; 854 static const struct kvm_cpuid_param param[] = { 855 { .func = 0 }, 856 { .func = 0x80000000 }, 857 { .func = 0xC0000000, .qualifier = is_centaur_cpu }, 858 { .func = KVM_CPUID_SIGNATURE }, 859 }; 860 861 if (cpuid->nent < 1) 862 goto out; 863 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES) 864 cpuid->nent = KVM_MAX_CPUID_ENTRIES; 865 866 if (sanity_check_entries(entries, cpuid->nent, type)) 867 return -EINVAL; 868 869 r = -ENOMEM; 870 cpuid_entries = vzalloc(array_size(sizeof(struct kvm_cpuid_entry2), 871 cpuid->nent)); 872 if (!cpuid_entries) 873 goto out; 874 875 r = 0; 876 for (i = 0; i < ARRAY_SIZE(param); i++) { 877 const struct kvm_cpuid_param *ent = ¶m[i]; 878 879 if (ent->qualifier && !ent->qualifier(ent)) 880 continue; 881 882 r = do_cpuid_func(&cpuid_entries[nent], ent->func, 883 &nent, cpuid->nent, type); 884 885 if (r) 886 goto out_free; 887 888 limit = cpuid_entries[nent - 1].eax; 889 for (func = ent->func + 1; func <= limit && nent < cpuid->nent && r == 0; ++func) 890 r = do_cpuid_func(&cpuid_entries[nent], func, 891 &nent, cpuid->nent, type); 892 893 if (r) 894 goto out_free; 895 } 896 897 r = -EFAULT; 898 if (copy_to_user(entries, cpuid_entries, 899 nent * sizeof(struct kvm_cpuid_entry2))) 900 goto out_free; 901 cpuid->nent = nent; 902 r = 0; 903 904 out_free: 905 vfree(cpuid_entries); 906 out: 907 return r; 908 } 909 910 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i) 911 { 912 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i]; 913 struct kvm_cpuid_entry2 *ej; 914 int j = i; 915 int nent = vcpu->arch.cpuid_nent; 916 917 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT; 918 /* when no next entry is found, the current entry[i] is reselected */ 919 do { 920 j = (j + 1) % nent; 921 ej = &vcpu->arch.cpuid_entries[j]; 922 } while (ej->function != e->function); 923 924 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT; 925 926 return j; 927 } 928 929 /* find an entry with matching function, matching index (if needed), and that 930 * should be read next (if it's stateful) */ 931 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e, 932 u32 function, u32 index) 933 { 934 if (e->function != function) 935 return 0; 936 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index) 937 return 0; 938 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) && 939 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT)) 940 return 0; 941 return 1; 942 } 943 944 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu, 945 u32 function, u32 index) 946 { 947 int i; 948 struct kvm_cpuid_entry2 *best = NULL; 949 950 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) { 951 struct kvm_cpuid_entry2 *e; 952 953 e = &vcpu->arch.cpuid_entries[i]; 954 if (is_matching_cpuid_entry(e, function, index)) { 955 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) 956 move_to_next_stateful_cpuid_entry(vcpu, i); 957 best = e; 958 break; 959 } 960 } 961 return best; 962 } 963 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry); 964 965 /* 966 * If no match is found, check whether we exceed the vCPU's limit 967 * and return the content of the highest valid _standard_ leaf instead. 968 * This is to satisfy the CPUID specification. 969 */ 970 static struct kvm_cpuid_entry2* check_cpuid_limit(struct kvm_vcpu *vcpu, 971 u32 function, u32 index) 972 { 973 struct kvm_cpuid_entry2 *maxlevel; 974 975 maxlevel = kvm_find_cpuid_entry(vcpu, function & 0x80000000, 0); 976 if (!maxlevel || maxlevel->eax >= function) 977 return NULL; 978 if (function & 0x80000000) { 979 maxlevel = kvm_find_cpuid_entry(vcpu, 0, 0); 980 if (!maxlevel) 981 return NULL; 982 } 983 return kvm_find_cpuid_entry(vcpu, maxlevel->eax, index); 984 } 985 986 bool kvm_cpuid(struct kvm_vcpu *vcpu, u32 *eax, u32 *ebx, 987 u32 *ecx, u32 *edx, bool check_limit) 988 { 989 u32 function = *eax, index = *ecx; 990 struct kvm_cpuid_entry2 *best; 991 bool entry_found = true; 992 993 best = kvm_find_cpuid_entry(vcpu, function, index); 994 995 if (!best) { 996 entry_found = false; 997 if (!check_limit) 998 goto out; 999 1000 best = check_cpuid_limit(vcpu, function, index); 1001 } 1002 1003 out: 1004 if (best) { 1005 *eax = best->eax; 1006 *ebx = best->ebx; 1007 *ecx = best->ecx; 1008 *edx = best->edx; 1009 } else 1010 *eax = *ebx = *ecx = *edx = 0; 1011 trace_kvm_cpuid(function, *eax, *ebx, *ecx, *edx, entry_found); 1012 return entry_found; 1013 } 1014 EXPORT_SYMBOL_GPL(kvm_cpuid); 1015 1016 int kvm_emulate_cpuid(struct kvm_vcpu *vcpu) 1017 { 1018 u32 eax, ebx, ecx, edx; 1019 1020 if (cpuid_fault_enabled(vcpu) && !kvm_require_cpl(vcpu, 0)) 1021 return 1; 1022 1023 eax = kvm_rax_read(vcpu); 1024 ecx = kvm_rcx_read(vcpu); 1025 kvm_cpuid(vcpu, &eax, &ebx, &ecx, &edx, true); 1026 kvm_rax_write(vcpu, eax); 1027 kvm_rbx_write(vcpu, ebx); 1028 kvm_rcx_write(vcpu, ecx); 1029 kvm_rdx_write(vcpu, edx); 1030 return kvm_skip_emulated_instruction(vcpu); 1031 } 1032 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid); 1033