1 /* 2 * Kernel-based Virtual Machine driver for Linux 3 * cpuid support routines 4 * 5 * derived from arch/x86/kvm/x86.c 6 * 7 * Copyright 2011 Red Hat, Inc. and/or its affiliates. 8 * Copyright IBM Corporation, 2008 9 * 10 * This work is licensed under the terms of the GNU GPL, version 2. See 11 * the COPYING file in the top-level directory. 12 * 13 */ 14 15 #include <linux/kvm_host.h> 16 #include <linux/export.h> 17 #include <linux/vmalloc.h> 18 #include <linux/uaccess.h> 19 #include <linux/sched/stat.h> 20 21 #include <asm/processor.h> 22 #include <asm/user.h> 23 #include <asm/fpu/xstate.h> 24 #include "cpuid.h" 25 #include "lapic.h" 26 #include "mmu.h" 27 #include "trace.h" 28 #include "pmu.h" 29 30 static u32 xstate_required_size(u64 xstate_bv, bool compacted) 31 { 32 int feature_bit = 0; 33 u32 ret = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET; 34 35 xstate_bv &= XFEATURE_MASK_EXTEND; 36 while (xstate_bv) { 37 if (xstate_bv & 0x1) { 38 u32 eax, ebx, ecx, edx, offset; 39 cpuid_count(0xD, feature_bit, &eax, &ebx, &ecx, &edx); 40 offset = compacted ? ret : ebx; 41 ret = max(ret, offset + eax); 42 } 43 44 xstate_bv >>= 1; 45 feature_bit++; 46 } 47 48 return ret; 49 } 50 51 bool kvm_mpx_supported(void) 52 { 53 return ((host_xcr0 & (XFEATURE_MASK_BNDREGS | XFEATURE_MASK_BNDCSR)) 54 && kvm_x86_ops->mpx_supported()); 55 } 56 EXPORT_SYMBOL_GPL(kvm_mpx_supported); 57 58 u64 kvm_supported_xcr0(void) 59 { 60 u64 xcr0 = KVM_SUPPORTED_XCR0 & host_xcr0; 61 62 if (!kvm_mpx_supported()) 63 xcr0 &= ~(XFEATURE_MASK_BNDREGS | XFEATURE_MASK_BNDCSR); 64 65 return xcr0; 66 } 67 68 #define F(x) bit(X86_FEATURE_##x) 69 70 int kvm_update_cpuid(struct kvm_vcpu *vcpu) 71 { 72 struct kvm_cpuid_entry2 *best; 73 struct kvm_lapic *apic = vcpu->arch.apic; 74 75 best = kvm_find_cpuid_entry(vcpu, 1, 0); 76 if (!best) 77 return 0; 78 79 /* Update OSXSAVE bit */ 80 if (boot_cpu_has(X86_FEATURE_XSAVE) && best->function == 0x1) { 81 best->ecx &= ~F(OSXSAVE); 82 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) 83 best->ecx |= F(OSXSAVE); 84 } 85 86 best->edx &= ~F(APIC); 87 if (vcpu->arch.apic_base & MSR_IA32_APICBASE_ENABLE) 88 best->edx |= F(APIC); 89 90 if (apic) { 91 if (best->ecx & F(TSC_DEADLINE_TIMER)) 92 apic->lapic_timer.timer_mode_mask = 3 << 17; 93 else 94 apic->lapic_timer.timer_mode_mask = 1 << 17; 95 } 96 97 best = kvm_find_cpuid_entry(vcpu, 7, 0); 98 if (best) { 99 /* Update OSPKE bit */ 100 if (boot_cpu_has(X86_FEATURE_PKU) && best->function == 0x7) { 101 best->ecx &= ~F(OSPKE); 102 if (kvm_read_cr4_bits(vcpu, X86_CR4_PKE)) 103 best->ecx |= F(OSPKE); 104 } 105 } 106 107 best = kvm_find_cpuid_entry(vcpu, 0xD, 0); 108 if (!best) { 109 vcpu->arch.guest_supported_xcr0 = 0; 110 vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET; 111 } else { 112 vcpu->arch.guest_supported_xcr0 = 113 (best->eax | ((u64)best->edx << 32)) & 114 kvm_supported_xcr0(); 115 vcpu->arch.guest_xstate_size = best->ebx = 116 xstate_required_size(vcpu->arch.xcr0, false); 117 } 118 119 best = kvm_find_cpuid_entry(vcpu, 0xD, 1); 120 if (best && (best->eax & (F(XSAVES) | F(XSAVEC)))) 121 best->ebx = xstate_required_size(vcpu->arch.xcr0, true); 122 123 /* 124 * The existing code assumes virtual address is 48-bit or 57-bit in the 125 * canonical address checks; exit if it is ever changed. 126 */ 127 best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0); 128 if (best) { 129 int vaddr_bits = (best->eax & 0xff00) >> 8; 130 131 if (vaddr_bits != 48 && vaddr_bits != 57 && vaddr_bits != 0) 132 return -EINVAL; 133 } 134 135 best = kvm_find_cpuid_entry(vcpu, KVM_CPUID_FEATURES, 0); 136 if (kvm_hlt_in_guest(vcpu->kvm) && best && 137 (best->eax & (1 << KVM_FEATURE_PV_UNHALT))) 138 best->eax &= ~(1 << KVM_FEATURE_PV_UNHALT); 139 140 /* Update physical-address width */ 141 vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu); 142 kvm_mmu_reset_context(vcpu); 143 144 kvm_pmu_refresh(vcpu); 145 return 0; 146 } 147 148 static int is_efer_nx(void) 149 { 150 unsigned long long efer = 0; 151 152 rdmsrl_safe(MSR_EFER, &efer); 153 return efer & EFER_NX; 154 } 155 156 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu) 157 { 158 int i; 159 struct kvm_cpuid_entry2 *e, *entry; 160 161 entry = NULL; 162 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) { 163 e = &vcpu->arch.cpuid_entries[i]; 164 if (e->function == 0x80000001) { 165 entry = e; 166 break; 167 } 168 } 169 if (entry && (entry->edx & F(NX)) && !is_efer_nx()) { 170 entry->edx &= ~F(NX); 171 printk(KERN_INFO "kvm: guest NX capability removed\n"); 172 } 173 } 174 175 int cpuid_query_maxphyaddr(struct kvm_vcpu *vcpu) 176 { 177 struct kvm_cpuid_entry2 *best; 178 179 best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0); 180 if (!best || best->eax < 0x80000008) 181 goto not_found; 182 best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0); 183 if (best) 184 return best->eax & 0xff; 185 not_found: 186 return 36; 187 } 188 EXPORT_SYMBOL_GPL(cpuid_query_maxphyaddr); 189 190 /* when an old userspace process fills a new kernel module */ 191 int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu, 192 struct kvm_cpuid *cpuid, 193 struct kvm_cpuid_entry __user *entries) 194 { 195 int r, i; 196 struct kvm_cpuid_entry *cpuid_entries = NULL; 197 198 r = -E2BIG; 199 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES) 200 goto out; 201 r = -ENOMEM; 202 if (cpuid->nent) { 203 cpuid_entries = 204 vmalloc(array_size(sizeof(struct kvm_cpuid_entry), 205 cpuid->nent)); 206 if (!cpuid_entries) 207 goto out; 208 r = -EFAULT; 209 if (copy_from_user(cpuid_entries, entries, 210 cpuid->nent * sizeof(struct kvm_cpuid_entry))) 211 goto out; 212 } 213 for (i = 0; i < cpuid->nent; i++) { 214 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function; 215 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax; 216 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx; 217 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx; 218 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx; 219 vcpu->arch.cpuid_entries[i].index = 0; 220 vcpu->arch.cpuid_entries[i].flags = 0; 221 vcpu->arch.cpuid_entries[i].padding[0] = 0; 222 vcpu->arch.cpuid_entries[i].padding[1] = 0; 223 vcpu->arch.cpuid_entries[i].padding[2] = 0; 224 } 225 vcpu->arch.cpuid_nent = cpuid->nent; 226 cpuid_fix_nx_cap(vcpu); 227 kvm_apic_set_version(vcpu); 228 kvm_x86_ops->cpuid_update(vcpu); 229 r = kvm_update_cpuid(vcpu); 230 231 out: 232 vfree(cpuid_entries); 233 return r; 234 } 235 236 int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu, 237 struct kvm_cpuid2 *cpuid, 238 struct kvm_cpuid_entry2 __user *entries) 239 { 240 int r; 241 242 r = -E2BIG; 243 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES) 244 goto out; 245 r = -EFAULT; 246 if (copy_from_user(&vcpu->arch.cpuid_entries, entries, 247 cpuid->nent * sizeof(struct kvm_cpuid_entry2))) 248 goto out; 249 vcpu->arch.cpuid_nent = cpuid->nent; 250 kvm_apic_set_version(vcpu); 251 kvm_x86_ops->cpuid_update(vcpu); 252 r = kvm_update_cpuid(vcpu); 253 out: 254 return r; 255 } 256 257 int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu, 258 struct kvm_cpuid2 *cpuid, 259 struct kvm_cpuid_entry2 __user *entries) 260 { 261 int r; 262 263 r = -E2BIG; 264 if (cpuid->nent < vcpu->arch.cpuid_nent) 265 goto out; 266 r = -EFAULT; 267 if (copy_to_user(entries, &vcpu->arch.cpuid_entries, 268 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2))) 269 goto out; 270 return 0; 271 272 out: 273 cpuid->nent = vcpu->arch.cpuid_nent; 274 return r; 275 } 276 277 static void cpuid_mask(u32 *word, int wordnum) 278 { 279 *word &= boot_cpu_data.x86_capability[wordnum]; 280 } 281 282 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function, 283 u32 index) 284 { 285 entry->function = function; 286 entry->index = index; 287 cpuid_count(entry->function, entry->index, 288 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx); 289 entry->flags = 0; 290 } 291 292 static int __do_cpuid_ent_emulated(struct kvm_cpuid_entry2 *entry, 293 u32 func, u32 index, int *nent, int maxnent) 294 { 295 switch (func) { 296 case 0: 297 entry->eax = 7; 298 ++*nent; 299 break; 300 case 1: 301 entry->ecx = F(MOVBE); 302 ++*nent; 303 break; 304 case 7: 305 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX; 306 if (index == 0) 307 entry->ecx = F(RDPID); 308 ++*nent; 309 default: 310 break; 311 } 312 313 entry->function = func; 314 entry->index = index; 315 316 return 0; 317 } 318 319 static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function, 320 u32 index, int *nent, int maxnent) 321 { 322 int r; 323 unsigned f_nx = is_efer_nx() ? F(NX) : 0; 324 #ifdef CONFIG_X86_64 325 unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL) 326 ? F(GBPAGES) : 0; 327 unsigned f_lm = F(LM); 328 #else 329 unsigned f_gbpages = 0; 330 unsigned f_lm = 0; 331 #endif 332 unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0; 333 unsigned f_invpcid = kvm_x86_ops->invpcid_supported() ? F(INVPCID) : 0; 334 unsigned f_mpx = kvm_mpx_supported() ? F(MPX) : 0; 335 unsigned f_xsaves = kvm_x86_ops->xsaves_supported() ? F(XSAVES) : 0; 336 unsigned f_umip = kvm_x86_ops->umip_emulated() ? F(UMIP) : 0; 337 unsigned f_intel_pt = kvm_x86_ops->pt_supported() ? F(INTEL_PT) : 0; 338 339 /* cpuid 1.edx */ 340 const u32 kvm_cpuid_1_edx_x86_features = 341 F(FPU) | F(VME) | F(DE) | F(PSE) | 342 F(TSC) | F(MSR) | F(PAE) | F(MCE) | 343 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) | 344 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) | 345 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLUSH) | 346 0 /* Reserved, DS, ACPI */ | F(MMX) | 347 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) | 348 0 /* HTT, TM, Reserved, PBE */; 349 /* cpuid 0x80000001.edx */ 350 const u32 kvm_cpuid_8000_0001_edx_x86_features = 351 F(FPU) | F(VME) | F(DE) | F(PSE) | 352 F(TSC) | F(MSR) | F(PAE) | F(MCE) | 353 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) | 354 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) | 355 F(PAT) | F(PSE36) | 0 /* Reserved */ | 356 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) | 357 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp | 358 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW); 359 /* cpuid 1.ecx */ 360 const u32 kvm_cpuid_1_ecx_x86_features = 361 /* NOTE: MONITOR (and MWAIT) are emulated as NOP, 362 * but *not* advertised to guests via CPUID ! */ 363 F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ | 364 0 /* DS-CPL, VMX, SMX, EST */ | 365 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ | 366 F(FMA) | F(CX16) | 0 /* xTPR Update, PDCM */ | 367 F(PCID) | 0 /* Reserved, DCA */ | F(XMM4_1) | 368 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) | 369 0 /* Reserved*/ | F(AES) | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX) | 370 F(F16C) | F(RDRAND); 371 /* cpuid 0x80000001.ecx */ 372 const u32 kvm_cpuid_8000_0001_ecx_x86_features = 373 F(LAHF_LM) | F(CMP_LEGACY) | 0 /*SVM*/ | 0 /* ExtApicSpace */ | 374 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) | 375 F(3DNOWPREFETCH) | F(OSVW) | 0 /* IBS */ | F(XOP) | 376 0 /* SKINIT, WDT, LWP */ | F(FMA4) | F(TBM) | 377 F(TOPOEXT) | F(PERFCTR_CORE); 378 379 /* cpuid 0x80000008.ebx */ 380 const u32 kvm_cpuid_8000_0008_ebx_x86_features = 381 F(WBNOINVD) | F(AMD_IBPB) | F(AMD_IBRS) | F(AMD_SSBD) | F(VIRT_SSBD) | 382 F(AMD_SSB_NO) | F(AMD_STIBP); 383 384 /* cpuid 0xC0000001.edx */ 385 const u32 kvm_cpuid_C000_0001_edx_x86_features = 386 F(XSTORE) | F(XSTORE_EN) | F(XCRYPT) | F(XCRYPT_EN) | 387 F(ACE2) | F(ACE2_EN) | F(PHE) | F(PHE_EN) | 388 F(PMM) | F(PMM_EN); 389 390 /* cpuid 7.0.ebx */ 391 const u32 kvm_cpuid_7_0_ebx_x86_features = 392 F(FSGSBASE) | F(BMI1) | F(HLE) | F(AVX2) | F(SMEP) | 393 F(BMI2) | F(ERMS) | f_invpcid | F(RTM) | f_mpx | F(RDSEED) | 394 F(ADX) | F(SMAP) | F(AVX512IFMA) | F(AVX512F) | F(AVX512PF) | 395 F(AVX512ER) | F(AVX512CD) | F(CLFLUSHOPT) | F(CLWB) | F(AVX512DQ) | 396 F(SHA_NI) | F(AVX512BW) | F(AVX512VL) | f_intel_pt; 397 398 /* cpuid 0xD.1.eax */ 399 const u32 kvm_cpuid_D_1_eax_x86_features = 400 F(XSAVEOPT) | F(XSAVEC) | F(XGETBV1) | f_xsaves; 401 402 /* cpuid 7.0.ecx*/ 403 const u32 kvm_cpuid_7_0_ecx_x86_features = 404 F(AVX512VBMI) | F(LA57) | F(PKU) | 0 /*OSPKE*/ | 405 F(AVX512_VPOPCNTDQ) | F(UMIP) | F(AVX512_VBMI2) | F(GFNI) | 406 F(VAES) | F(VPCLMULQDQ) | F(AVX512_VNNI) | F(AVX512_BITALG) | 407 F(CLDEMOTE); 408 409 /* cpuid 7.0.edx*/ 410 const u32 kvm_cpuid_7_0_edx_x86_features = 411 F(AVX512_4VNNIW) | F(AVX512_4FMAPS) | F(SPEC_CTRL) | 412 F(SPEC_CTRL_SSBD) | F(ARCH_CAPABILITIES) | F(INTEL_STIBP); 413 414 /* all calls to cpuid_count() should be made on the same cpu */ 415 get_cpu(); 416 417 r = -E2BIG; 418 419 if (*nent >= maxnent) 420 goto out; 421 422 do_cpuid_1_ent(entry, function, index); 423 ++*nent; 424 425 switch (function) { 426 case 0: 427 entry->eax = min(entry->eax, (u32)(f_intel_pt ? 0x14 : 0xd)); 428 break; 429 case 1: 430 entry->edx &= kvm_cpuid_1_edx_x86_features; 431 cpuid_mask(&entry->edx, CPUID_1_EDX); 432 entry->ecx &= kvm_cpuid_1_ecx_x86_features; 433 cpuid_mask(&entry->ecx, CPUID_1_ECX); 434 /* we support x2apic emulation even if host does not support 435 * it since we emulate x2apic in software */ 436 entry->ecx |= F(X2APIC); 437 break; 438 /* function 2 entries are STATEFUL. That is, repeated cpuid commands 439 * may return different values. This forces us to get_cpu() before 440 * issuing the first command, and also to emulate this annoying behavior 441 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */ 442 case 2: { 443 int t, times = entry->eax & 0xff; 444 445 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC; 446 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT; 447 for (t = 1; t < times; ++t) { 448 if (*nent >= maxnent) 449 goto out; 450 451 do_cpuid_1_ent(&entry[t], function, 0); 452 entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC; 453 ++*nent; 454 } 455 break; 456 } 457 /* function 4 has additional index. */ 458 case 4: { 459 int i, cache_type; 460 461 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX; 462 /* read more entries until cache_type is zero */ 463 for (i = 1; ; ++i) { 464 if (*nent >= maxnent) 465 goto out; 466 467 cache_type = entry[i - 1].eax & 0x1f; 468 if (!cache_type) 469 break; 470 do_cpuid_1_ent(&entry[i], function, i); 471 entry[i].flags |= 472 KVM_CPUID_FLAG_SIGNIFCANT_INDEX; 473 ++*nent; 474 } 475 break; 476 } 477 case 6: /* Thermal management */ 478 entry->eax = 0x4; /* allow ARAT */ 479 entry->ebx = 0; 480 entry->ecx = 0; 481 entry->edx = 0; 482 break; 483 case 7: { 484 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX; 485 /* Mask ebx against host capability word 9 */ 486 if (index == 0) { 487 entry->ebx &= kvm_cpuid_7_0_ebx_x86_features; 488 cpuid_mask(&entry->ebx, CPUID_7_0_EBX); 489 // TSC_ADJUST is emulated 490 entry->ebx |= F(TSC_ADJUST); 491 entry->ecx &= kvm_cpuid_7_0_ecx_x86_features; 492 cpuid_mask(&entry->ecx, CPUID_7_ECX); 493 entry->ecx |= f_umip; 494 /* PKU is not yet implemented for shadow paging. */ 495 if (!tdp_enabled || !boot_cpu_has(X86_FEATURE_OSPKE)) 496 entry->ecx &= ~F(PKU); 497 entry->edx &= kvm_cpuid_7_0_edx_x86_features; 498 cpuid_mask(&entry->edx, CPUID_7_EDX); 499 /* 500 * We emulate ARCH_CAPABILITIES in software even 501 * if the host doesn't support it. 502 */ 503 entry->edx |= F(ARCH_CAPABILITIES); 504 } else { 505 entry->ebx = 0; 506 entry->ecx = 0; 507 entry->edx = 0; 508 } 509 entry->eax = 0; 510 break; 511 } 512 case 9: 513 break; 514 case 0xa: { /* Architectural Performance Monitoring */ 515 struct x86_pmu_capability cap; 516 union cpuid10_eax eax; 517 union cpuid10_edx edx; 518 519 perf_get_x86_pmu_capability(&cap); 520 521 /* 522 * Only support guest architectural pmu on a host 523 * with architectural pmu. 524 */ 525 if (!cap.version) 526 memset(&cap, 0, sizeof(cap)); 527 528 eax.split.version_id = min(cap.version, 2); 529 eax.split.num_counters = cap.num_counters_gp; 530 eax.split.bit_width = cap.bit_width_gp; 531 eax.split.mask_length = cap.events_mask_len; 532 533 edx.split.num_counters_fixed = cap.num_counters_fixed; 534 edx.split.bit_width_fixed = cap.bit_width_fixed; 535 edx.split.reserved = 0; 536 537 entry->eax = eax.full; 538 entry->ebx = cap.events_mask; 539 entry->ecx = 0; 540 entry->edx = edx.full; 541 break; 542 } 543 /* function 0xb has additional index. */ 544 case 0xb: { 545 int i, level_type; 546 547 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX; 548 /* read more entries until level_type is zero */ 549 for (i = 1; ; ++i) { 550 if (*nent >= maxnent) 551 goto out; 552 553 level_type = entry[i - 1].ecx & 0xff00; 554 if (!level_type) 555 break; 556 do_cpuid_1_ent(&entry[i], function, i); 557 entry[i].flags |= 558 KVM_CPUID_FLAG_SIGNIFCANT_INDEX; 559 ++*nent; 560 } 561 break; 562 } 563 case 0xd: { 564 int idx, i; 565 u64 supported = kvm_supported_xcr0(); 566 567 entry->eax &= supported; 568 entry->ebx = xstate_required_size(supported, false); 569 entry->ecx = entry->ebx; 570 entry->edx &= supported >> 32; 571 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX; 572 if (!supported) 573 break; 574 575 for (idx = 1, i = 1; idx < 64; ++idx) { 576 u64 mask = ((u64)1 << idx); 577 if (*nent >= maxnent) 578 goto out; 579 580 do_cpuid_1_ent(&entry[i], function, idx); 581 if (idx == 1) { 582 entry[i].eax &= kvm_cpuid_D_1_eax_x86_features; 583 cpuid_mask(&entry[i].eax, CPUID_D_1_EAX); 584 entry[i].ebx = 0; 585 if (entry[i].eax & (F(XSAVES)|F(XSAVEC))) 586 entry[i].ebx = 587 xstate_required_size(supported, 588 true); 589 } else { 590 if (entry[i].eax == 0 || !(supported & mask)) 591 continue; 592 if (WARN_ON_ONCE(entry[i].ecx & 1)) 593 continue; 594 } 595 entry[i].ecx = 0; 596 entry[i].edx = 0; 597 entry[i].flags |= 598 KVM_CPUID_FLAG_SIGNIFCANT_INDEX; 599 ++*nent; 600 ++i; 601 } 602 break; 603 } 604 /* Intel PT */ 605 case 0x14: { 606 int t, times = entry->eax; 607 608 if (!f_intel_pt) 609 break; 610 611 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX; 612 for (t = 1; t <= times; ++t) { 613 if (*nent >= maxnent) 614 goto out; 615 do_cpuid_1_ent(&entry[t], function, t); 616 entry[t].flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX; 617 ++*nent; 618 } 619 break; 620 } 621 case KVM_CPUID_SIGNATURE: { 622 static const char signature[12] = "KVMKVMKVM\0\0"; 623 const u32 *sigptr = (const u32 *)signature; 624 entry->eax = KVM_CPUID_FEATURES; 625 entry->ebx = sigptr[0]; 626 entry->ecx = sigptr[1]; 627 entry->edx = sigptr[2]; 628 break; 629 } 630 case KVM_CPUID_FEATURES: 631 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) | 632 (1 << KVM_FEATURE_NOP_IO_DELAY) | 633 (1 << KVM_FEATURE_CLOCKSOURCE2) | 634 (1 << KVM_FEATURE_ASYNC_PF) | 635 (1 << KVM_FEATURE_PV_EOI) | 636 (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT) | 637 (1 << KVM_FEATURE_PV_UNHALT) | 638 (1 << KVM_FEATURE_PV_TLB_FLUSH) | 639 (1 << KVM_FEATURE_ASYNC_PF_VMEXIT) | 640 (1 << KVM_FEATURE_PV_SEND_IPI); 641 642 if (sched_info_on()) 643 entry->eax |= (1 << KVM_FEATURE_STEAL_TIME); 644 645 entry->ebx = 0; 646 entry->ecx = 0; 647 entry->edx = 0; 648 break; 649 case 0x80000000: 650 entry->eax = min(entry->eax, 0x8000001f); 651 break; 652 case 0x80000001: 653 entry->edx &= kvm_cpuid_8000_0001_edx_x86_features; 654 cpuid_mask(&entry->edx, CPUID_8000_0001_EDX); 655 entry->ecx &= kvm_cpuid_8000_0001_ecx_x86_features; 656 cpuid_mask(&entry->ecx, CPUID_8000_0001_ECX); 657 break; 658 case 0x80000007: /* Advanced power management */ 659 /* invariant TSC is CPUID.80000007H:EDX[8] */ 660 entry->edx &= (1 << 8); 661 /* mask against host */ 662 entry->edx &= boot_cpu_data.x86_power; 663 entry->eax = entry->ebx = entry->ecx = 0; 664 break; 665 case 0x80000008: { 666 unsigned g_phys_as = (entry->eax >> 16) & 0xff; 667 unsigned virt_as = max((entry->eax >> 8) & 0xff, 48U); 668 unsigned phys_as = entry->eax & 0xff; 669 670 if (!g_phys_as) 671 g_phys_as = phys_as; 672 entry->eax = g_phys_as | (virt_as << 8); 673 entry->edx = 0; 674 /* 675 * IBRS, IBPB and VIRT_SSBD aren't necessarily present in 676 * hardware cpuid 677 */ 678 if (boot_cpu_has(X86_FEATURE_AMD_IBPB)) 679 entry->ebx |= F(AMD_IBPB); 680 if (boot_cpu_has(X86_FEATURE_AMD_IBRS)) 681 entry->ebx |= F(AMD_IBRS); 682 if (boot_cpu_has(X86_FEATURE_VIRT_SSBD)) 683 entry->ebx |= F(VIRT_SSBD); 684 entry->ebx &= kvm_cpuid_8000_0008_ebx_x86_features; 685 cpuid_mask(&entry->ebx, CPUID_8000_0008_EBX); 686 /* 687 * The preference is to use SPEC CTRL MSR instead of the 688 * VIRT_SPEC MSR. 689 */ 690 if (boot_cpu_has(X86_FEATURE_LS_CFG_SSBD) && 691 !boot_cpu_has(X86_FEATURE_AMD_SSBD)) 692 entry->ebx |= F(VIRT_SSBD); 693 break; 694 } 695 case 0x80000019: 696 entry->ecx = entry->edx = 0; 697 break; 698 case 0x8000001a: 699 break; 700 case 0x8000001d: 701 break; 702 /*Add support for Centaur's CPUID instruction*/ 703 case 0xC0000000: 704 /*Just support up to 0xC0000004 now*/ 705 entry->eax = min(entry->eax, 0xC0000004); 706 break; 707 case 0xC0000001: 708 entry->edx &= kvm_cpuid_C000_0001_edx_x86_features; 709 cpuid_mask(&entry->edx, CPUID_C000_0001_EDX); 710 break; 711 case 3: /* Processor serial number */ 712 case 5: /* MONITOR/MWAIT */ 713 case 0xC0000002: 714 case 0xC0000003: 715 case 0xC0000004: 716 default: 717 entry->eax = entry->ebx = entry->ecx = entry->edx = 0; 718 break; 719 } 720 721 kvm_x86_ops->set_supported_cpuid(function, entry); 722 723 r = 0; 724 725 out: 726 put_cpu(); 727 728 return r; 729 } 730 731 static int do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 func, 732 u32 idx, int *nent, int maxnent, unsigned int type) 733 { 734 if (type == KVM_GET_EMULATED_CPUID) 735 return __do_cpuid_ent_emulated(entry, func, idx, nent, maxnent); 736 737 return __do_cpuid_ent(entry, func, idx, nent, maxnent); 738 } 739 740 #undef F 741 742 struct kvm_cpuid_param { 743 u32 func; 744 u32 idx; 745 bool has_leaf_count; 746 bool (*qualifier)(const struct kvm_cpuid_param *param); 747 }; 748 749 static bool is_centaur_cpu(const struct kvm_cpuid_param *param) 750 { 751 return boot_cpu_data.x86_vendor == X86_VENDOR_CENTAUR; 752 } 753 754 static bool sanity_check_entries(struct kvm_cpuid_entry2 __user *entries, 755 __u32 num_entries, unsigned int ioctl_type) 756 { 757 int i; 758 __u32 pad[3]; 759 760 if (ioctl_type != KVM_GET_EMULATED_CPUID) 761 return false; 762 763 /* 764 * We want to make sure that ->padding is being passed clean from 765 * userspace in case we want to use it for something in the future. 766 * 767 * Sadly, this wasn't enforced for KVM_GET_SUPPORTED_CPUID and so we 768 * have to give ourselves satisfied only with the emulated side. /me 769 * sheds a tear. 770 */ 771 for (i = 0; i < num_entries; i++) { 772 if (copy_from_user(pad, entries[i].padding, sizeof(pad))) 773 return true; 774 775 if (pad[0] || pad[1] || pad[2]) 776 return true; 777 } 778 return false; 779 } 780 781 int kvm_dev_ioctl_get_cpuid(struct kvm_cpuid2 *cpuid, 782 struct kvm_cpuid_entry2 __user *entries, 783 unsigned int type) 784 { 785 struct kvm_cpuid_entry2 *cpuid_entries; 786 int limit, nent = 0, r = -E2BIG, i; 787 u32 func; 788 static const struct kvm_cpuid_param param[] = { 789 { .func = 0, .has_leaf_count = true }, 790 { .func = 0x80000000, .has_leaf_count = true }, 791 { .func = 0xC0000000, .qualifier = is_centaur_cpu, .has_leaf_count = true }, 792 { .func = KVM_CPUID_SIGNATURE }, 793 { .func = KVM_CPUID_FEATURES }, 794 }; 795 796 if (cpuid->nent < 1) 797 goto out; 798 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES) 799 cpuid->nent = KVM_MAX_CPUID_ENTRIES; 800 801 if (sanity_check_entries(entries, cpuid->nent, type)) 802 return -EINVAL; 803 804 r = -ENOMEM; 805 cpuid_entries = vzalloc(array_size(sizeof(struct kvm_cpuid_entry2), 806 cpuid->nent)); 807 if (!cpuid_entries) 808 goto out; 809 810 r = 0; 811 for (i = 0; i < ARRAY_SIZE(param); i++) { 812 const struct kvm_cpuid_param *ent = ¶m[i]; 813 814 if (ent->qualifier && !ent->qualifier(ent)) 815 continue; 816 817 r = do_cpuid_ent(&cpuid_entries[nent], ent->func, ent->idx, 818 &nent, cpuid->nent, type); 819 820 if (r) 821 goto out_free; 822 823 if (!ent->has_leaf_count) 824 continue; 825 826 limit = cpuid_entries[nent - 1].eax; 827 for (func = ent->func + 1; func <= limit && nent < cpuid->nent && r == 0; ++func) 828 r = do_cpuid_ent(&cpuid_entries[nent], func, ent->idx, 829 &nent, cpuid->nent, type); 830 831 if (r) 832 goto out_free; 833 } 834 835 r = -EFAULT; 836 if (copy_to_user(entries, cpuid_entries, 837 nent * sizeof(struct kvm_cpuid_entry2))) 838 goto out_free; 839 cpuid->nent = nent; 840 r = 0; 841 842 out_free: 843 vfree(cpuid_entries); 844 out: 845 return r; 846 } 847 848 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i) 849 { 850 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i]; 851 struct kvm_cpuid_entry2 *ej; 852 int j = i; 853 int nent = vcpu->arch.cpuid_nent; 854 855 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT; 856 /* when no next entry is found, the current entry[i] is reselected */ 857 do { 858 j = (j + 1) % nent; 859 ej = &vcpu->arch.cpuid_entries[j]; 860 } while (ej->function != e->function); 861 862 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT; 863 864 return j; 865 } 866 867 /* find an entry with matching function, matching index (if needed), and that 868 * should be read next (if it's stateful) */ 869 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e, 870 u32 function, u32 index) 871 { 872 if (e->function != function) 873 return 0; 874 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index) 875 return 0; 876 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) && 877 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT)) 878 return 0; 879 return 1; 880 } 881 882 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu, 883 u32 function, u32 index) 884 { 885 int i; 886 struct kvm_cpuid_entry2 *best = NULL; 887 888 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) { 889 struct kvm_cpuid_entry2 *e; 890 891 e = &vcpu->arch.cpuid_entries[i]; 892 if (is_matching_cpuid_entry(e, function, index)) { 893 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) 894 move_to_next_stateful_cpuid_entry(vcpu, i); 895 best = e; 896 break; 897 } 898 } 899 return best; 900 } 901 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry); 902 903 /* 904 * If no match is found, check whether we exceed the vCPU's limit 905 * and return the content of the highest valid _standard_ leaf instead. 906 * This is to satisfy the CPUID specification. 907 */ 908 static struct kvm_cpuid_entry2* check_cpuid_limit(struct kvm_vcpu *vcpu, 909 u32 function, u32 index) 910 { 911 struct kvm_cpuid_entry2 *maxlevel; 912 913 maxlevel = kvm_find_cpuid_entry(vcpu, function & 0x80000000, 0); 914 if (!maxlevel || maxlevel->eax >= function) 915 return NULL; 916 if (function & 0x80000000) { 917 maxlevel = kvm_find_cpuid_entry(vcpu, 0, 0); 918 if (!maxlevel) 919 return NULL; 920 } 921 return kvm_find_cpuid_entry(vcpu, maxlevel->eax, index); 922 } 923 924 bool kvm_cpuid(struct kvm_vcpu *vcpu, u32 *eax, u32 *ebx, 925 u32 *ecx, u32 *edx, bool check_limit) 926 { 927 u32 function = *eax, index = *ecx; 928 struct kvm_cpuid_entry2 *best; 929 bool entry_found = true; 930 931 best = kvm_find_cpuid_entry(vcpu, function, index); 932 933 if (!best) { 934 entry_found = false; 935 if (!check_limit) 936 goto out; 937 938 best = check_cpuid_limit(vcpu, function, index); 939 } 940 941 out: 942 if (best) { 943 *eax = best->eax; 944 *ebx = best->ebx; 945 *ecx = best->ecx; 946 *edx = best->edx; 947 } else 948 *eax = *ebx = *ecx = *edx = 0; 949 trace_kvm_cpuid(function, *eax, *ebx, *ecx, *edx, entry_found); 950 return entry_found; 951 } 952 EXPORT_SYMBOL_GPL(kvm_cpuid); 953 954 int kvm_emulate_cpuid(struct kvm_vcpu *vcpu) 955 { 956 u32 eax, ebx, ecx, edx; 957 958 if (cpuid_fault_enabled(vcpu) && !kvm_require_cpl(vcpu, 0)) 959 return 1; 960 961 eax = kvm_register_read(vcpu, VCPU_REGS_RAX); 962 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX); 963 kvm_cpuid(vcpu, &eax, &ebx, &ecx, &edx, true); 964 kvm_register_write(vcpu, VCPU_REGS_RAX, eax); 965 kvm_register_write(vcpu, VCPU_REGS_RBX, ebx); 966 kvm_register_write(vcpu, VCPU_REGS_RCX, ecx); 967 kvm_register_write(vcpu, VCPU_REGS_RDX, edx); 968 return kvm_skip_emulated_instruction(vcpu); 969 } 970 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid); 971