xref: /openbmc/linux/arch/x86/kernel/x86_init.c (revision eb3fcf00) 
1 /*
2  * Copyright (C) 2009 Thomas Gleixner <tglx@linutronix.de>
3  *
4  *  For licencing details see kernel-base/COPYING
5  */
6 #include <linux/init.h>
7 #include <linux/ioport.h>
8 #include <linux/module.h>
9 #include <linux/pci.h>
10 
11 #include <asm/bios_ebda.h>
12 #include <asm/paravirt.h>
13 #include <asm/pci_x86.h>
14 #include <asm/mpspec.h>
15 #include <asm/setup.h>
16 #include <asm/apic.h>
17 #include <asm/e820.h>
18 #include <asm/time.h>
19 #include <asm/irq.h>
20 #include <asm/io_apic.h>
21 #include <asm/hpet.h>
22 #include <asm/pat.h>
23 #include <asm/tsc.h>
24 #include <asm/iommu.h>
25 #include <asm/mach_traps.h>
26 
27 void x86_init_noop(void) { }
28 void __init x86_init_uint_noop(unsigned int unused) { }
29 int __init iommu_init_noop(void) { return 0; }
30 void iommu_shutdown_noop(void) { }
31 
32 /*
33  * The platform setup functions are preset with the default functions
34  * for standard PC hardware.
35  */
36 struct x86_init_ops x86_init __initdata = {
37 
38 	.resources = {
39 		.probe_roms		= probe_roms,
40 		.reserve_resources	= reserve_standard_io_resources,
41 		.memory_setup		= default_machine_specific_memory_setup,
42 	},
43 
44 	.mpparse = {
45 		.mpc_record		= x86_init_uint_noop,
46 		.setup_ioapic_ids	= x86_init_noop,
47 		.mpc_apic_id		= default_mpc_apic_id,
48 		.smp_read_mpc_oem	= default_smp_read_mpc_oem,
49 		.mpc_oem_bus_info	= default_mpc_oem_bus_info,
50 		.find_smp_config	= default_find_smp_config,
51 		.get_smp_config		= default_get_smp_config,
52 	},
53 
54 	.irqs = {
55 		.pre_vector_init	= init_ISA_irqs,
56 		.intr_init		= native_init_IRQ,
57 		.trap_init		= x86_init_noop,
58 	},
59 
60 	.oem = {
61 		.arch_setup		= x86_init_noop,
62 		.banner			= default_banner,
63 	},
64 
65 	.paging = {
66 		.pagetable_init		= native_pagetable_init,
67 	},
68 
69 	.timers = {
70 		.setup_percpu_clockev	= setup_boot_APIC_clock,
71 		.tsc_pre_init		= x86_init_noop,
72 		.timer_init		= hpet_time_init,
73 		.wallclock_init		= x86_init_noop,
74 	},
75 
76 	.iommu = {
77 		.iommu_init		= iommu_init_noop,
78 	},
79 
80 	.pci = {
81 		.init			= x86_default_pci_init,
82 		.init_irq		= x86_default_pci_init_irq,
83 		.fixup_irqs		= x86_default_pci_fixup_irqs,
84 	},
85 };
86 
87 struct x86_cpuinit_ops x86_cpuinit = {
88 	.early_percpu_clock_init	= x86_init_noop,
89 	.setup_percpu_clockev		= setup_secondary_APIC_clock,
90 };
91 
92 static void default_nmi_init(void) { };
93 static int default_i8042_detect(void) { return 1; };
94 
95 struct x86_platform_ops x86_platform = {
96 	.calibrate_tsc			= native_calibrate_tsc,
97 	.get_wallclock			= mach_get_cmos_time,
98 	.set_wallclock			= mach_set_rtc_mmss,
99 	.iommu_shutdown			= iommu_shutdown_noop,
100 	.is_untracked_pat_range		= is_ISA_range,
101 	.nmi_init			= default_nmi_init,
102 	.get_nmi_reason			= default_get_nmi_reason,
103 	.i8042_detect			= default_i8042_detect,
104 	.save_sched_clock_state 	= tsc_save_sched_clock_state,
105 	.restore_sched_clock_state 	= tsc_restore_sched_clock_state,
106 };
107 
108 EXPORT_SYMBOL_GPL(x86_platform);
109 
110 #if defined(CONFIG_PCI_MSI)
111 struct x86_msi_ops x86_msi = {
112 	.setup_msi_irqs		= native_setup_msi_irqs,
113 	.teardown_msi_irq	= native_teardown_msi_irq,
114 	.teardown_msi_irqs	= default_teardown_msi_irqs,
115 	.restore_msi_irqs	= default_restore_msi_irqs,
116 };
117 
118 /* MSI arch specific hooks */
119 int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
120 {
121 	return x86_msi.setup_msi_irqs(dev, nvec, type);
122 }
123 
124 void arch_teardown_msi_irqs(struct pci_dev *dev)
125 {
126 	x86_msi.teardown_msi_irqs(dev);
127 }
128 
129 void arch_teardown_msi_irq(unsigned int irq)
130 {
131 	x86_msi.teardown_msi_irq(irq);
132 }
133 
134 void arch_restore_msi_irqs(struct pci_dev *dev)
135 {
136 	x86_msi.restore_msi_irqs(dev);
137 }
138 #endif
139 
140 struct x86_io_apic_ops x86_io_apic_ops = {
141 	.read			= native_io_apic_read,
142 	.disable		= native_disable_io_apic,
143 };
144