1 /* 2 * Copyright (C) 2009 Thomas Gleixner <tglx@linutronix.de> 3 * 4 * For licencing details see kernel-base/COPYING 5 */ 6 #include <linux/dmi.h> 7 #include <linux/init.h> 8 #include <linux/ioport.h> 9 #include <linux/export.h> 10 #include <linux/pci.h> 11 #include <linux/acpi.h> 12 13 #include <asm/acpi.h> 14 #include <asm/bios_ebda.h> 15 #include <asm/paravirt.h> 16 #include <asm/pci_x86.h> 17 #include <asm/mpspec.h> 18 #include <asm/setup.h> 19 #include <asm/apic.h> 20 #include <asm/e820/api.h> 21 #include <asm/time.h> 22 #include <asm/irq.h> 23 #include <asm/io_apic.h> 24 #include <asm/hpet.h> 25 #include <asm/memtype.h> 26 #include <asm/tsc.h> 27 #include <asm/iommu.h> 28 #include <asm/mach_traps.h> 29 #include <asm/irqdomain.h> 30 #include <asm/realmode.h> 31 32 void x86_init_noop(void) { } 33 void __init x86_init_uint_noop(unsigned int unused) { } 34 static int __init iommu_init_noop(void) { return 0; } 35 static void iommu_shutdown_noop(void) { } 36 bool __init bool_x86_init_noop(void) { return false; } 37 void x86_op_int_noop(int cpu) { } 38 int set_rtc_noop(const struct timespec64 *now) { return -EINVAL; } 39 void get_rtc_noop(struct timespec64 *now) { } 40 41 static __initconst const struct of_device_id of_cmos_match[] = { 42 { .compatible = "motorola,mc146818" }, 43 {} 44 }; 45 46 /* 47 * Allow devicetree configured systems to disable the RTC by setting the 48 * corresponding DT node's status property to disabled. Code is optimized 49 * out for CONFIG_OF=n builds. 50 */ 51 static __init void x86_wallclock_init(void) 52 { 53 struct device_node *node = of_find_matching_node(NULL, of_cmos_match); 54 55 if (node && !of_device_is_available(node)) { 56 x86_platform.get_wallclock = get_rtc_noop; 57 x86_platform.set_wallclock = set_rtc_noop; 58 } 59 } 60 61 /* 62 * The platform setup functions are preset with the default functions 63 * for standard PC hardware. 64 */ 65 struct x86_init_ops x86_init __initdata = { 66 67 .resources = { 68 .probe_roms = probe_roms, 69 .reserve_resources = reserve_standard_io_resources, 70 .memory_setup = e820__memory_setup_default, 71 .dmi_setup = dmi_setup, 72 }, 73 74 .mpparse = { 75 .setup_ioapic_ids = x86_init_noop, 76 .find_smp_config = default_find_smp_config, 77 .get_smp_config = default_get_smp_config, 78 }, 79 80 .irqs = { 81 .pre_vector_init = init_ISA_irqs, 82 .intr_init = native_init_IRQ, 83 .intr_mode_select = apic_intr_mode_select, 84 .intr_mode_init = apic_intr_mode_init, 85 .create_pci_msi_domain = native_create_pci_msi_domain, 86 }, 87 88 .oem = { 89 .arch_setup = x86_init_noop, 90 .banner = default_banner, 91 }, 92 93 .paging = { 94 .pagetable_init = native_pagetable_init, 95 }, 96 97 .timers = { 98 .setup_percpu_clockev = setup_boot_APIC_clock, 99 .timer_init = hpet_time_init, 100 .wallclock_init = x86_wallclock_init, 101 }, 102 103 .iommu = { 104 .iommu_init = iommu_init_noop, 105 }, 106 107 .pci = { 108 .init = x86_default_pci_init, 109 .init_irq = x86_default_pci_init_irq, 110 .fixup_irqs = x86_default_pci_fixup_irqs, 111 }, 112 113 .hyper = { 114 .init_platform = x86_init_noop, 115 .guest_late_init = x86_init_noop, 116 .x2apic_available = bool_x86_init_noop, 117 .msi_ext_dest_id = bool_x86_init_noop, 118 .init_mem_mapping = x86_init_noop, 119 .init_after_bootmem = x86_init_noop, 120 }, 121 122 .acpi = { 123 .set_root_pointer = x86_default_set_root_pointer, 124 .get_root_pointer = x86_default_get_root_pointer, 125 .reduced_hw_early_init = acpi_generic_reduced_hw_init, 126 }, 127 }; 128 129 struct x86_cpuinit_ops x86_cpuinit = { 130 .early_percpu_clock_init = x86_init_noop, 131 .setup_percpu_clockev = setup_secondary_APIC_clock, 132 .parallel_bringup = true, 133 }; 134 135 static void default_nmi_init(void) { }; 136 137 static bool enc_status_change_prepare_noop(unsigned long vaddr, int npages, bool enc) { return true; } 138 static bool enc_status_change_finish_noop(unsigned long vaddr, int npages, bool enc) { return true; } 139 static bool enc_tlb_flush_required_noop(bool enc) { return false; } 140 static bool enc_cache_flush_required_noop(void) { return false; } 141 static bool is_private_mmio_noop(u64 addr) {return false; } 142 143 struct x86_platform_ops x86_platform __ro_after_init = { 144 .calibrate_cpu = native_calibrate_cpu_early, 145 .calibrate_tsc = native_calibrate_tsc, 146 .get_wallclock = mach_get_cmos_time, 147 .set_wallclock = mach_set_cmos_time, 148 .iommu_shutdown = iommu_shutdown_noop, 149 .is_untracked_pat_range = is_ISA_range, 150 .nmi_init = default_nmi_init, 151 .get_nmi_reason = default_get_nmi_reason, 152 .save_sched_clock_state = tsc_save_sched_clock_state, 153 .restore_sched_clock_state = tsc_restore_sched_clock_state, 154 .realmode_reserve = reserve_real_mode, 155 .realmode_init = init_real_mode, 156 .hyper.pin_vcpu = x86_op_int_noop, 157 .hyper.is_private_mmio = is_private_mmio_noop, 158 159 .guest = { 160 .enc_status_change_prepare = enc_status_change_prepare_noop, 161 .enc_status_change_finish = enc_status_change_finish_noop, 162 .enc_tlb_flush_required = enc_tlb_flush_required_noop, 163 .enc_cache_flush_required = enc_cache_flush_required_noop, 164 }, 165 }; 166 167 EXPORT_SYMBOL_GPL(x86_platform); 168 169 struct x86_apic_ops x86_apic_ops __ro_after_init = { 170 .io_apic_read = native_io_apic_read, 171 .restore = native_restore_boot_irq_mode, 172 }; 173