1 /* 2 * Copyright (C) 2009 Thomas Gleixner <tglx@linutronix.de> 3 * 4 * For licencing details see kernel-base/COPYING 5 */ 6 #include <linux/init.h> 7 #include <linux/ioport.h> 8 #include <linux/export.h> 9 #include <linux/pci.h> 10 11 #include <asm/acpi.h> 12 #include <asm/bios_ebda.h> 13 #include <asm/paravirt.h> 14 #include <asm/pci_x86.h> 15 #include <asm/mpspec.h> 16 #include <asm/setup.h> 17 #include <asm/apic.h> 18 #include <asm/e820/api.h> 19 #include <asm/time.h> 20 #include <asm/irq.h> 21 #include <asm/io_apic.h> 22 #include <asm/hpet.h> 23 #include <asm/memtype.h> 24 #include <asm/tsc.h> 25 #include <asm/iommu.h> 26 #include <asm/mach_traps.h> 27 #include <asm/irqdomain.h> 28 29 void x86_init_noop(void) { } 30 void __init x86_init_uint_noop(unsigned int unused) { } 31 static int __init iommu_init_noop(void) { return 0; } 32 static void iommu_shutdown_noop(void) { } 33 bool __init bool_x86_init_noop(void) { return false; } 34 void x86_op_int_noop(int cpu) { } 35 static __init int set_rtc_noop(const struct timespec64 *now) { return -EINVAL; } 36 static __init void get_rtc_noop(struct timespec64 *now) { } 37 38 static __initconst const struct of_device_id of_cmos_match[] = { 39 { .compatible = "motorola,mc146818" }, 40 {} 41 }; 42 43 /* 44 * Allow devicetree configured systems to disable the RTC by setting the 45 * corresponding DT node's status property to disabled. Code is optimized 46 * out for CONFIG_OF=n builds. 47 */ 48 static __init void x86_wallclock_init(void) 49 { 50 struct device_node *node = of_find_matching_node(NULL, of_cmos_match); 51 52 if (node && !of_device_is_available(node)) { 53 x86_platform.get_wallclock = get_rtc_noop; 54 x86_platform.set_wallclock = set_rtc_noop; 55 } 56 } 57 58 /* 59 * The platform setup functions are preset with the default functions 60 * for standard PC hardware. 61 */ 62 struct x86_init_ops x86_init __initdata = { 63 64 .resources = { 65 .probe_roms = probe_roms, 66 .reserve_resources = reserve_standard_io_resources, 67 .memory_setup = e820__memory_setup_default, 68 }, 69 70 .mpparse = { 71 .setup_ioapic_ids = x86_init_noop, 72 .find_smp_config = default_find_smp_config, 73 .get_smp_config = default_get_smp_config, 74 }, 75 76 .irqs = { 77 .pre_vector_init = init_ISA_irqs, 78 .intr_init = native_init_IRQ, 79 .intr_mode_select = apic_intr_mode_select, 80 .intr_mode_init = apic_intr_mode_init, 81 .create_pci_msi_domain = native_create_pci_msi_domain, 82 }, 83 84 .oem = { 85 .arch_setup = x86_init_noop, 86 .banner = default_banner, 87 }, 88 89 .paging = { 90 .pagetable_init = native_pagetable_init, 91 }, 92 93 .timers = { 94 .setup_percpu_clockev = setup_boot_APIC_clock, 95 .timer_init = hpet_time_init, 96 .wallclock_init = x86_wallclock_init, 97 }, 98 99 .iommu = { 100 .iommu_init = iommu_init_noop, 101 }, 102 103 .pci = { 104 .init = x86_default_pci_init, 105 .init_irq = x86_default_pci_init_irq, 106 .fixup_irqs = x86_default_pci_fixup_irqs, 107 }, 108 109 .hyper = { 110 .init_platform = x86_init_noop, 111 .guest_late_init = x86_init_noop, 112 .x2apic_available = bool_x86_init_noop, 113 .msi_ext_dest_id = bool_x86_init_noop, 114 .init_mem_mapping = x86_init_noop, 115 .init_after_bootmem = x86_init_noop, 116 }, 117 118 .acpi = { 119 .set_root_pointer = x86_default_set_root_pointer, 120 .get_root_pointer = x86_default_get_root_pointer, 121 .reduced_hw_early_init = acpi_generic_reduced_hw_init, 122 }, 123 }; 124 125 struct x86_cpuinit_ops x86_cpuinit = { 126 .early_percpu_clock_init = x86_init_noop, 127 .setup_percpu_clockev = setup_secondary_APIC_clock, 128 }; 129 130 static void default_nmi_init(void) { }; 131 132 static void enc_status_change_prepare_noop(unsigned long vaddr, int npages, bool enc) { } 133 static bool enc_status_change_finish_noop(unsigned long vaddr, int npages, bool enc) { return false; } 134 static bool enc_tlb_flush_required_noop(bool enc) { return false; } 135 static bool enc_cache_flush_required_noop(void) { return false; } 136 137 struct x86_platform_ops x86_platform __ro_after_init = { 138 .calibrate_cpu = native_calibrate_cpu_early, 139 .calibrate_tsc = native_calibrate_tsc, 140 .get_wallclock = mach_get_cmos_time, 141 .set_wallclock = mach_set_rtc_mmss, 142 .iommu_shutdown = iommu_shutdown_noop, 143 .is_untracked_pat_range = is_ISA_range, 144 .nmi_init = default_nmi_init, 145 .get_nmi_reason = default_get_nmi_reason, 146 .save_sched_clock_state = tsc_save_sched_clock_state, 147 .restore_sched_clock_state = tsc_restore_sched_clock_state, 148 .hyper.pin_vcpu = x86_op_int_noop, 149 150 .guest = { 151 .enc_status_change_prepare = enc_status_change_prepare_noop, 152 .enc_status_change_finish = enc_status_change_finish_noop, 153 .enc_tlb_flush_required = enc_tlb_flush_required_noop, 154 .enc_cache_flush_required = enc_cache_flush_required_noop, 155 }, 156 }; 157 158 EXPORT_SYMBOL_GPL(x86_platform); 159 160 struct x86_apic_ops x86_apic_ops __ro_after_init = { 161 .io_apic_read = native_io_apic_read, 162 .restore = native_restore_boot_irq_mode, 163 }; 164