1 /* 2 * vSMPowered(tm) systems specific initialization 3 * Copyright (C) 2005 ScaleMP Inc. 4 * 5 * Use of this code is subject to the terms and conditions of the 6 * GNU general public license version 2. See "COPYING" or 7 * http://www.gnu.org/licenses/gpl.html 8 * 9 * Ravikiran Thirumalai <kiran@scalemp.com>, 10 * Shai Fultheim <shai@scalemp.com> 11 * Paravirt ops integration: Glauber de Oliveira Costa <gcosta@redhat.com>, 12 * Ravikiran Thirumalai <kiran@scalemp.com> 13 */ 14 15 #include <linux/init.h> 16 #include <linux/pci_ids.h> 17 #include <linux/pci_regs.h> 18 #include <linux/smp.h> 19 #include <linux/irq.h> 20 21 #include <asm/apic.h> 22 #include <asm/pci-direct.h> 23 #include <asm/io.h> 24 #include <asm/paravirt.h> 25 #include <asm/setup.h> 26 27 #define TOPOLOGY_REGISTER_OFFSET 0x10 28 29 #ifdef CONFIG_PCI 30 static void __init set_vsmp_ctl(void) 31 { 32 void __iomem *address; 33 unsigned int cap, ctl, cfg; 34 35 /* set vSMP magic bits to indicate vSMP capable kernel */ 36 cfg = read_pci_config(0, 0x1f, 0, PCI_BASE_ADDRESS_0); 37 address = early_ioremap(cfg, 8); 38 cap = readl(address); 39 ctl = readl(address + 4); 40 printk(KERN_INFO "vSMP CTL: capabilities:0x%08x control:0x%08x\n", 41 cap, ctl); 42 43 /* If possible, let the vSMP foundation route the interrupt optimally */ 44 #ifdef CONFIG_SMP 45 if (cap & ctl & BIT(8)) { 46 ctl &= ~BIT(8); 47 48 #ifdef CONFIG_PROC_FS 49 /* Don't let users change irq affinity via procfs */ 50 no_irq_affinity = 1; 51 #endif 52 } 53 #endif 54 55 writel(ctl, address + 4); 56 ctl = readl(address + 4); 57 pr_info("vSMP CTL: control set to:0x%08x\n", ctl); 58 59 early_iounmap(address, 8); 60 } 61 static int is_vsmp = -1; 62 63 static void __init detect_vsmp_box(void) 64 { 65 is_vsmp = 0; 66 67 if (!early_pci_allowed()) 68 return; 69 70 /* Check if we are running on a ScaleMP vSMPowered box */ 71 if (read_pci_config(0, 0x1f, 0, PCI_VENDOR_ID) == 72 (PCI_VENDOR_ID_SCALEMP | (PCI_DEVICE_ID_SCALEMP_VSMP_CTL << 16))) 73 is_vsmp = 1; 74 } 75 76 static int is_vsmp_box(void) 77 { 78 if (is_vsmp != -1) 79 return is_vsmp; 80 else { 81 WARN_ON_ONCE(1); 82 return 0; 83 } 84 } 85 86 #else 87 static void __init detect_vsmp_box(void) 88 { 89 } 90 static int is_vsmp_box(void) 91 { 92 return 0; 93 } 94 static void __init set_vsmp_ctl(void) 95 { 96 } 97 #endif 98 99 static void __init vsmp_cap_cpus(void) 100 { 101 #if !defined(CONFIG_X86_VSMP) && defined(CONFIG_SMP) && defined(CONFIG_PCI) 102 void __iomem *address; 103 unsigned int cfg, topology, node_shift, maxcpus; 104 105 /* 106 * CONFIG_X86_VSMP is not configured, so limit the number CPUs to the 107 * ones present in the first board, unless explicitly overridden by 108 * setup_max_cpus 109 */ 110 if (setup_max_cpus != NR_CPUS) 111 return; 112 113 /* Read the vSMP Foundation topology register */ 114 cfg = read_pci_config(0, 0x1f, 0, PCI_BASE_ADDRESS_0); 115 address = early_ioremap(cfg + TOPOLOGY_REGISTER_OFFSET, 4); 116 if (WARN_ON(!address)) 117 return; 118 119 topology = readl(address); 120 node_shift = (topology >> 16) & 0x7; 121 if (!node_shift) 122 /* The value 0 should be decoded as 8 */ 123 node_shift = 8; 124 maxcpus = (topology & ((1 << node_shift) - 1)) + 1; 125 126 pr_info("vSMP CTL: Capping CPUs to %d (CONFIG_X86_VSMP is unset)\n", 127 maxcpus); 128 setup_max_cpus = maxcpus; 129 early_iounmap(address, 4); 130 #endif 131 } 132 133 static int apicid_phys_pkg_id(int initial_apic_id, int index_msb) 134 { 135 return hard_smp_processor_id() >> index_msb; 136 } 137 138 static void vsmp_apic_post_init(void) 139 { 140 /* need to update phys_pkg_id */ 141 apic->phys_pkg_id = apicid_phys_pkg_id; 142 } 143 144 void __init vsmp_init(void) 145 { 146 detect_vsmp_box(); 147 if (!is_vsmp_box()) 148 return; 149 150 x86_platform.apic_post_init = vsmp_apic_post_init; 151 152 vsmp_cap_cpus(); 153 154 set_vsmp_ctl(); 155 return; 156 } 157