1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * ld script for the x86 kernel 4 * 5 * Historic 32-bit version written by Martin Mares <mj@atrey.karlin.mff.cuni.cz> 6 * 7 * Modernisation, unification and other changes and fixes: 8 * Copyright (C) 2007-2009 Sam Ravnborg <sam@ravnborg.org> 9 * 10 * 11 * Don't define absolute symbols until and unless you know that symbol 12 * value is should remain constant even if kernel image is relocated 13 * at run time. Absolute symbols are not relocated. If symbol value should 14 * change if kernel is relocated, make the symbol section relative and 15 * put it inside the section definition. 16 */ 17 18#ifdef CONFIG_X86_32 19#define LOAD_OFFSET __PAGE_OFFSET 20#else 21#define LOAD_OFFSET __START_KERNEL_map 22#endif 23 24#include <asm-generic/vmlinux.lds.h> 25#include <asm/asm-offsets.h> 26#include <asm/thread_info.h> 27#include <asm/page_types.h> 28#include <asm/orc_lookup.h> 29#include <asm/cache.h> 30#include <asm/boot.h> 31 32#undef i386 /* in case the preprocessor is a 32bit one */ 33 34OUTPUT_FORMAT(CONFIG_OUTPUT_FORMAT, CONFIG_OUTPUT_FORMAT, CONFIG_OUTPUT_FORMAT) 35 36#ifdef CONFIG_X86_32 37OUTPUT_ARCH(i386) 38ENTRY(phys_startup_32) 39jiffies = jiffies_64; 40#else 41OUTPUT_ARCH(i386:x86-64) 42ENTRY(phys_startup_64) 43jiffies_64 = jiffies; 44#endif 45 46#if defined(CONFIG_X86_64) 47/* 48 * On 64-bit, align RODATA to 2MB so we retain large page mappings for 49 * boundaries spanning kernel text, rodata and data sections. 50 * 51 * However, kernel identity mappings will have different RWX permissions 52 * to the pages mapping to text and to the pages padding (which are freed) the 53 * text section. Hence kernel identity mappings will be broken to smaller 54 * pages. For 64-bit, kernel text and kernel identity mappings are different, 55 * so we can enable protection checks as well as retain 2MB large page 56 * mappings for kernel text. 57 */ 58#define X64_ALIGN_RODATA_BEGIN . = ALIGN(HPAGE_SIZE); 59 60#define X64_ALIGN_RODATA_END \ 61 . = ALIGN(HPAGE_SIZE); \ 62 __end_rodata_hpage_align = .; 63 64#define ALIGN_ENTRY_TEXT_BEGIN . = ALIGN(PMD_SIZE); 65#define ALIGN_ENTRY_TEXT_END . = ALIGN(PMD_SIZE); 66 67#else 68 69#define X64_ALIGN_RODATA_BEGIN 70#define X64_ALIGN_RODATA_END 71 72#define ALIGN_ENTRY_TEXT_BEGIN 73#define ALIGN_ENTRY_TEXT_END 74 75#endif 76 77PHDRS { 78 text PT_LOAD FLAGS(5); /* R_E */ 79 data PT_LOAD FLAGS(6); /* RW_ */ 80#ifdef CONFIG_X86_64 81#ifdef CONFIG_SMP 82 percpu PT_LOAD FLAGS(6); /* RW_ */ 83#endif 84 init PT_LOAD FLAGS(7); /* RWE */ 85#endif 86 note PT_NOTE FLAGS(0); /* ___ */ 87} 88 89SECTIONS 90{ 91#ifdef CONFIG_X86_32 92 . = LOAD_OFFSET + LOAD_PHYSICAL_ADDR; 93 phys_startup_32 = ABSOLUTE(startup_32 - LOAD_OFFSET); 94#else 95 . = __START_KERNEL; 96 phys_startup_64 = ABSOLUTE(startup_64 - LOAD_OFFSET); 97#endif 98 99 /* Text and read-only data */ 100 .text : AT(ADDR(.text) - LOAD_OFFSET) { 101 _text = .; 102 _stext = .; 103 /* bootstrapping code */ 104 HEAD_TEXT 105 TEXT_TEXT 106 SCHED_TEXT 107 CPUIDLE_TEXT 108 LOCK_TEXT 109 KPROBES_TEXT 110 ALIGN_ENTRY_TEXT_BEGIN 111 ENTRY_TEXT 112 IRQENTRY_TEXT 113 ALIGN_ENTRY_TEXT_END 114 SOFTIRQENTRY_TEXT 115 *(.fixup) 116 *(.gnu.warning) 117 118#ifdef CONFIG_X86_64 119 . = ALIGN(PAGE_SIZE); 120 __entry_trampoline_start = .; 121 _entry_trampoline = .; 122 *(.entry_trampoline) 123 . = ALIGN(PAGE_SIZE); 124 __entry_trampoline_end = .; 125 ASSERT(. - _entry_trampoline == PAGE_SIZE, "entry trampoline is too big"); 126#endif 127 128#ifdef CONFIG_RETPOLINE 129 __indirect_thunk_start = .; 130 *(.text.__x86.indirect_thunk) 131 __indirect_thunk_end = .; 132#endif 133 134 /* End of text section */ 135 _etext = .; 136 } :text = 0x9090 137 138 NOTES :text :note 139 140 EXCEPTION_TABLE(16) :text = 0x9090 141 142 /* .text should occupy whole number of pages */ 143 . = ALIGN(PAGE_SIZE); 144 X64_ALIGN_RODATA_BEGIN 145 RO_DATA(PAGE_SIZE) 146 X64_ALIGN_RODATA_END 147 148 /* Data */ 149 .data : AT(ADDR(.data) - LOAD_OFFSET) { 150 /* Start of data section */ 151 _sdata = .; 152 153 /* init_task */ 154 INIT_TASK_DATA(THREAD_SIZE) 155 156#ifdef CONFIG_X86_32 157 /* 32 bit has nosave before _edata */ 158 NOSAVE_DATA 159#endif 160 161 PAGE_ALIGNED_DATA(PAGE_SIZE) 162 163 CACHELINE_ALIGNED_DATA(L1_CACHE_BYTES) 164 165 DATA_DATA 166 CONSTRUCTORS 167 168 /* rarely changed data like cpu maps */ 169 READ_MOSTLY_DATA(INTERNODE_CACHE_BYTES) 170 171 /* End of data section */ 172 _edata = .; 173 } :data 174 175 BUG_TABLE 176 177 ORC_UNWIND_TABLE 178 179 . = ALIGN(PAGE_SIZE); 180 __vvar_page = .; 181 182 .vvar : AT(ADDR(.vvar) - LOAD_OFFSET) { 183 /* work around gold bug 13023 */ 184 __vvar_beginning_hack = .; 185 186 /* Place all vvars at the offsets in asm/vvar.h. */ 187#define EMIT_VVAR(name, offset) \ 188 . = __vvar_beginning_hack + offset; \ 189 *(.vvar_ ## name) 190#define __VVAR_KERNEL_LDS 191#include <asm/vvar.h> 192#undef __VVAR_KERNEL_LDS 193#undef EMIT_VVAR 194 195 /* 196 * Pad the rest of the page with zeros. Otherwise the loader 197 * can leave garbage here. 198 */ 199 . = __vvar_beginning_hack + PAGE_SIZE; 200 } :data 201 202 . = ALIGN(__vvar_page + PAGE_SIZE, PAGE_SIZE); 203 204 /* Init code and data - will be freed after init */ 205 . = ALIGN(PAGE_SIZE); 206 .init.begin : AT(ADDR(.init.begin) - LOAD_OFFSET) { 207 __init_begin = .; /* paired with __init_end */ 208 } 209 210#if defined(CONFIG_X86_64) && defined(CONFIG_SMP) 211 /* 212 * percpu offsets are zero-based on SMP. PERCPU_VADDR() changes the 213 * output PHDR, so the next output section - .init.text - should 214 * start another segment - init. 215 */ 216 PERCPU_VADDR(INTERNODE_CACHE_BYTES, 0, :percpu) 217 ASSERT(SIZEOF(.data..percpu) < CONFIG_PHYSICAL_START, 218 "per-CPU data too large - increase CONFIG_PHYSICAL_START") 219#endif 220 221 INIT_TEXT_SECTION(PAGE_SIZE) 222#ifdef CONFIG_X86_64 223 :init 224#endif 225 226 /* 227 * Section for code used exclusively before alternatives are run. All 228 * references to such code must be patched out by alternatives, normally 229 * by using X86_FEATURE_ALWAYS CPU feature bit. 230 * 231 * See static_cpu_has() for an example. 232 */ 233 .altinstr_aux : AT(ADDR(.altinstr_aux) - LOAD_OFFSET) { 234 *(.altinstr_aux) 235 } 236 237 INIT_DATA_SECTION(16) 238 239 .x86_cpu_dev.init : AT(ADDR(.x86_cpu_dev.init) - LOAD_OFFSET) { 240 __x86_cpu_dev_start = .; 241 *(.x86_cpu_dev.init) 242 __x86_cpu_dev_end = .; 243 } 244 245#ifdef CONFIG_X86_INTEL_MID 246 .x86_intel_mid_dev.init : AT(ADDR(.x86_intel_mid_dev.init) - \ 247 LOAD_OFFSET) { 248 __x86_intel_mid_dev_start = .; 249 *(.x86_intel_mid_dev.init) 250 __x86_intel_mid_dev_end = .; 251 } 252#endif 253 254 /* 255 * start address and size of operations which during runtime 256 * can be patched with virtualization friendly instructions or 257 * baremetal native ones. Think page table operations. 258 * Details in paravirt_types.h 259 */ 260 . = ALIGN(8); 261 .parainstructions : AT(ADDR(.parainstructions) - LOAD_OFFSET) { 262 __parainstructions = .; 263 *(.parainstructions) 264 __parainstructions_end = .; 265 } 266 267 /* 268 * struct alt_inst entries. From the header (alternative.h): 269 * "Alternative instructions for different CPU types or capabilities" 270 * Think locking instructions on spinlocks. 271 */ 272 . = ALIGN(8); 273 .altinstructions : AT(ADDR(.altinstructions) - LOAD_OFFSET) { 274 __alt_instructions = .; 275 *(.altinstructions) 276 __alt_instructions_end = .; 277 } 278 279 /* 280 * And here are the replacement instructions. The linker sticks 281 * them as binary blobs. The .altinstructions has enough data to 282 * get the address and the length of them to patch the kernel safely. 283 */ 284 .altinstr_replacement : AT(ADDR(.altinstr_replacement) - LOAD_OFFSET) { 285 *(.altinstr_replacement) 286 } 287 288 /* 289 * struct iommu_table_entry entries are injected in this section. 290 * It is an array of IOMMUs which during run time gets sorted depending 291 * on its dependency order. After rootfs_initcall is complete 292 * this section can be safely removed. 293 */ 294 .iommu_table : AT(ADDR(.iommu_table) - LOAD_OFFSET) { 295 __iommu_table = .; 296 *(.iommu_table) 297 __iommu_table_end = .; 298 } 299 300 . = ALIGN(8); 301 .apicdrivers : AT(ADDR(.apicdrivers) - LOAD_OFFSET) { 302 __apicdrivers = .; 303 *(.apicdrivers); 304 __apicdrivers_end = .; 305 } 306 307 . = ALIGN(8); 308 /* 309 * .exit.text is discard at runtime, not link time, to deal with 310 * references from .altinstructions and .eh_frame 311 */ 312 .exit.text : AT(ADDR(.exit.text) - LOAD_OFFSET) { 313 EXIT_TEXT 314 } 315 316 .exit.data : AT(ADDR(.exit.data) - LOAD_OFFSET) { 317 EXIT_DATA 318 } 319 320#if !defined(CONFIG_X86_64) || !defined(CONFIG_SMP) 321 PERCPU_SECTION(INTERNODE_CACHE_BYTES) 322#endif 323 324 . = ALIGN(PAGE_SIZE); 325 326 /* freed after init ends here */ 327 .init.end : AT(ADDR(.init.end) - LOAD_OFFSET) { 328 __init_end = .; 329 } 330 331 /* 332 * smp_locks might be freed after init 333 * start/end must be page aligned 334 */ 335 . = ALIGN(PAGE_SIZE); 336 .smp_locks : AT(ADDR(.smp_locks) - LOAD_OFFSET) { 337 __smp_locks = .; 338 *(.smp_locks) 339 . = ALIGN(PAGE_SIZE); 340 __smp_locks_end = .; 341 } 342 343#ifdef CONFIG_X86_64 344 .data_nosave : AT(ADDR(.data_nosave) - LOAD_OFFSET) { 345 NOSAVE_DATA 346 } 347#endif 348 349 /* BSS */ 350 . = ALIGN(PAGE_SIZE); 351 .bss : AT(ADDR(.bss) - LOAD_OFFSET) { 352 __bss_start = .; 353 *(.bss..page_aligned) 354 *(.bss) 355 . = ALIGN(PAGE_SIZE); 356 __bss_stop = .; 357 } 358 359 . = ALIGN(PAGE_SIZE); 360 .brk : AT(ADDR(.brk) - LOAD_OFFSET) { 361 __brk_base = .; 362 . += 64 * 1024; /* 64k alignment slop space */ 363 *(.brk_reservation) /* areas brk users have reserved */ 364 __brk_limit = .; 365 } 366 367 . = ALIGN(PAGE_SIZE); /* keep VO_INIT_SIZE page aligned */ 368 _end = .; 369 370 STABS_DEBUG 371 DWARF_DEBUG 372 373 /* Sections to be discarded */ 374 DISCARDS 375 /DISCARD/ : { 376 *(.eh_frame) 377 } 378} 379 380 381#ifdef CONFIG_X86_32 382/* 383 * The ASSERT() sink to . is intentional, for binutils 2.14 compatibility: 384 */ 385. = ASSERT((_end - LOAD_OFFSET <= KERNEL_IMAGE_SIZE), 386 "kernel image bigger than KERNEL_IMAGE_SIZE"); 387#else 388/* 389 * Per-cpu symbols which need to be offset from __per_cpu_load 390 * for the boot processor. 391 */ 392#define INIT_PER_CPU(x) init_per_cpu__##x = x + __per_cpu_load 393INIT_PER_CPU(gdt_page); 394INIT_PER_CPU(irq_stack_union); 395 396/* 397 * Build-time check on the image size: 398 */ 399. = ASSERT((_end - _text <= KERNEL_IMAGE_SIZE), 400 "kernel image bigger than KERNEL_IMAGE_SIZE"); 401 402#ifdef CONFIG_SMP 403. = ASSERT((irq_stack_union == 0), 404 "irq_stack_union is not at start of per-cpu area"); 405#endif 406 407#endif /* CONFIG_X86_32 */ 408 409#ifdef CONFIG_KEXEC_CORE 410#include <asm/kexec.h> 411 412. = ASSERT(kexec_control_code_size <= KEXEC_CONTROL_CODE_MAX_SIZE, 413 "kexec control code size is too big"); 414#endif 415 416