xref: /openbmc/linux/arch/x86/kernel/vmlinux.lds.S (revision 2bc7d3e0) 
1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * ld script for the x86 kernel
4 *
5 * Historic 32-bit version written by Martin Mares <mj@atrey.karlin.mff.cuni.cz>
6 *
7 * Modernisation, unification and other changes and fixes:
8 *   Copyright (C) 2007-2009  Sam Ravnborg <sam@ravnborg.org>
9 *
10 *
11 * Don't define absolute symbols until and unless you know that symbol
12 * value is should remain constant even if kernel image is relocated
13 * at run time. Absolute symbols are not relocated. If symbol value should
14 * change if kernel is relocated, make the symbol section relative and
15 * put it inside the section definition.
16 */
17
18#ifdef CONFIG_X86_32
19#define LOAD_OFFSET __PAGE_OFFSET
20#else
21#define LOAD_OFFSET __START_KERNEL_map
22#endif
23
24#define RUNTIME_DISCARD_EXIT
25#define EMITS_PT_NOTE
26#define RO_EXCEPTION_TABLE_ALIGN	16
27
28#include <asm-generic/vmlinux.lds.h>
29#include <asm/asm-offsets.h>
30#include <asm/thread_info.h>
31#include <asm/page_types.h>
32#include <asm/orc_lookup.h>
33#include <asm/cache.h>
34#include <asm/boot.h>
35
36#undef i386     /* in case the preprocessor is a 32bit one */
37
38OUTPUT_FORMAT(CONFIG_OUTPUT_FORMAT)
39
40#ifdef CONFIG_X86_32
41OUTPUT_ARCH(i386)
42ENTRY(phys_startup_32)
43#else
44OUTPUT_ARCH(i386:x86-64)
45ENTRY(phys_startup_64)
46#endif
47
48jiffies = jiffies_64;
49
50#if defined(CONFIG_X86_64)
51/*
52 * On 64-bit, align RODATA to 2MB so we retain large page mappings for
53 * boundaries spanning kernel text, rodata and data sections.
54 *
55 * However, kernel identity mappings will have different RWX permissions
56 * to the pages mapping to text and to the pages padding (which are freed) the
57 * text section. Hence kernel identity mappings will be broken to smaller
58 * pages. For 64-bit, kernel text and kernel identity mappings are different,
59 * so we can enable protection checks as well as retain 2MB large page
60 * mappings for kernel text.
61 */
62#define X86_ALIGN_RODATA_BEGIN	. = ALIGN(HPAGE_SIZE);
63
64#define X86_ALIGN_RODATA_END					\
65		. = ALIGN(HPAGE_SIZE);				\
66		__end_rodata_hpage_align = .;			\
67		__end_rodata_aligned = .;
68
69#define ALIGN_ENTRY_TEXT_BEGIN	. = ALIGN(PMD_SIZE);
70#define ALIGN_ENTRY_TEXT_END	. = ALIGN(PMD_SIZE);
71
72/*
73 * This section contains data which will be mapped as decrypted. Memory
74 * encryption operates on a page basis. Make this section PMD-aligned
75 * to avoid splitting the pages while mapping the section early.
76 *
77 * Note: We use a separate section so that only this section gets
78 * decrypted to avoid exposing more than we wish.
79 */
80#define BSS_DECRYPTED						\
81	. = ALIGN(PMD_SIZE);					\
82	__start_bss_decrypted = .;				\
83	*(.bss..decrypted);					\
84	. = ALIGN(PAGE_SIZE);					\
85	__start_bss_decrypted_unused = .;			\
86	. = ALIGN(PMD_SIZE);					\
87	__end_bss_decrypted = .;				\
88
89#else
90
91#define X86_ALIGN_RODATA_BEGIN
92#define X86_ALIGN_RODATA_END					\
93		. = ALIGN(PAGE_SIZE);				\
94		__end_rodata_aligned = .;
95
96#define ALIGN_ENTRY_TEXT_BEGIN
97#define ALIGN_ENTRY_TEXT_END
98#define BSS_DECRYPTED
99
100#endif
101
102PHDRS {
103	text PT_LOAD FLAGS(5);          /* R_E */
104	data PT_LOAD FLAGS(6);          /* RW_ */
105#ifdef CONFIG_X86_64
106#ifdef CONFIG_SMP
107	percpu PT_LOAD FLAGS(6);        /* RW_ */
108#endif
109	init PT_LOAD FLAGS(7);          /* RWE */
110#endif
111	note PT_NOTE FLAGS(0);          /* ___ */
112}
113
114SECTIONS
115{
116#ifdef CONFIG_X86_32
117	. = LOAD_OFFSET + LOAD_PHYSICAL_ADDR;
118	phys_startup_32 = ABSOLUTE(startup_32 - LOAD_OFFSET);
119#else
120	. = __START_KERNEL;
121	phys_startup_64 = ABSOLUTE(startup_64 - LOAD_OFFSET);
122#endif
123
124	/* Text and read-only data */
125	.text :  AT(ADDR(.text) - LOAD_OFFSET) {
126		_text = .;
127		_stext = .;
128		/* bootstrapping code */
129		HEAD_TEXT
130		TEXT_TEXT
131		SCHED_TEXT
132		CPUIDLE_TEXT
133		LOCK_TEXT
134		KPROBES_TEXT
135		ALIGN_ENTRY_TEXT_BEGIN
136		ENTRY_TEXT
137		ALIGN_ENTRY_TEXT_END
138		SOFTIRQENTRY_TEXT
139		STATIC_CALL_TEXT
140		*(.gnu.warning)
141
142#ifdef CONFIG_RETPOLINE
143		__indirect_thunk_start = .;
144		*(.text.__x86.indirect_thunk)
145		__indirect_thunk_end = .;
146#endif
147	} :text =0xcccc
148
149	/* End of text section, which should occupy whole number of pages */
150	_etext = .;
151	. = ALIGN(PAGE_SIZE);
152
153	X86_ALIGN_RODATA_BEGIN
154	RO_DATA(PAGE_SIZE)
155	X86_ALIGN_RODATA_END
156
157	/* Data */
158	.data : AT(ADDR(.data) - LOAD_OFFSET) {
159		/* Start of data section */
160		_sdata = .;
161
162		/* init_task */
163		INIT_TASK_DATA(THREAD_SIZE)
164
165#ifdef CONFIG_X86_32
166		/* 32 bit has nosave before _edata */
167		NOSAVE_DATA
168#endif
169
170		PAGE_ALIGNED_DATA(PAGE_SIZE)
171
172		CACHELINE_ALIGNED_DATA(L1_CACHE_BYTES)
173
174		DATA_DATA
175		CONSTRUCTORS
176
177		/* rarely changed data like cpu maps */
178		READ_MOSTLY_DATA(INTERNODE_CACHE_BYTES)
179
180		/* End of data section */
181		_edata = .;
182	} :data
183
184	BUG_TABLE
185
186	ORC_UNWIND_TABLE
187
188	. = ALIGN(PAGE_SIZE);
189	__vvar_page = .;
190
191	.vvar : AT(ADDR(.vvar) - LOAD_OFFSET) {
192		/* work around gold bug 13023 */
193		__vvar_beginning_hack = .;
194
195		/* Place all vvars at the offsets in asm/vvar.h. */
196#define EMIT_VVAR(name, offset)				\
197		. = __vvar_beginning_hack + offset;	\
198		*(.vvar_ ## name)
199#include <asm/vvar.h>
200#undef EMIT_VVAR
201
202		/*
203		 * Pad the rest of the page with zeros.  Otherwise the loader
204		 * can leave garbage here.
205		 */
206		. = __vvar_beginning_hack + PAGE_SIZE;
207	} :data
208
209	. = ALIGN(__vvar_page + PAGE_SIZE, PAGE_SIZE);
210
211	/* Init code and data - will be freed after init */
212	. = ALIGN(PAGE_SIZE);
213	.init.begin : AT(ADDR(.init.begin) - LOAD_OFFSET) {
214		__init_begin = .; /* paired with __init_end */
215	}
216
217#if defined(CONFIG_X86_64) && defined(CONFIG_SMP)
218	/*
219	 * percpu offsets are zero-based on SMP.  PERCPU_VADDR() changes the
220	 * output PHDR, so the next output section - .init.text - should
221	 * start another segment - init.
222	 */
223	PERCPU_VADDR(INTERNODE_CACHE_BYTES, 0, :percpu)
224	ASSERT(SIZEOF(.data..percpu) < CONFIG_PHYSICAL_START,
225	       "per-CPU data too large - increase CONFIG_PHYSICAL_START")
226#endif
227
228	INIT_TEXT_SECTION(PAGE_SIZE)
229#ifdef CONFIG_X86_64
230	:init
231#endif
232
233	/*
234	 * Section for code used exclusively before alternatives are run. All
235	 * references to such code must be patched out by alternatives, normally
236	 * by using X86_FEATURE_ALWAYS CPU feature bit.
237	 *
238	 * See static_cpu_has() for an example.
239	 */
240	.altinstr_aux : AT(ADDR(.altinstr_aux) - LOAD_OFFSET) {
241		*(.altinstr_aux)
242	}
243
244	INIT_DATA_SECTION(16)
245
246	.x86_cpu_dev.init : AT(ADDR(.x86_cpu_dev.init) - LOAD_OFFSET) {
247		__x86_cpu_dev_start = .;
248		*(.x86_cpu_dev.init)
249		__x86_cpu_dev_end = .;
250	}
251
252#ifdef CONFIG_X86_INTEL_MID
253	.x86_intel_mid_dev.init : AT(ADDR(.x86_intel_mid_dev.init) - \
254								LOAD_OFFSET) {
255		__x86_intel_mid_dev_start = .;
256		*(.x86_intel_mid_dev.init)
257		__x86_intel_mid_dev_end = .;
258	}
259#endif
260
261	/*
262	 * start address and size of operations which during runtime
263	 * can be patched with virtualization friendly instructions or
264	 * baremetal native ones. Think page table operations.
265	 * Details in paravirt_types.h
266	 */
267	. = ALIGN(8);
268	.parainstructions : AT(ADDR(.parainstructions) - LOAD_OFFSET) {
269		__parainstructions = .;
270		*(.parainstructions)
271		__parainstructions_end = .;
272	}
273
274#ifdef CONFIG_RETPOLINE
275	/*
276	 * List of instructions that call/jmp/jcc to retpoline thunks
277	 * __x86_indirect_thunk_*(). These instructions can be patched along
278	 * with alternatives, after which the section can be freed.
279	 */
280	. = ALIGN(8);
281	.retpoline_sites : AT(ADDR(.retpoline_sites) - LOAD_OFFSET) {
282		__retpoline_sites = .;
283		*(.retpoline_sites)
284		__retpoline_sites_end = .;
285	}
286#endif
287
288#ifdef CONFIG_X86_KERNEL_IBT
289	. = ALIGN(8);
290	.ibt_endbr_seal : AT(ADDR(.ibt_endbr_seal) - LOAD_OFFSET) {
291		__ibt_endbr_seal = .;
292		*(.ibt_endbr_seal)
293		__ibt_endbr_seal_end = .;
294	}
295#endif
296
297	/*
298	 * struct alt_inst entries. From the header (alternative.h):
299	 * "Alternative instructions for different CPU types or capabilities"
300	 * Think locking instructions on spinlocks.
301	 */
302	. = ALIGN(8);
303	.altinstructions : AT(ADDR(.altinstructions) - LOAD_OFFSET) {
304		__alt_instructions = .;
305		*(.altinstructions)
306		__alt_instructions_end = .;
307	}
308
309	/*
310	 * And here are the replacement instructions. The linker sticks
311	 * them as binary blobs. The .altinstructions has enough data to
312	 * get the address and the length of them to patch the kernel safely.
313	 */
314	.altinstr_replacement : AT(ADDR(.altinstr_replacement) - LOAD_OFFSET) {
315		*(.altinstr_replacement)
316	}
317
318	. = ALIGN(8);
319	.apicdrivers : AT(ADDR(.apicdrivers) - LOAD_OFFSET) {
320		__apicdrivers = .;
321		*(.apicdrivers);
322		__apicdrivers_end = .;
323	}
324
325	. = ALIGN(8);
326	/*
327	 * .exit.text is discarded at runtime, not link time, to deal with
328	 *  references from .altinstructions
329	 */
330	.exit.text : AT(ADDR(.exit.text) - LOAD_OFFSET) {
331		EXIT_TEXT
332	}
333
334	.exit.data : AT(ADDR(.exit.data) - LOAD_OFFSET) {
335		EXIT_DATA
336	}
337
338#if !defined(CONFIG_X86_64) || !defined(CONFIG_SMP)
339	PERCPU_SECTION(INTERNODE_CACHE_BYTES)
340#endif
341
342	. = ALIGN(PAGE_SIZE);
343
344	/* freed after init ends here */
345	.init.end : AT(ADDR(.init.end) - LOAD_OFFSET) {
346		__init_end = .;
347	}
348
349	/*
350	 * smp_locks might be freed after init
351	 * start/end must be page aligned
352	 */
353	. = ALIGN(PAGE_SIZE);
354	.smp_locks : AT(ADDR(.smp_locks) - LOAD_OFFSET) {
355		__smp_locks = .;
356		*(.smp_locks)
357		. = ALIGN(PAGE_SIZE);
358		__smp_locks_end = .;
359	}
360
361#ifdef CONFIG_X86_64
362	.data_nosave : AT(ADDR(.data_nosave) - LOAD_OFFSET) {
363		NOSAVE_DATA
364	}
365#endif
366
367	/* BSS */
368	. = ALIGN(PAGE_SIZE);
369	.bss : AT(ADDR(.bss) - LOAD_OFFSET) {
370		__bss_start = .;
371		*(.bss..page_aligned)
372		. = ALIGN(PAGE_SIZE);
373		*(BSS_MAIN)
374		BSS_DECRYPTED
375		. = ALIGN(PAGE_SIZE);
376		__bss_stop = .;
377	}
378
379	/*
380	 * The memory occupied from _text to here, __end_of_kernel_reserve, is
381	 * automatically reserved in setup_arch(). Anything after here must be
382	 * explicitly reserved using memblock_reserve() or it will be discarded
383	 * and treated as available memory.
384	 */
385	__end_of_kernel_reserve = .;
386
387	. = ALIGN(PAGE_SIZE);
388	.brk : AT(ADDR(.brk) - LOAD_OFFSET) {
389		__brk_base = .;
390		. += 64 * 1024;		/* 64k alignment slop space */
391		*(.brk_reservation)	/* areas brk users have reserved */
392		__brk_limit = .;
393	}
394
395	. = ALIGN(PAGE_SIZE);		/* keep VO_INIT_SIZE page aligned */
396	_end = .;
397
398#ifdef CONFIG_AMD_MEM_ENCRYPT
399	/*
400	 * Early scratch/workarea section: Lives outside of the kernel proper
401	 * (_text - _end).
402	 *
403	 * Resides after _end because even though the .brk section is after
404	 * __end_of_kernel_reserve, the .brk section is later reserved as a
405	 * part of the kernel. Since it is located after __end_of_kernel_reserve
406	 * it will be discarded and become part of the available memory. As
407	 * such, it can only be used by very early boot code and must not be
408	 * needed afterwards.
409	 *
410	 * Currently used by SME for performing in-place encryption of the
411	 * kernel during boot. Resides on a 2MB boundary to simplify the
412	 * pagetable setup used for SME in-place encryption.
413	 */
414	. = ALIGN(HPAGE_SIZE);
415	.init.scratch : AT(ADDR(.init.scratch) - LOAD_OFFSET) {
416		__init_scratch_begin = .;
417		*(.init.scratch)
418		. = ALIGN(HPAGE_SIZE);
419		__init_scratch_end = .;
420	}
421#endif
422
423	STABS_DEBUG
424	DWARF_DEBUG
425	ELF_DETAILS
426
427	DISCARDS
428
429	/*
430	 * Make sure that the .got.plt is either completely empty or it
431	 * contains only the lazy dispatch entries.
432	 */
433	.got.plt (INFO) : { *(.got.plt) }
434	ASSERT(SIZEOF(.got.plt) == 0 ||
435#ifdef CONFIG_X86_64
436	       SIZEOF(.got.plt) == 0x18,
437#else
438	       SIZEOF(.got.plt) == 0xc,
439#endif
440	       "Unexpected GOT/PLT entries detected!")
441
442	/*
443	 * Sections that should stay zero sized, which is safer to
444	 * explicitly check instead of blindly discarding.
445	 */
446	.got : {
447		*(.got) *(.igot.*)
448	}
449	ASSERT(SIZEOF(.got) == 0, "Unexpected GOT entries detected!")
450
451	.plt : {
452		*(.plt) *(.plt.*) *(.iplt)
453	}
454	ASSERT(SIZEOF(.plt) == 0, "Unexpected run-time procedure linkages detected!")
455
456	.rel.dyn : {
457		*(.rel.*) *(.rel_*)
458	}
459	ASSERT(SIZEOF(.rel.dyn) == 0, "Unexpected run-time relocations (.rel) detected!")
460
461	.rela.dyn : {
462		*(.rela.*) *(.rela_*)
463	}
464	ASSERT(SIZEOF(.rela.dyn) == 0, "Unexpected run-time relocations (.rela) detected!")
465}
466
467/*
468 * The ASSERT() sink to . is intentional, for binutils 2.14 compatibility:
469 */
470. = ASSERT((_end - LOAD_OFFSET <= KERNEL_IMAGE_SIZE),
471	   "kernel image bigger than KERNEL_IMAGE_SIZE");
472
473#ifdef CONFIG_X86_64
474/*
475 * Per-cpu symbols which need to be offset from __per_cpu_load
476 * for the boot processor.
477 */
478#define INIT_PER_CPU(x) init_per_cpu__##x = ABSOLUTE(x) + __per_cpu_load
479INIT_PER_CPU(gdt_page);
480INIT_PER_CPU(fixed_percpu_data);
481INIT_PER_CPU(irq_stack_backing_store);
482
483#ifdef CONFIG_SMP
484. = ASSERT((fixed_percpu_data == 0),
485           "fixed_percpu_data is not at start of per-cpu area");
486#endif
487
488#endif /* CONFIG_X86_64 */
489
490#ifdef CONFIG_KEXEC_CORE
491#include <asm/kexec.h>
492
493. = ASSERT(kexec_control_code_size <= KEXEC_CONTROL_CODE_MAX_SIZE,
494           "kexec control code size is too big");
495#endif
496
497