xref: /openbmc/linux/arch/x86/kernel/traps.c (revision e8f6f3b4)
1 /*
2  *  Copyright (C) 1991, 1992  Linus Torvalds
3  *  Copyright (C) 2000, 2001, 2002 Andi Kleen, SuSE Labs
4  *
5  *  Pentium III FXSR, SSE support
6  *	Gareth Hughes <gareth@valinux.com>, May 2000
7  */
8 
9 /*
10  * Handle hardware traps and faults.
11  */
12 
13 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
14 
15 #include <linux/context_tracking.h>
16 #include <linux/interrupt.h>
17 #include <linux/kallsyms.h>
18 #include <linux/spinlock.h>
19 #include <linux/kprobes.h>
20 #include <linux/uaccess.h>
21 #include <linux/kdebug.h>
22 #include <linux/kgdb.h>
23 #include <linux/kernel.h>
24 #include <linux/module.h>
25 #include <linux/ptrace.h>
26 #include <linux/uprobes.h>
27 #include <linux/string.h>
28 #include <linux/delay.h>
29 #include <linux/errno.h>
30 #include <linux/kexec.h>
31 #include <linux/sched.h>
32 #include <linux/timer.h>
33 #include <linux/init.h>
34 #include <linux/bug.h>
35 #include <linux/nmi.h>
36 #include <linux/mm.h>
37 #include <linux/smp.h>
38 #include <linux/io.h>
39 
40 #ifdef CONFIG_EISA
41 #include <linux/ioport.h>
42 #include <linux/eisa.h>
43 #endif
44 
45 #if defined(CONFIG_EDAC)
46 #include <linux/edac.h>
47 #endif
48 
49 #include <asm/kmemcheck.h>
50 #include <asm/stacktrace.h>
51 #include <asm/processor.h>
52 #include <asm/debugreg.h>
53 #include <linux/atomic.h>
54 #include <asm/ftrace.h>
55 #include <asm/traps.h>
56 #include <asm/desc.h>
57 #include <asm/i387.h>
58 #include <asm/fpu-internal.h>
59 #include <asm/mce.h>
60 #include <asm/fixmap.h>
61 #include <asm/mach_traps.h>
62 #include <asm/alternative.h>
63 #include <asm/mpx.h>
64 
65 #ifdef CONFIG_X86_64
66 #include <asm/x86_init.h>
67 #include <asm/pgalloc.h>
68 #include <asm/proto.h>
69 
70 /* No need to be aligned, but done to keep all IDTs defined the same way. */
71 gate_desc debug_idt_table[NR_VECTORS] __page_aligned_bss;
72 #else
73 #include <asm/processor-flags.h>
74 #include <asm/setup.h>
75 
76 asmlinkage int system_call(void);
77 #endif
78 
79 /* Must be page-aligned because the real IDT is used in a fixmap. */
80 gate_desc idt_table[NR_VECTORS] __page_aligned_bss;
81 
82 DECLARE_BITMAP(used_vectors, NR_VECTORS);
83 EXPORT_SYMBOL_GPL(used_vectors);
84 
85 static inline void conditional_sti(struct pt_regs *regs)
86 {
87 	if (regs->flags & X86_EFLAGS_IF)
88 		local_irq_enable();
89 }
90 
91 static inline void preempt_conditional_sti(struct pt_regs *regs)
92 {
93 	preempt_count_inc();
94 	if (regs->flags & X86_EFLAGS_IF)
95 		local_irq_enable();
96 }
97 
98 static inline void conditional_cli(struct pt_regs *regs)
99 {
100 	if (regs->flags & X86_EFLAGS_IF)
101 		local_irq_disable();
102 }
103 
104 static inline void preempt_conditional_cli(struct pt_regs *regs)
105 {
106 	if (regs->flags & X86_EFLAGS_IF)
107 		local_irq_disable();
108 	preempt_count_dec();
109 }
110 
111 static nokprobe_inline int
112 do_trap_no_signal(struct task_struct *tsk, int trapnr, char *str,
113 		  struct pt_regs *regs,	long error_code)
114 {
115 #ifdef CONFIG_X86_32
116 	if (regs->flags & X86_VM_MASK) {
117 		/*
118 		 * Traps 0, 1, 3, 4, and 5 should be forwarded to vm86.
119 		 * On nmi (interrupt 2), do_trap should not be called.
120 		 */
121 		if (trapnr < X86_TRAP_UD) {
122 			if (!handle_vm86_trap((struct kernel_vm86_regs *) regs,
123 						error_code, trapnr))
124 				return 0;
125 		}
126 		return -1;
127 	}
128 #endif
129 	if (!user_mode(regs)) {
130 		if (!fixup_exception(regs)) {
131 			tsk->thread.error_code = error_code;
132 			tsk->thread.trap_nr = trapnr;
133 			die(str, regs, error_code);
134 		}
135 		return 0;
136 	}
137 
138 	return -1;
139 }
140 
141 static siginfo_t *fill_trap_info(struct pt_regs *regs, int signr, int trapnr,
142 				siginfo_t *info)
143 {
144 	unsigned long siaddr;
145 	int sicode;
146 
147 	switch (trapnr) {
148 	default:
149 		return SEND_SIG_PRIV;
150 
151 	case X86_TRAP_DE:
152 		sicode = FPE_INTDIV;
153 		siaddr = uprobe_get_trap_addr(regs);
154 		break;
155 	case X86_TRAP_UD:
156 		sicode = ILL_ILLOPN;
157 		siaddr = uprobe_get_trap_addr(regs);
158 		break;
159 	case X86_TRAP_AC:
160 		sicode = BUS_ADRALN;
161 		siaddr = 0;
162 		break;
163 	}
164 
165 	info->si_signo = signr;
166 	info->si_errno = 0;
167 	info->si_code = sicode;
168 	info->si_addr = (void __user *)siaddr;
169 	return info;
170 }
171 
172 static void
173 do_trap(int trapnr, int signr, char *str, struct pt_regs *regs,
174 	long error_code, siginfo_t *info)
175 {
176 	struct task_struct *tsk = current;
177 
178 
179 	if (!do_trap_no_signal(tsk, trapnr, str, regs, error_code))
180 		return;
181 	/*
182 	 * We want error_code and trap_nr set for userspace faults and
183 	 * kernelspace faults which result in die(), but not
184 	 * kernelspace faults which are fixed up.  die() gives the
185 	 * process no chance to handle the signal and notice the
186 	 * kernel fault information, so that won't result in polluting
187 	 * the information about previously queued, but not yet
188 	 * delivered, faults.  See also do_general_protection below.
189 	 */
190 	tsk->thread.error_code = error_code;
191 	tsk->thread.trap_nr = trapnr;
192 
193 #ifdef CONFIG_X86_64
194 	if (show_unhandled_signals && unhandled_signal(tsk, signr) &&
195 	    printk_ratelimit()) {
196 		pr_info("%s[%d] trap %s ip:%lx sp:%lx error:%lx",
197 			tsk->comm, tsk->pid, str,
198 			regs->ip, regs->sp, error_code);
199 		print_vma_addr(" in ", regs->ip);
200 		pr_cont("\n");
201 	}
202 #endif
203 
204 	force_sig_info(signr, info ?: SEND_SIG_PRIV, tsk);
205 }
206 NOKPROBE_SYMBOL(do_trap);
207 
208 static void do_error_trap(struct pt_regs *regs, long error_code, char *str,
209 			  unsigned long trapnr, int signr)
210 {
211 	enum ctx_state prev_state = exception_enter();
212 	siginfo_t info;
213 
214 	if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) !=
215 			NOTIFY_STOP) {
216 		conditional_sti(regs);
217 		do_trap(trapnr, signr, str, regs, error_code,
218 			fill_trap_info(regs, signr, trapnr, &info));
219 	}
220 
221 	exception_exit(prev_state);
222 }
223 
224 #define DO_ERROR(trapnr, signr, str, name)				\
225 dotraplinkage void do_##name(struct pt_regs *regs, long error_code)	\
226 {									\
227 	do_error_trap(regs, error_code, str, trapnr, signr);		\
228 }
229 
230 DO_ERROR(X86_TRAP_DE,     SIGFPE,  "divide error",		divide_error)
231 DO_ERROR(X86_TRAP_OF,     SIGSEGV, "overflow",			overflow)
232 DO_ERROR(X86_TRAP_UD,     SIGILL,  "invalid opcode",		invalid_op)
233 DO_ERROR(X86_TRAP_OLD_MF, SIGFPE,  "coprocessor segment overrun",coprocessor_segment_overrun)
234 DO_ERROR(X86_TRAP_TS,     SIGSEGV, "invalid TSS",		invalid_TSS)
235 DO_ERROR(X86_TRAP_NP,     SIGBUS,  "segment not present",	segment_not_present)
236 DO_ERROR(X86_TRAP_SS,     SIGBUS,  "stack segment",		stack_segment)
237 DO_ERROR(X86_TRAP_AC,     SIGBUS,  "alignment check",		alignment_check)
238 
239 #ifdef CONFIG_X86_64
240 /* Runs on IST stack */
241 dotraplinkage void do_double_fault(struct pt_regs *regs, long error_code)
242 {
243 	static const char str[] = "double fault";
244 	struct task_struct *tsk = current;
245 
246 #ifdef CONFIG_X86_ESPFIX64
247 	extern unsigned char native_irq_return_iret[];
248 
249 	/*
250 	 * If IRET takes a non-IST fault on the espfix64 stack, then we
251 	 * end up promoting it to a doublefault.  In that case, modify
252 	 * the stack to make it look like we just entered the #GP
253 	 * handler from user space, similar to bad_iret.
254 	 */
255 	if (((long)regs->sp >> PGDIR_SHIFT) == ESPFIX_PGD_ENTRY &&
256 		regs->cs == __KERNEL_CS &&
257 		regs->ip == (unsigned long)native_irq_return_iret)
258 	{
259 		struct pt_regs *normal_regs = task_pt_regs(current);
260 
261 		/* Fake a #GP(0) from userspace. */
262 		memmove(&normal_regs->ip, (void *)regs->sp, 5*8);
263 		normal_regs->orig_ax = 0;  /* Missing (lost) #GP error code */
264 		regs->ip = (unsigned long)general_protection;
265 		regs->sp = (unsigned long)&normal_regs->orig_ax;
266 		return;
267 	}
268 #endif
269 
270 	exception_enter();
271 	/* Return not checked because double check cannot be ignored */
272 	notify_die(DIE_TRAP, str, regs, error_code, X86_TRAP_DF, SIGSEGV);
273 
274 	tsk->thread.error_code = error_code;
275 	tsk->thread.trap_nr = X86_TRAP_DF;
276 
277 #ifdef CONFIG_DOUBLEFAULT
278 	df_debug(regs, error_code);
279 #endif
280 	/*
281 	 * This is always a kernel trap and never fixable (and thus must
282 	 * never return).
283 	 */
284 	for (;;)
285 		die(str, regs, error_code);
286 }
287 #endif
288 
289 dotraplinkage void do_bounds(struct pt_regs *regs, long error_code)
290 {
291 	struct task_struct *tsk = current;
292 	struct xsave_struct *xsave_buf;
293 	enum ctx_state prev_state;
294 	struct bndcsr *bndcsr;
295 	siginfo_t *info;
296 
297 	prev_state = exception_enter();
298 	if (notify_die(DIE_TRAP, "bounds", regs, error_code,
299 			X86_TRAP_BR, SIGSEGV) == NOTIFY_STOP)
300 		goto exit;
301 	conditional_sti(regs);
302 
303 	if (!user_mode(regs))
304 		die("bounds", regs, error_code);
305 
306 	if (!cpu_feature_enabled(X86_FEATURE_MPX)) {
307 		/* The exception is not from Intel MPX */
308 		goto exit_trap;
309 	}
310 
311 	/*
312 	 * We need to look at BNDSTATUS to resolve this exception.
313 	 * It is not directly accessible, though, so we need to
314 	 * do an xsave and then pull it out of the xsave buffer.
315 	 */
316 	fpu_save_init(&tsk->thread.fpu);
317 	xsave_buf = &(tsk->thread.fpu.state->xsave);
318 	bndcsr = get_xsave_addr(xsave_buf, XSTATE_BNDCSR);
319 	if (!bndcsr)
320 		goto exit_trap;
321 
322 	/*
323 	 * The error code field of the BNDSTATUS register communicates status
324 	 * information of a bound range exception #BR or operation involving
325 	 * bound directory.
326 	 */
327 	switch (bndcsr->bndstatus & MPX_BNDSTA_ERROR_CODE) {
328 	case 2:	/* Bound directory has invalid entry. */
329 		if (mpx_handle_bd_fault(xsave_buf))
330 			goto exit_trap;
331 		break; /* Success, it was handled */
332 	case 1: /* Bound violation. */
333 		info = mpx_generate_siginfo(regs, xsave_buf);
334 		if (IS_ERR(info)) {
335 			/*
336 			 * We failed to decode the MPX instruction.  Act as if
337 			 * the exception was not caused by MPX.
338 			 */
339 			goto exit_trap;
340 		}
341 		/*
342 		 * Success, we decoded the instruction and retrieved
343 		 * an 'info' containing the address being accessed
344 		 * which caused the exception.  This information
345 		 * allows and application to possibly handle the
346 		 * #BR exception itself.
347 		 */
348 		do_trap(X86_TRAP_BR, SIGSEGV, "bounds", regs, error_code, info);
349 		kfree(info);
350 		break;
351 	case 0: /* No exception caused by Intel MPX operations. */
352 		goto exit_trap;
353 	default:
354 		die("bounds", regs, error_code);
355 	}
356 
357 exit:
358 	exception_exit(prev_state);
359 	return;
360 exit_trap:
361 	/*
362 	 * This path out is for all the cases where we could not
363 	 * handle the exception in some way (like allocating a
364 	 * table or telling userspace about it.  We will also end
365 	 * up here if the kernel has MPX turned off at compile
366 	 * time..
367 	 */
368 	do_trap(X86_TRAP_BR, SIGSEGV, "bounds", regs, error_code, NULL);
369 	exception_exit(prev_state);
370 }
371 
372 dotraplinkage void
373 do_general_protection(struct pt_regs *regs, long error_code)
374 {
375 	struct task_struct *tsk;
376 	enum ctx_state prev_state;
377 
378 	prev_state = exception_enter();
379 	conditional_sti(regs);
380 
381 #ifdef CONFIG_X86_32
382 	if (regs->flags & X86_VM_MASK) {
383 		local_irq_enable();
384 		handle_vm86_fault((struct kernel_vm86_regs *) regs, error_code);
385 		goto exit;
386 	}
387 #endif
388 
389 	tsk = current;
390 	if (!user_mode(regs)) {
391 		if (fixup_exception(regs))
392 			goto exit;
393 
394 		tsk->thread.error_code = error_code;
395 		tsk->thread.trap_nr = X86_TRAP_GP;
396 		if (notify_die(DIE_GPF, "general protection fault", regs, error_code,
397 			       X86_TRAP_GP, SIGSEGV) != NOTIFY_STOP)
398 			die("general protection fault", regs, error_code);
399 		goto exit;
400 	}
401 
402 	tsk->thread.error_code = error_code;
403 	tsk->thread.trap_nr = X86_TRAP_GP;
404 
405 	if (show_unhandled_signals && unhandled_signal(tsk, SIGSEGV) &&
406 			printk_ratelimit()) {
407 		pr_info("%s[%d] general protection ip:%lx sp:%lx error:%lx",
408 			tsk->comm, task_pid_nr(tsk),
409 			regs->ip, regs->sp, error_code);
410 		print_vma_addr(" in ", regs->ip);
411 		pr_cont("\n");
412 	}
413 
414 	force_sig_info(SIGSEGV, SEND_SIG_PRIV, tsk);
415 exit:
416 	exception_exit(prev_state);
417 }
418 NOKPROBE_SYMBOL(do_general_protection);
419 
420 /* May run on IST stack. */
421 dotraplinkage void notrace do_int3(struct pt_regs *regs, long error_code)
422 {
423 	enum ctx_state prev_state;
424 
425 #ifdef CONFIG_DYNAMIC_FTRACE
426 	/*
427 	 * ftrace must be first, everything else may cause a recursive crash.
428 	 * See note by declaration of modifying_ftrace_code in ftrace.c
429 	 */
430 	if (unlikely(atomic_read(&modifying_ftrace_code)) &&
431 	    ftrace_int3_handler(regs))
432 		return;
433 #endif
434 	if (poke_int3_handler(regs))
435 		return;
436 
437 	prev_state = exception_enter();
438 #ifdef CONFIG_KGDB_LOW_LEVEL_TRAP
439 	if (kgdb_ll_trap(DIE_INT3, "int3", regs, error_code, X86_TRAP_BP,
440 				SIGTRAP) == NOTIFY_STOP)
441 		goto exit;
442 #endif /* CONFIG_KGDB_LOW_LEVEL_TRAP */
443 
444 #ifdef CONFIG_KPROBES
445 	if (kprobe_int3_handler(regs))
446 		goto exit;
447 #endif
448 
449 	if (notify_die(DIE_INT3, "int3", regs, error_code, X86_TRAP_BP,
450 			SIGTRAP) == NOTIFY_STOP)
451 		goto exit;
452 
453 	/*
454 	 * Let others (NMI) know that the debug stack is in use
455 	 * as we may switch to the interrupt stack.
456 	 */
457 	debug_stack_usage_inc();
458 	preempt_conditional_sti(regs);
459 	do_trap(X86_TRAP_BP, SIGTRAP, "int3", regs, error_code, NULL);
460 	preempt_conditional_cli(regs);
461 	debug_stack_usage_dec();
462 exit:
463 	exception_exit(prev_state);
464 }
465 NOKPROBE_SYMBOL(do_int3);
466 
467 #ifdef CONFIG_X86_64
468 /*
469  * Help handler running on IST stack to switch back to user stack
470  * for scheduling or signal handling. The actual stack switch is done in
471  * entry.S
472  */
473 asmlinkage __visible notrace struct pt_regs *sync_regs(struct pt_regs *eregs)
474 {
475 	struct pt_regs *regs = eregs;
476 	/* Did already sync */
477 	if (eregs == (struct pt_regs *)eregs->sp)
478 		;
479 	/* Exception from user space */
480 	else if (user_mode(eregs))
481 		regs = task_pt_regs(current);
482 	/*
483 	 * Exception from kernel and interrupts are enabled. Move to
484 	 * kernel process stack.
485 	 */
486 	else if (eregs->flags & X86_EFLAGS_IF)
487 		regs = (struct pt_regs *)(eregs->sp -= sizeof(struct pt_regs));
488 	if (eregs != regs)
489 		*regs = *eregs;
490 	return regs;
491 }
492 NOKPROBE_SYMBOL(sync_regs);
493 
494 struct bad_iret_stack {
495 	void *error_entry_ret;
496 	struct pt_regs regs;
497 };
498 
499 asmlinkage __visible notrace
500 struct bad_iret_stack *fixup_bad_iret(struct bad_iret_stack *s)
501 {
502 	/*
503 	 * This is called from entry_64.S early in handling a fault
504 	 * caused by a bad iret to user mode.  To handle the fault
505 	 * correctly, we want move our stack frame to task_pt_regs
506 	 * and we want to pretend that the exception came from the
507 	 * iret target.
508 	 */
509 	struct bad_iret_stack *new_stack =
510 		container_of(task_pt_regs(current),
511 			     struct bad_iret_stack, regs);
512 
513 	/* Copy the IRET target to the new stack. */
514 	memmove(&new_stack->regs.ip, (void *)s->regs.sp, 5*8);
515 
516 	/* Copy the remainder of the stack from the current stack. */
517 	memmove(new_stack, s, offsetof(struct bad_iret_stack, regs.ip));
518 
519 	BUG_ON(!user_mode_vm(&new_stack->regs));
520 	return new_stack;
521 }
522 NOKPROBE_SYMBOL(fixup_bad_iret);
523 #endif
524 
525 /*
526  * Our handling of the processor debug registers is non-trivial.
527  * We do not clear them on entry and exit from the kernel. Therefore
528  * it is possible to get a watchpoint trap here from inside the kernel.
529  * However, the code in ./ptrace.c has ensured that the user can
530  * only set watchpoints on userspace addresses. Therefore the in-kernel
531  * watchpoint trap can only occur in code which is reading/writing
532  * from user space. Such code must not hold kernel locks (since it
533  * can equally take a page fault), therefore it is safe to call
534  * force_sig_info even though that claims and releases locks.
535  *
536  * Code in ./signal.c ensures that the debug control register
537  * is restored before we deliver any signal, and therefore that
538  * user code runs with the correct debug control register even though
539  * we clear it here.
540  *
541  * Being careful here means that we don't have to be as careful in a
542  * lot of more complicated places (task switching can be a bit lazy
543  * about restoring all the debug state, and ptrace doesn't have to
544  * find every occurrence of the TF bit that could be saved away even
545  * by user code)
546  *
547  * May run on IST stack.
548  */
549 dotraplinkage void do_debug(struct pt_regs *regs, long error_code)
550 {
551 	struct task_struct *tsk = current;
552 	enum ctx_state prev_state;
553 	int user_icebp = 0;
554 	unsigned long dr6;
555 	int si_code;
556 
557 	prev_state = exception_enter();
558 
559 	get_debugreg(dr6, 6);
560 
561 	/* Filter out all the reserved bits which are preset to 1 */
562 	dr6 &= ~DR6_RESERVED;
563 
564 	/*
565 	 * If dr6 has no reason to give us about the origin of this trap,
566 	 * then it's very likely the result of an icebp/int01 trap.
567 	 * User wants a sigtrap for that.
568 	 */
569 	if (!dr6 && user_mode(regs))
570 		user_icebp = 1;
571 
572 	/* Catch kmemcheck conditions first of all! */
573 	if ((dr6 & DR_STEP) && kmemcheck_trap(regs))
574 		goto exit;
575 
576 	/* DR6 may or may not be cleared by the CPU */
577 	set_debugreg(0, 6);
578 
579 	/*
580 	 * The processor cleared BTF, so don't mark that we need it set.
581 	 */
582 	clear_tsk_thread_flag(tsk, TIF_BLOCKSTEP);
583 
584 	/* Store the virtualized DR6 value */
585 	tsk->thread.debugreg6 = dr6;
586 
587 #ifdef CONFIG_KPROBES
588 	if (kprobe_debug_handler(regs))
589 		goto exit;
590 #endif
591 
592 	if (notify_die(DIE_DEBUG, "debug", regs, (long)&dr6, error_code,
593 							SIGTRAP) == NOTIFY_STOP)
594 		goto exit;
595 
596 	/*
597 	 * Let others (NMI) know that the debug stack is in use
598 	 * as we may switch to the interrupt stack.
599 	 */
600 	debug_stack_usage_inc();
601 
602 	/* It's safe to allow irq's after DR6 has been saved */
603 	preempt_conditional_sti(regs);
604 
605 	if (regs->flags & X86_VM_MASK) {
606 		handle_vm86_trap((struct kernel_vm86_regs *) regs, error_code,
607 					X86_TRAP_DB);
608 		preempt_conditional_cli(regs);
609 		debug_stack_usage_dec();
610 		goto exit;
611 	}
612 
613 	/*
614 	 * Single-stepping through system calls: ignore any exceptions in
615 	 * kernel space, but re-enable TF when returning to user mode.
616 	 *
617 	 * We already checked v86 mode above, so we can check for kernel mode
618 	 * by just checking the CPL of CS.
619 	 */
620 	if ((dr6 & DR_STEP) && !user_mode(regs)) {
621 		tsk->thread.debugreg6 &= ~DR_STEP;
622 		set_tsk_thread_flag(tsk, TIF_SINGLESTEP);
623 		regs->flags &= ~X86_EFLAGS_TF;
624 	}
625 	si_code = get_si_code(tsk->thread.debugreg6);
626 	if (tsk->thread.debugreg6 & (DR_STEP | DR_TRAP_BITS) || user_icebp)
627 		send_sigtrap(tsk, regs, error_code, si_code);
628 	preempt_conditional_cli(regs);
629 	debug_stack_usage_dec();
630 
631 exit:
632 	exception_exit(prev_state);
633 }
634 NOKPROBE_SYMBOL(do_debug);
635 
636 /*
637  * Note that we play around with the 'TS' bit in an attempt to get
638  * the correct behaviour even in the presence of the asynchronous
639  * IRQ13 behaviour
640  */
641 static void math_error(struct pt_regs *regs, int error_code, int trapnr)
642 {
643 	struct task_struct *task = current;
644 	siginfo_t info;
645 	unsigned short err;
646 	char *str = (trapnr == X86_TRAP_MF) ? "fpu exception" :
647 						"simd exception";
648 
649 	if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, SIGFPE) == NOTIFY_STOP)
650 		return;
651 	conditional_sti(regs);
652 
653 	if (!user_mode_vm(regs))
654 	{
655 		if (!fixup_exception(regs)) {
656 			task->thread.error_code = error_code;
657 			task->thread.trap_nr = trapnr;
658 			die(str, regs, error_code);
659 		}
660 		return;
661 	}
662 
663 	/*
664 	 * Save the info for the exception handler and clear the error.
665 	 */
666 	save_init_fpu(task);
667 	task->thread.trap_nr = trapnr;
668 	task->thread.error_code = error_code;
669 	info.si_signo = SIGFPE;
670 	info.si_errno = 0;
671 	info.si_addr = (void __user *)uprobe_get_trap_addr(regs);
672 	if (trapnr == X86_TRAP_MF) {
673 		unsigned short cwd, swd;
674 		/*
675 		 * (~cwd & swd) will mask out exceptions that are not set to unmasked
676 		 * status.  0x3f is the exception bits in these regs, 0x200 is the
677 		 * C1 reg you need in case of a stack fault, 0x040 is the stack
678 		 * fault bit.  We should only be taking one exception at a time,
679 		 * so if this combination doesn't produce any single exception,
680 		 * then we have a bad program that isn't synchronizing its FPU usage
681 		 * and it will suffer the consequences since we won't be able to
682 		 * fully reproduce the context of the exception
683 		 */
684 		cwd = get_fpu_cwd(task);
685 		swd = get_fpu_swd(task);
686 
687 		err = swd & ~cwd;
688 	} else {
689 		/*
690 		 * The SIMD FPU exceptions are handled a little differently, as there
691 		 * is only a single status/control register.  Thus, to determine which
692 		 * unmasked exception was caught we must mask the exception mask bits
693 		 * at 0x1f80, and then use these to mask the exception bits at 0x3f.
694 		 */
695 		unsigned short mxcsr = get_fpu_mxcsr(task);
696 		err = ~(mxcsr >> 7) & mxcsr;
697 	}
698 
699 	if (err & 0x001) {	/* Invalid op */
700 		/*
701 		 * swd & 0x240 == 0x040: Stack Underflow
702 		 * swd & 0x240 == 0x240: Stack Overflow
703 		 * User must clear the SF bit (0x40) if set
704 		 */
705 		info.si_code = FPE_FLTINV;
706 	} else if (err & 0x004) { /* Divide by Zero */
707 		info.si_code = FPE_FLTDIV;
708 	} else if (err & 0x008) { /* Overflow */
709 		info.si_code = FPE_FLTOVF;
710 	} else if (err & 0x012) { /* Denormal, Underflow */
711 		info.si_code = FPE_FLTUND;
712 	} else if (err & 0x020) { /* Precision */
713 		info.si_code = FPE_FLTRES;
714 	} else {
715 		/*
716 		 * If we're using IRQ 13, or supposedly even some trap
717 		 * X86_TRAP_MF implementations, it's possible
718 		 * we get a spurious trap, which is not an error.
719 		 */
720 		return;
721 	}
722 	force_sig_info(SIGFPE, &info, task);
723 }
724 
725 dotraplinkage void do_coprocessor_error(struct pt_regs *regs, long error_code)
726 {
727 	enum ctx_state prev_state;
728 
729 	prev_state = exception_enter();
730 	math_error(regs, error_code, X86_TRAP_MF);
731 	exception_exit(prev_state);
732 }
733 
734 dotraplinkage void
735 do_simd_coprocessor_error(struct pt_regs *regs, long error_code)
736 {
737 	enum ctx_state prev_state;
738 
739 	prev_state = exception_enter();
740 	math_error(regs, error_code, X86_TRAP_XF);
741 	exception_exit(prev_state);
742 }
743 
744 dotraplinkage void
745 do_spurious_interrupt_bug(struct pt_regs *regs, long error_code)
746 {
747 	conditional_sti(regs);
748 #if 0
749 	/* No need to warn about this any longer. */
750 	pr_info("Ignoring P6 Local APIC Spurious Interrupt Bug...\n");
751 #endif
752 }
753 
754 asmlinkage __visible void __attribute__((weak)) smp_thermal_interrupt(void)
755 {
756 }
757 
758 asmlinkage __visible void __attribute__((weak)) smp_threshold_interrupt(void)
759 {
760 }
761 
762 /*
763  * 'math_state_restore()' saves the current math information in the
764  * old math state array, and gets the new ones from the current task
765  *
766  * Careful.. There are problems with IBM-designed IRQ13 behaviour.
767  * Don't touch unless you *really* know how it works.
768  *
769  * Must be called with kernel preemption disabled (eg with local
770  * local interrupts as in the case of do_device_not_available).
771  */
772 void math_state_restore(void)
773 {
774 	struct task_struct *tsk = current;
775 
776 	if (!tsk_used_math(tsk)) {
777 		local_irq_enable();
778 		/*
779 		 * does a slab alloc which can sleep
780 		 */
781 		if (init_fpu(tsk)) {
782 			/*
783 			 * ran out of memory!
784 			 */
785 			do_group_exit(SIGKILL);
786 			return;
787 		}
788 		local_irq_disable();
789 	}
790 
791 	__thread_fpu_begin(tsk);
792 
793 	/*
794 	 * Paranoid restore. send a SIGSEGV if we fail to restore the state.
795 	 */
796 	if (unlikely(restore_fpu_checking(tsk))) {
797 		drop_init_fpu(tsk);
798 		force_sig_info(SIGSEGV, SEND_SIG_PRIV, tsk);
799 		return;
800 	}
801 
802 	tsk->thread.fpu_counter++;
803 }
804 EXPORT_SYMBOL_GPL(math_state_restore);
805 
806 dotraplinkage void
807 do_device_not_available(struct pt_regs *regs, long error_code)
808 {
809 	enum ctx_state prev_state;
810 
811 	prev_state = exception_enter();
812 	BUG_ON(use_eager_fpu());
813 
814 #ifdef CONFIG_MATH_EMULATION
815 	if (read_cr0() & X86_CR0_EM) {
816 		struct math_emu_info info = { };
817 
818 		conditional_sti(regs);
819 
820 		info.regs = regs;
821 		math_emulate(&info);
822 		exception_exit(prev_state);
823 		return;
824 	}
825 #endif
826 	math_state_restore(); /* interrupts still off */
827 #ifdef CONFIG_X86_32
828 	conditional_sti(regs);
829 #endif
830 	exception_exit(prev_state);
831 }
832 NOKPROBE_SYMBOL(do_device_not_available);
833 
834 #ifdef CONFIG_X86_32
835 dotraplinkage void do_iret_error(struct pt_regs *regs, long error_code)
836 {
837 	siginfo_t info;
838 	enum ctx_state prev_state;
839 
840 	prev_state = exception_enter();
841 	local_irq_enable();
842 
843 	info.si_signo = SIGILL;
844 	info.si_errno = 0;
845 	info.si_code = ILL_BADSTK;
846 	info.si_addr = NULL;
847 	if (notify_die(DIE_TRAP, "iret exception", regs, error_code,
848 			X86_TRAP_IRET, SIGILL) != NOTIFY_STOP) {
849 		do_trap(X86_TRAP_IRET, SIGILL, "iret exception", regs, error_code,
850 			&info);
851 	}
852 	exception_exit(prev_state);
853 }
854 #endif
855 
856 /* Set of traps needed for early debugging. */
857 void __init early_trap_init(void)
858 {
859 	set_intr_gate_ist(X86_TRAP_DB, &debug, DEBUG_STACK);
860 	/* int3 can be called from all */
861 	set_system_intr_gate_ist(X86_TRAP_BP, &int3, DEBUG_STACK);
862 #ifdef CONFIG_X86_32
863 	set_intr_gate(X86_TRAP_PF, page_fault);
864 #endif
865 	load_idt(&idt_descr);
866 }
867 
868 void __init early_trap_pf_init(void)
869 {
870 #ifdef CONFIG_X86_64
871 	set_intr_gate(X86_TRAP_PF, page_fault);
872 #endif
873 }
874 
875 void __init trap_init(void)
876 {
877 	int i;
878 
879 #ifdef CONFIG_EISA
880 	void __iomem *p = early_ioremap(0x0FFFD9, 4);
881 
882 	if (readl(p) == 'E' + ('I'<<8) + ('S'<<16) + ('A'<<24))
883 		EISA_bus = 1;
884 	early_iounmap(p, 4);
885 #endif
886 
887 	set_intr_gate(X86_TRAP_DE, divide_error);
888 	set_intr_gate_ist(X86_TRAP_NMI, &nmi, NMI_STACK);
889 	/* int4 can be called from all */
890 	set_system_intr_gate(X86_TRAP_OF, &overflow);
891 	set_intr_gate(X86_TRAP_BR, bounds);
892 	set_intr_gate(X86_TRAP_UD, invalid_op);
893 	set_intr_gate(X86_TRAP_NM, device_not_available);
894 #ifdef CONFIG_X86_32
895 	set_task_gate(X86_TRAP_DF, GDT_ENTRY_DOUBLEFAULT_TSS);
896 #else
897 	set_intr_gate_ist(X86_TRAP_DF, &double_fault, DOUBLEFAULT_STACK);
898 #endif
899 	set_intr_gate(X86_TRAP_OLD_MF, coprocessor_segment_overrun);
900 	set_intr_gate(X86_TRAP_TS, invalid_TSS);
901 	set_intr_gate(X86_TRAP_NP, segment_not_present);
902 	set_intr_gate(X86_TRAP_SS, stack_segment);
903 	set_intr_gate(X86_TRAP_GP, general_protection);
904 	set_intr_gate(X86_TRAP_SPURIOUS, spurious_interrupt_bug);
905 	set_intr_gate(X86_TRAP_MF, coprocessor_error);
906 	set_intr_gate(X86_TRAP_AC, alignment_check);
907 #ifdef CONFIG_X86_MCE
908 	set_intr_gate_ist(X86_TRAP_MC, &machine_check, MCE_STACK);
909 #endif
910 	set_intr_gate(X86_TRAP_XF, simd_coprocessor_error);
911 
912 	/* Reserve all the builtin and the syscall vector: */
913 	for (i = 0; i < FIRST_EXTERNAL_VECTOR; i++)
914 		set_bit(i, used_vectors);
915 
916 #ifdef CONFIG_IA32_EMULATION
917 	set_system_intr_gate(IA32_SYSCALL_VECTOR, ia32_syscall);
918 	set_bit(IA32_SYSCALL_VECTOR, used_vectors);
919 #endif
920 
921 #ifdef CONFIG_X86_32
922 	set_system_trap_gate(SYSCALL_VECTOR, &system_call);
923 	set_bit(SYSCALL_VECTOR, used_vectors);
924 #endif
925 
926 	/*
927 	 * Set the IDT descriptor to a fixed read-only location, so that the
928 	 * "sidt" instruction will not leak the location of the kernel, and
929 	 * to defend the IDT against arbitrary memory write vulnerabilities.
930 	 * It will be reloaded in cpu_init() */
931 	__set_fixmap(FIX_RO_IDT, __pa_symbol(idt_table), PAGE_KERNEL_RO);
932 	idt_descr.address = fix_to_virt(FIX_RO_IDT);
933 
934 	/*
935 	 * Should be a barrier for any external CPU state:
936 	 */
937 	cpu_init();
938 
939 	x86_init.irqs.trap_init();
940 
941 #ifdef CONFIG_X86_64
942 	memcpy(&debug_idt_table, &idt_table, IDT_ENTRIES * 16);
943 	set_nmi_gate(X86_TRAP_DB, &debug);
944 	set_nmi_gate(X86_TRAP_BP, &int3);
945 #endif
946 }
947