xref: /openbmc/linux/arch/x86/kernel/traps.c (revision 5d0e4d78)
1 /*
2  *  Copyright (C) 1991, 1992  Linus Torvalds
3  *  Copyright (C) 2000, 2001, 2002 Andi Kleen, SuSE Labs
4  *
5  *  Pentium III FXSR, SSE support
6  *	Gareth Hughes <gareth@valinux.com>, May 2000
7  */
8 
9 /*
10  * Handle hardware traps and faults.
11  */
12 
13 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
14 
15 #include <linux/context_tracking.h>
16 #include <linux/interrupt.h>
17 #include <linux/kallsyms.h>
18 #include <linux/spinlock.h>
19 #include <linux/kprobes.h>
20 #include <linux/uaccess.h>
21 #include <linux/kdebug.h>
22 #include <linux/kgdb.h>
23 #include <linux/kernel.h>
24 #include <linux/export.h>
25 #include <linux/ptrace.h>
26 #include <linux/uprobes.h>
27 #include <linux/string.h>
28 #include <linux/delay.h>
29 #include <linux/errno.h>
30 #include <linux/kexec.h>
31 #include <linux/sched.h>
32 #include <linux/sched/task_stack.h>
33 #include <linux/timer.h>
34 #include <linux/init.h>
35 #include <linux/bug.h>
36 #include <linux/nmi.h>
37 #include <linux/mm.h>
38 #include <linux/smp.h>
39 #include <linux/io.h>
40 
41 #ifdef CONFIG_EISA
42 #include <linux/ioport.h>
43 #include <linux/eisa.h>
44 #endif
45 
46 #if defined(CONFIG_EDAC)
47 #include <linux/edac.h>
48 #endif
49 
50 #include <asm/kmemcheck.h>
51 #include <asm/stacktrace.h>
52 #include <asm/processor.h>
53 #include <asm/debugreg.h>
54 #include <linux/atomic.h>
55 #include <asm/text-patching.h>
56 #include <asm/ftrace.h>
57 #include <asm/traps.h>
58 #include <asm/desc.h>
59 #include <asm/fpu/internal.h>
60 #include <asm/mce.h>
61 #include <asm/fixmap.h>
62 #include <asm/mach_traps.h>
63 #include <asm/alternative.h>
64 #include <asm/fpu/xstate.h>
65 #include <asm/trace/mpx.h>
66 #include <asm/mpx.h>
67 #include <asm/vm86.h>
68 
69 #ifdef CONFIG_X86_64
70 #include <asm/x86_init.h>
71 #include <asm/pgalloc.h>
72 #include <asm/proto.h>
73 
74 /* No need to be aligned, but done to keep all IDTs defined the same way. */
75 gate_desc debug_idt_table[NR_VECTORS] __page_aligned_bss;
76 #else
77 #include <asm/processor-flags.h>
78 #include <asm/setup.h>
79 #include <asm/proto.h>
80 #endif
81 
82 /* Must be page-aligned because the real IDT is used in a fixmap. */
83 gate_desc idt_table[NR_VECTORS] __page_aligned_bss;
84 
85 DECLARE_BITMAP(used_vectors, NR_VECTORS);
86 EXPORT_SYMBOL_GPL(used_vectors);
87 
88 static inline void cond_local_irq_enable(struct pt_regs *regs)
89 {
90 	if (regs->flags & X86_EFLAGS_IF)
91 		local_irq_enable();
92 }
93 
94 static inline void cond_local_irq_disable(struct pt_regs *regs)
95 {
96 	if (regs->flags & X86_EFLAGS_IF)
97 		local_irq_disable();
98 }
99 
100 /*
101  * In IST context, we explicitly disable preemption.  This serves two
102  * purposes: it makes it much less likely that we would accidentally
103  * schedule in IST context and it will force a warning if we somehow
104  * manage to schedule by accident.
105  */
106 void ist_enter(struct pt_regs *regs)
107 {
108 	if (user_mode(regs)) {
109 		RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
110 	} else {
111 		/*
112 		 * We might have interrupted pretty much anything.  In
113 		 * fact, if we're a machine check, we can even interrupt
114 		 * NMI processing.  We don't want in_nmi() to return true,
115 		 * but we need to notify RCU.
116 		 */
117 		rcu_nmi_enter();
118 	}
119 
120 	preempt_disable();
121 
122 	/* This code is a bit fragile.  Test it. */
123 	RCU_LOCKDEP_WARN(!rcu_is_watching(), "ist_enter didn't work");
124 }
125 
126 void ist_exit(struct pt_regs *regs)
127 {
128 	preempt_enable_no_resched();
129 
130 	if (!user_mode(regs))
131 		rcu_nmi_exit();
132 }
133 
134 /**
135  * ist_begin_non_atomic() - begin a non-atomic section in an IST exception
136  * @regs:	regs passed to the IST exception handler
137  *
138  * IST exception handlers normally cannot schedule.  As a special
139  * exception, if the exception interrupted userspace code (i.e.
140  * user_mode(regs) would return true) and the exception was not
141  * a double fault, it can be safe to schedule.  ist_begin_non_atomic()
142  * begins a non-atomic section within an ist_enter()/ist_exit() region.
143  * Callers are responsible for enabling interrupts themselves inside
144  * the non-atomic section, and callers must call ist_end_non_atomic()
145  * before ist_exit().
146  */
147 void ist_begin_non_atomic(struct pt_regs *regs)
148 {
149 	BUG_ON(!user_mode(regs));
150 
151 	/*
152 	 * Sanity check: we need to be on the normal thread stack.  This
153 	 * will catch asm bugs and any attempt to use ist_preempt_enable
154 	 * from double_fault.
155 	 */
156 	BUG_ON((unsigned long)(current_top_of_stack() -
157 			       current_stack_pointer()) >= THREAD_SIZE);
158 
159 	preempt_enable_no_resched();
160 }
161 
162 /**
163  * ist_end_non_atomic() - begin a non-atomic section in an IST exception
164  *
165  * Ends a non-atomic section started with ist_begin_non_atomic().
166  */
167 void ist_end_non_atomic(void)
168 {
169 	preempt_disable();
170 }
171 
172 int is_valid_bugaddr(unsigned long addr)
173 {
174 	unsigned short ud;
175 
176 	if (addr < TASK_SIZE_MAX)
177 		return 0;
178 
179 	if (probe_kernel_address((unsigned short *)addr, ud))
180 		return 0;
181 
182 	return ud == INSN_UD0 || ud == INSN_UD2;
183 }
184 
185 int fixup_bug(struct pt_regs *regs, int trapnr)
186 {
187 	if (trapnr != X86_TRAP_UD)
188 		return 0;
189 
190 	switch (report_bug(regs->ip, regs)) {
191 	case BUG_TRAP_TYPE_NONE:
192 	case BUG_TRAP_TYPE_BUG:
193 		break;
194 
195 	case BUG_TRAP_TYPE_WARN:
196 		regs->ip += LEN_UD0;
197 		return 1;
198 	}
199 
200 	return 0;
201 }
202 
203 static nokprobe_inline int
204 do_trap_no_signal(struct task_struct *tsk, int trapnr, char *str,
205 		  struct pt_regs *regs,	long error_code)
206 {
207 	if (v8086_mode(regs)) {
208 		/*
209 		 * Traps 0, 1, 3, 4, and 5 should be forwarded to vm86.
210 		 * On nmi (interrupt 2), do_trap should not be called.
211 		 */
212 		if (trapnr < X86_TRAP_UD) {
213 			if (!handle_vm86_trap((struct kernel_vm86_regs *) regs,
214 						error_code, trapnr))
215 				return 0;
216 		}
217 		return -1;
218 	}
219 
220 	if (!user_mode(regs)) {
221 		if (fixup_exception(regs, trapnr))
222 			return 0;
223 
224 		if (fixup_bug(regs, trapnr))
225 			return 0;
226 
227 		tsk->thread.error_code = error_code;
228 		tsk->thread.trap_nr = trapnr;
229 		die(str, regs, error_code);
230 	}
231 
232 	return -1;
233 }
234 
235 static siginfo_t *fill_trap_info(struct pt_regs *regs, int signr, int trapnr,
236 				siginfo_t *info)
237 {
238 	unsigned long siaddr;
239 	int sicode;
240 
241 	switch (trapnr) {
242 	default:
243 		return SEND_SIG_PRIV;
244 
245 	case X86_TRAP_DE:
246 		sicode = FPE_INTDIV;
247 		siaddr = uprobe_get_trap_addr(regs);
248 		break;
249 	case X86_TRAP_UD:
250 		sicode = ILL_ILLOPN;
251 		siaddr = uprobe_get_trap_addr(regs);
252 		break;
253 	case X86_TRAP_AC:
254 		sicode = BUS_ADRALN;
255 		siaddr = 0;
256 		break;
257 	}
258 
259 	info->si_signo = signr;
260 	info->si_errno = 0;
261 	info->si_code = sicode;
262 	info->si_addr = (void __user *)siaddr;
263 	return info;
264 }
265 
266 static void
267 do_trap(int trapnr, int signr, char *str, struct pt_regs *regs,
268 	long error_code, siginfo_t *info)
269 {
270 	struct task_struct *tsk = current;
271 
272 
273 	if (!do_trap_no_signal(tsk, trapnr, str, regs, error_code))
274 		return;
275 	/*
276 	 * We want error_code and trap_nr set for userspace faults and
277 	 * kernelspace faults which result in die(), but not
278 	 * kernelspace faults which are fixed up.  die() gives the
279 	 * process no chance to handle the signal and notice the
280 	 * kernel fault information, so that won't result in polluting
281 	 * the information about previously queued, but not yet
282 	 * delivered, faults.  See also do_general_protection below.
283 	 */
284 	tsk->thread.error_code = error_code;
285 	tsk->thread.trap_nr = trapnr;
286 
287 	if (show_unhandled_signals && unhandled_signal(tsk, signr) &&
288 	    printk_ratelimit()) {
289 		pr_info("%s[%d] trap %s ip:%lx sp:%lx error:%lx",
290 			tsk->comm, tsk->pid, str,
291 			regs->ip, regs->sp, error_code);
292 		print_vma_addr(KERN_CONT " in ", regs->ip);
293 		pr_cont("\n");
294 	}
295 
296 	force_sig_info(signr, info ?: SEND_SIG_PRIV, tsk);
297 }
298 NOKPROBE_SYMBOL(do_trap);
299 
300 static void do_error_trap(struct pt_regs *regs, long error_code, char *str,
301 			  unsigned long trapnr, int signr)
302 {
303 	siginfo_t info;
304 
305 	RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
306 
307 	if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) !=
308 			NOTIFY_STOP) {
309 		cond_local_irq_enable(regs);
310 		do_trap(trapnr, signr, str, regs, error_code,
311 			fill_trap_info(regs, signr, trapnr, &info));
312 	}
313 }
314 
315 #define DO_ERROR(trapnr, signr, str, name)				\
316 dotraplinkage void do_##name(struct pt_regs *regs, long error_code)	\
317 {									\
318 	do_error_trap(regs, error_code, str, trapnr, signr);		\
319 }
320 
321 DO_ERROR(X86_TRAP_DE,     SIGFPE,  "divide error",		divide_error)
322 DO_ERROR(X86_TRAP_OF,     SIGSEGV, "overflow",			overflow)
323 DO_ERROR(X86_TRAP_UD,     SIGILL,  "invalid opcode",		invalid_op)
324 DO_ERROR(X86_TRAP_OLD_MF, SIGFPE,  "coprocessor segment overrun",coprocessor_segment_overrun)
325 DO_ERROR(X86_TRAP_TS,     SIGSEGV, "invalid TSS",		invalid_TSS)
326 DO_ERROR(X86_TRAP_NP,     SIGBUS,  "segment not present",	segment_not_present)
327 DO_ERROR(X86_TRAP_SS,     SIGBUS,  "stack segment",		stack_segment)
328 DO_ERROR(X86_TRAP_AC,     SIGBUS,  "alignment check",		alignment_check)
329 
330 #ifdef CONFIG_VMAP_STACK
331 __visible void __noreturn handle_stack_overflow(const char *message,
332 						struct pt_regs *regs,
333 						unsigned long fault_address)
334 {
335 	printk(KERN_EMERG "BUG: stack guard page was hit at %p (stack is %p..%p)\n",
336 		 (void *)fault_address, current->stack,
337 		 (char *)current->stack + THREAD_SIZE - 1);
338 	die(message, regs, 0);
339 
340 	/* Be absolutely certain we don't return. */
341 	panic(message);
342 }
343 #endif
344 
345 #ifdef CONFIG_X86_64
346 /* Runs on IST stack */
347 dotraplinkage void do_double_fault(struct pt_regs *regs, long error_code)
348 {
349 	static const char str[] = "double fault";
350 	struct task_struct *tsk = current;
351 #ifdef CONFIG_VMAP_STACK
352 	unsigned long cr2;
353 #endif
354 
355 #ifdef CONFIG_X86_ESPFIX64
356 	extern unsigned char native_irq_return_iret[];
357 
358 	/*
359 	 * If IRET takes a non-IST fault on the espfix64 stack, then we
360 	 * end up promoting it to a doublefault.  In that case, modify
361 	 * the stack to make it look like we just entered the #GP
362 	 * handler from user space, similar to bad_iret.
363 	 *
364 	 * No need for ist_enter here because we don't use RCU.
365 	 */
366 	if (((long)regs->sp >> PGDIR_SHIFT) == ESPFIX_PGD_ENTRY &&
367 		regs->cs == __KERNEL_CS &&
368 		regs->ip == (unsigned long)native_irq_return_iret)
369 	{
370 		struct pt_regs *normal_regs = task_pt_regs(current);
371 
372 		/* Fake a #GP(0) from userspace. */
373 		memmove(&normal_regs->ip, (void *)regs->sp, 5*8);
374 		normal_regs->orig_ax = 0;  /* Missing (lost) #GP error code */
375 		regs->ip = (unsigned long)general_protection;
376 		regs->sp = (unsigned long)&normal_regs->orig_ax;
377 
378 		return;
379 	}
380 #endif
381 
382 	ist_enter(regs);
383 	notify_die(DIE_TRAP, str, regs, error_code, X86_TRAP_DF, SIGSEGV);
384 
385 	tsk->thread.error_code = error_code;
386 	tsk->thread.trap_nr = X86_TRAP_DF;
387 
388 #ifdef CONFIG_VMAP_STACK
389 	/*
390 	 * If we overflow the stack into a guard page, the CPU will fail
391 	 * to deliver #PF and will send #DF instead.  Similarly, if we
392 	 * take any non-IST exception while too close to the bottom of
393 	 * the stack, the processor will get a page fault while
394 	 * delivering the exception and will generate a double fault.
395 	 *
396 	 * According to the SDM (footnote in 6.15 under "Interrupt 14 -
397 	 * Page-Fault Exception (#PF):
398 	 *
399 	 *   Processors update CR2 whenever a page fault is detected. If a
400 	 *   second page fault occurs while an earlier page fault is being
401 	 *   deliv- ered, the faulting linear address of the second fault will
402 	 *   overwrite the contents of CR2 (replacing the previous
403 	 *   address). These updates to CR2 occur even if the page fault
404 	 *   results in a double fault or occurs during the delivery of a
405 	 *   double fault.
406 	 *
407 	 * The logic below has a small possibility of incorrectly diagnosing
408 	 * some errors as stack overflows.  For example, if the IDT or GDT
409 	 * gets corrupted such that #GP delivery fails due to a bad descriptor
410 	 * causing #GP and we hit this condition while CR2 coincidentally
411 	 * points to the stack guard page, we'll think we overflowed the
412 	 * stack.  Given that we're going to panic one way or another
413 	 * if this happens, this isn't necessarily worth fixing.
414 	 *
415 	 * If necessary, we could improve the test by only diagnosing
416 	 * a stack overflow if the saved RSP points within 47 bytes of
417 	 * the bottom of the stack: if RSP == tsk_stack + 48 and we
418 	 * take an exception, the stack is already aligned and there
419 	 * will be enough room SS, RSP, RFLAGS, CS, RIP, and a
420 	 * possible error code, so a stack overflow would *not* double
421 	 * fault.  With any less space left, exception delivery could
422 	 * fail, and, as a practical matter, we've overflowed the
423 	 * stack even if the actual trigger for the double fault was
424 	 * something else.
425 	 */
426 	cr2 = read_cr2();
427 	if ((unsigned long)task_stack_page(tsk) - 1 - cr2 < PAGE_SIZE)
428 		handle_stack_overflow("kernel stack overflow (double-fault)", regs, cr2);
429 #endif
430 
431 #ifdef CONFIG_DOUBLEFAULT
432 	df_debug(regs, error_code);
433 #endif
434 	/*
435 	 * This is always a kernel trap and never fixable (and thus must
436 	 * never return).
437 	 */
438 	for (;;)
439 		die(str, regs, error_code);
440 }
441 #endif
442 
443 dotraplinkage void do_bounds(struct pt_regs *regs, long error_code)
444 {
445 	const struct mpx_bndcsr *bndcsr;
446 	siginfo_t *info;
447 
448 	RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
449 	if (notify_die(DIE_TRAP, "bounds", regs, error_code,
450 			X86_TRAP_BR, SIGSEGV) == NOTIFY_STOP)
451 		return;
452 	cond_local_irq_enable(regs);
453 
454 	if (!user_mode(regs))
455 		die("bounds", regs, error_code);
456 
457 	if (!cpu_feature_enabled(X86_FEATURE_MPX)) {
458 		/* The exception is not from Intel MPX */
459 		goto exit_trap;
460 	}
461 
462 	/*
463 	 * We need to look at BNDSTATUS to resolve this exception.
464 	 * A NULL here might mean that it is in its 'init state',
465 	 * which is all zeros which indicates MPX was not
466 	 * responsible for the exception.
467 	 */
468 	bndcsr = get_xsave_field_ptr(XFEATURE_MASK_BNDCSR);
469 	if (!bndcsr)
470 		goto exit_trap;
471 
472 	trace_bounds_exception_mpx(bndcsr);
473 	/*
474 	 * The error code field of the BNDSTATUS register communicates status
475 	 * information of a bound range exception #BR or operation involving
476 	 * bound directory.
477 	 */
478 	switch (bndcsr->bndstatus & MPX_BNDSTA_ERROR_CODE) {
479 	case 2:	/* Bound directory has invalid entry. */
480 		if (mpx_handle_bd_fault())
481 			goto exit_trap;
482 		break; /* Success, it was handled */
483 	case 1: /* Bound violation. */
484 		info = mpx_generate_siginfo(regs);
485 		if (IS_ERR(info)) {
486 			/*
487 			 * We failed to decode the MPX instruction.  Act as if
488 			 * the exception was not caused by MPX.
489 			 */
490 			goto exit_trap;
491 		}
492 		/*
493 		 * Success, we decoded the instruction and retrieved
494 		 * an 'info' containing the address being accessed
495 		 * which caused the exception.  This information
496 		 * allows and application to possibly handle the
497 		 * #BR exception itself.
498 		 */
499 		do_trap(X86_TRAP_BR, SIGSEGV, "bounds", regs, error_code, info);
500 		kfree(info);
501 		break;
502 	case 0: /* No exception caused by Intel MPX operations. */
503 		goto exit_trap;
504 	default:
505 		die("bounds", regs, error_code);
506 	}
507 
508 	return;
509 
510 exit_trap:
511 	/*
512 	 * This path out is for all the cases where we could not
513 	 * handle the exception in some way (like allocating a
514 	 * table or telling userspace about it.  We will also end
515 	 * up here if the kernel has MPX turned off at compile
516 	 * time..
517 	 */
518 	do_trap(X86_TRAP_BR, SIGSEGV, "bounds", regs, error_code, NULL);
519 }
520 
521 dotraplinkage void
522 do_general_protection(struct pt_regs *regs, long error_code)
523 {
524 	struct task_struct *tsk;
525 
526 	RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
527 	cond_local_irq_enable(regs);
528 
529 	if (v8086_mode(regs)) {
530 		local_irq_enable();
531 		handle_vm86_fault((struct kernel_vm86_regs *) regs, error_code);
532 		return;
533 	}
534 
535 	tsk = current;
536 	if (!user_mode(regs)) {
537 		if (fixup_exception(regs, X86_TRAP_GP))
538 			return;
539 
540 		tsk->thread.error_code = error_code;
541 		tsk->thread.trap_nr = X86_TRAP_GP;
542 		if (notify_die(DIE_GPF, "general protection fault", regs, error_code,
543 			       X86_TRAP_GP, SIGSEGV) != NOTIFY_STOP)
544 			die("general protection fault", regs, error_code);
545 		return;
546 	}
547 
548 	tsk->thread.error_code = error_code;
549 	tsk->thread.trap_nr = X86_TRAP_GP;
550 
551 	if (show_unhandled_signals && unhandled_signal(tsk, SIGSEGV) &&
552 			printk_ratelimit()) {
553 		pr_info("%s[%d] general protection ip:%lx sp:%lx error:%lx",
554 			tsk->comm, task_pid_nr(tsk),
555 			regs->ip, regs->sp, error_code);
556 		print_vma_addr(KERN_CONT " in ", regs->ip);
557 		pr_cont("\n");
558 	}
559 
560 	force_sig_info(SIGSEGV, SEND_SIG_PRIV, tsk);
561 }
562 NOKPROBE_SYMBOL(do_general_protection);
563 
564 /* May run on IST stack. */
565 dotraplinkage void notrace do_int3(struct pt_regs *regs, long error_code)
566 {
567 #ifdef CONFIG_DYNAMIC_FTRACE
568 	/*
569 	 * ftrace must be first, everything else may cause a recursive crash.
570 	 * See note by declaration of modifying_ftrace_code in ftrace.c
571 	 */
572 	if (unlikely(atomic_read(&modifying_ftrace_code)) &&
573 	    ftrace_int3_handler(regs))
574 		return;
575 #endif
576 	if (poke_int3_handler(regs))
577 		return;
578 
579 	ist_enter(regs);
580 	RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
581 #ifdef CONFIG_KGDB_LOW_LEVEL_TRAP
582 	if (kgdb_ll_trap(DIE_INT3, "int3", regs, error_code, X86_TRAP_BP,
583 				SIGTRAP) == NOTIFY_STOP)
584 		goto exit;
585 #endif /* CONFIG_KGDB_LOW_LEVEL_TRAP */
586 
587 #ifdef CONFIG_KPROBES
588 	if (kprobe_int3_handler(regs))
589 		goto exit;
590 #endif
591 
592 	if (notify_die(DIE_INT3, "int3", regs, error_code, X86_TRAP_BP,
593 			SIGTRAP) == NOTIFY_STOP)
594 		goto exit;
595 
596 	/*
597 	 * Let others (NMI) know that the debug stack is in use
598 	 * as we may switch to the interrupt stack.
599 	 */
600 	debug_stack_usage_inc();
601 	cond_local_irq_enable(regs);
602 	do_trap(X86_TRAP_BP, SIGTRAP, "int3", regs, error_code, NULL);
603 	cond_local_irq_disable(regs);
604 	debug_stack_usage_dec();
605 exit:
606 	ist_exit(regs);
607 }
608 NOKPROBE_SYMBOL(do_int3);
609 
610 #ifdef CONFIG_X86_64
611 /*
612  * Help handler running on IST stack to switch off the IST stack if the
613  * interrupted code was in user mode. The actual stack switch is done in
614  * entry_64.S
615  */
616 asmlinkage __visible notrace struct pt_regs *sync_regs(struct pt_regs *eregs)
617 {
618 	struct pt_regs *regs = task_pt_regs(current);
619 	*regs = *eregs;
620 	return regs;
621 }
622 NOKPROBE_SYMBOL(sync_regs);
623 
624 struct bad_iret_stack {
625 	void *error_entry_ret;
626 	struct pt_regs regs;
627 };
628 
629 asmlinkage __visible notrace
630 struct bad_iret_stack *fixup_bad_iret(struct bad_iret_stack *s)
631 {
632 	/*
633 	 * This is called from entry_64.S early in handling a fault
634 	 * caused by a bad iret to user mode.  To handle the fault
635 	 * correctly, we want move our stack frame to task_pt_regs
636 	 * and we want to pretend that the exception came from the
637 	 * iret target.
638 	 */
639 	struct bad_iret_stack *new_stack =
640 		container_of(task_pt_regs(current),
641 			     struct bad_iret_stack, regs);
642 
643 	/* Copy the IRET target to the new stack. */
644 	memmove(&new_stack->regs.ip, (void *)s->regs.sp, 5*8);
645 
646 	/* Copy the remainder of the stack from the current stack. */
647 	memmove(new_stack, s, offsetof(struct bad_iret_stack, regs.ip));
648 
649 	BUG_ON(!user_mode(&new_stack->regs));
650 	return new_stack;
651 }
652 NOKPROBE_SYMBOL(fixup_bad_iret);
653 #endif
654 
655 static bool is_sysenter_singlestep(struct pt_regs *regs)
656 {
657 	/*
658 	 * We don't try for precision here.  If we're anywhere in the region of
659 	 * code that can be single-stepped in the SYSENTER entry path, then
660 	 * assume that this is a useless single-step trap due to SYSENTER
661 	 * being invoked with TF set.  (We don't know in advance exactly
662 	 * which instructions will be hit because BTF could plausibly
663 	 * be set.)
664 	 */
665 #ifdef CONFIG_X86_32
666 	return (regs->ip - (unsigned long)__begin_SYSENTER_singlestep_region) <
667 		(unsigned long)__end_SYSENTER_singlestep_region -
668 		(unsigned long)__begin_SYSENTER_singlestep_region;
669 #elif defined(CONFIG_IA32_EMULATION)
670 	return (regs->ip - (unsigned long)entry_SYSENTER_compat) <
671 		(unsigned long)__end_entry_SYSENTER_compat -
672 		(unsigned long)entry_SYSENTER_compat;
673 #else
674 	return false;
675 #endif
676 }
677 
678 /*
679  * Our handling of the processor debug registers is non-trivial.
680  * We do not clear them on entry and exit from the kernel. Therefore
681  * it is possible to get a watchpoint trap here from inside the kernel.
682  * However, the code in ./ptrace.c has ensured that the user can
683  * only set watchpoints on userspace addresses. Therefore the in-kernel
684  * watchpoint trap can only occur in code which is reading/writing
685  * from user space. Such code must not hold kernel locks (since it
686  * can equally take a page fault), therefore it is safe to call
687  * force_sig_info even though that claims and releases locks.
688  *
689  * Code in ./signal.c ensures that the debug control register
690  * is restored before we deliver any signal, and therefore that
691  * user code runs with the correct debug control register even though
692  * we clear it here.
693  *
694  * Being careful here means that we don't have to be as careful in a
695  * lot of more complicated places (task switching can be a bit lazy
696  * about restoring all the debug state, and ptrace doesn't have to
697  * find every occurrence of the TF bit that could be saved away even
698  * by user code)
699  *
700  * May run on IST stack.
701  */
702 dotraplinkage void do_debug(struct pt_regs *regs, long error_code)
703 {
704 	struct task_struct *tsk = current;
705 	int user_icebp = 0;
706 	unsigned long dr6;
707 	int si_code;
708 
709 	ist_enter(regs);
710 
711 	get_debugreg(dr6, 6);
712 	/*
713 	 * The Intel SDM says:
714 	 *
715 	 *   Certain debug exceptions may clear bits 0-3. The remaining
716 	 *   contents of the DR6 register are never cleared by the
717 	 *   processor. To avoid confusion in identifying debug
718 	 *   exceptions, debug handlers should clear the register before
719 	 *   returning to the interrupted task.
720 	 *
721 	 * Keep it simple: clear DR6 immediately.
722 	 */
723 	set_debugreg(0, 6);
724 
725 	/* Filter out all the reserved bits which are preset to 1 */
726 	dr6 &= ~DR6_RESERVED;
727 
728 	/*
729 	 * The SDM says "The processor clears the BTF flag when it
730 	 * generates a debug exception."  Clear TIF_BLOCKSTEP to keep
731 	 * TIF_BLOCKSTEP in sync with the hardware BTF flag.
732 	 */
733 	clear_tsk_thread_flag(tsk, TIF_BLOCKSTEP);
734 
735 	if (unlikely(!user_mode(regs) && (dr6 & DR_STEP) &&
736 		     is_sysenter_singlestep(regs))) {
737 		dr6 &= ~DR_STEP;
738 		if (!dr6)
739 			goto exit;
740 		/*
741 		 * else we might have gotten a single-step trap and hit a
742 		 * watchpoint at the same time, in which case we should fall
743 		 * through and handle the watchpoint.
744 		 */
745 	}
746 
747 	/*
748 	 * If dr6 has no reason to give us about the origin of this trap,
749 	 * then it's very likely the result of an icebp/int01 trap.
750 	 * User wants a sigtrap for that.
751 	 */
752 	if (!dr6 && user_mode(regs))
753 		user_icebp = 1;
754 
755 	/* Catch kmemcheck conditions! */
756 	if ((dr6 & DR_STEP) && kmemcheck_trap(regs))
757 		goto exit;
758 
759 	/* Store the virtualized DR6 value */
760 	tsk->thread.debugreg6 = dr6;
761 
762 #ifdef CONFIG_KPROBES
763 	if (kprobe_debug_handler(regs))
764 		goto exit;
765 #endif
766 
767 	if (notify_die(DIE_DEBUG, "debug", regs, (long)&dr6, error_code,
768 							SIGTRAP) == NOTIFY_STOP)
769 		goto exit;
770 
771 	/*
772 	 * Let others (NMI) know that the debug stack is in use
773 	 * as we may switch to the interrupt stack.
774 	 */
775 	debug_stack_usage_inc();
776 
777 	/* It's safe to allow irq's after DR6 has been saved */
778 	cond_local_irq_enable(regs);
779 
780 	if (v8086_mode(regs)) {
781 		handle_vm86_trap((struct kernel_vm86_regs *) regs, error_code,
782 					X86_TRAP_DB);
783 		cond_local_irq_disable(regs);
784 		debug_stack_usage_dec();
785 		goto exit;
786 	}
787 
788 	if (WARN_ON_ONCE((dr6 & DR_STEP) && !user_mode(regs))) {
789 		/*
790 		 * Historical junk that used to handle SYSENTER single-stepping.
791 		 * This should be unreachable now.  If we survive for a while
792 		 * without anyone hitting this warning, we'll turn this into
793 		 * an oops.
794 		 */
795 		tsk->thread.debugreg6 &= ~DR_STEP;
796 		set_tsk_thread_flag(tsk, TIF_SINGLESTEP);
797 		regs->flags &= ~X86_EFLAGS_TF;
798 	}
799 	si_code = get_si_code(tsk->thread.debugreg6);
800 	if (tsk->thread.debugreg6 & (DR_STEP | DR_TRAP_BITS) || user_icebp)
801 		send_sigtrap(tsk, regs, error_code, si_code);
802 	cond_local_irq_disable(regs);
803 	debug_stack_usage_dec();
804 
805 exit:
806 #if defined(CONFIG_X86_32)
807 	/*
808 	 * This is the most likely code path that involves non-trivial use
809 	 * of the SYSENTER stack.  Check that we haven't overrun it.
810 	 */
811 	WARN(this_cpu_read(cpu_tss.SYSENTER_stack_canary) != STACK_END_MAGIC,
812 	     "Overran or corrupted SYSENTER stack\n");
813 #endif
814 	ist_exit(regs);
815 }
816 NOKPROBE_SYMBOL(do_debug);
817 
818 /*
819  * Note that we play around with the 'TS' bit in an attempt to get
820  * the correct behaviour even in the presence of the asynchronous
821  * IRQ13 behaviour
822  */
823 static void math_error(struct pt_regs *regs, int error_code, int trapnr)
824 {
825 	struct task_struct *task = current;
826 	struct fpu *fpu = &task->thread.fpu;
827 	siginfo_t info;
828 	char *str = (trapnr == X86_TRAP_MF) ? "fpu exception" :
829 						"simd exception";
830 
831 	if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, SIGFPE) == NOTIFY_STOP)
832 		return;
833 	cond_local_irq_enable(regs);
834 
835 	if (!user_mode(regs)) {
836 		if (!fixup_exception(regs, trapnr)) {
837 			task->thread.error_code = error_code;
838 			task->thread.trap_nr = trapnr;
839 			die(str, regs, error_code);
840 		}
841 		return;
842 	}
843 
844 	/*
845 	 * Save the info for the exception handler and clear the error.
846 	 */
847 	fpu__save(fpu);
848 
849 	task->thread.trap_nr	= trapnr;
850 	task->thread.error_code = error_code;
851 	info.si_signo		= SIGFPE;
852 	info.si_errno		= 0;
853 	info.si_addr		= (void __user *)uprobe_get_trap_addr(regs);
854 
855 	info.si_code = fpu__exception_code(fpu, trapnr);
856 
857 	/* Retry when we get spurious exceptions: */
858 	if (!info.si_code)
859 		return;
860 
861 	force_sig_info(SIGFPE, &info, task);
862 }
863 
864 dotraplinkage void do_coprocessor_error(struct pt_regs *regs, long error_code)
865 {
866 	RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
867 	math_error(regs, error_code, X86_TRAP_MF);
868 }
869 
870 dotraplinkage void
871 do_simd_coprocessor_error(struct pt_regs *regs, long error_code)
872 {
873 	RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
874 	math_error(regs, error_code, X86_TRAP_XF);
875 }
876 
877 dotraplinkage void
878 do_spurious_interrupt_bug(struct pt_regs *regs, long error_code)
879 {
880 	cond_local_irq_enable(regs);
881 }
882 
883 dotraplinkage void
884 do_device_not_available(struct pt_regs *regs, long error_code)
885 {
886 	unsigned long cr0;
887 
888 	RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
889 
890 #ifdef CONFIG_MATH_EMULATION
891 	if (!boot_cpu_has(X86_FEATURE_FPU) && (read_cr0() & X86_CR0_EM)) {
892 		struct math_emu_info info = { };
893 
894 		cond_local_irq_enable(regs);
895 
896 		info.regs = regs;
897 		math_emulate(&info);
898 		return;
899 	}
900 #endif
901 
902 	/* This should not happen. */
903 	cr0 = read_cr0();
904 	if (WARN(cr0 & X86_CR0_TS, "CR0.TS was set")) {
905 		/* Try to fix it up and carry on. */
906 		write_cr0(cr0 & ~X86_CR0_TS);
907 	} else {
908 		/*
909 		 * Something terrible happened, and we're better off trying
910 		 * to kill the task than getting stuck in a never-ending
911 		 * loop of #NM faults.
912 		 */
913 		die("unexpected #NM exception", regs, error_code);
914 	}
915 }
916 NOKPROBE_SYMBOL(do_device_not_available);
917 
918 #ifdef CONFIG_X86_32
919 dotraplinkage void do_iret_error(struct pt_regs *regs, long error_code)
920 {
921 	siginfo_t info;
922 
923 	RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
924 	local_irq_enable();
925 
926 	info.si_signo = SIGILL;
927 	info.si_errno = 0;
928 	info.si_code = ILL_BADSTK;
929 	info.si_addr = NULL;
930 	if (notify_die(DIE_TRAP, "iret exception", regs, error_code,
931 			X86_TRAP_IRET, SIGILL) != NOTIFY_STOP) {
932 		do_trap(X86_TRAP_IRET, SIGILL, "iret exception", regs, error_code,
933 			&info);
934 	}
935 }
936 #endif
937 
938 /* Set of traps needed for early debugging. */
939 void __init early_trap_init(void)
940 {
941 	/*
942 	 * Don't use IST to set DEBUG_STACK as it doesn't work until TSS
943 	 * is ready in cpu_init() <-- trap_init(). Before trap_init(),
944 	 * CPU runs at ring 0 so it is impossible to hit an invalid
945 	 * stack.  Using the original stack works well enough at this
946 	 * early stage. DEBUG_STACK will be equipped after cpu_init() in
947 	 * trap_init().
948 	 *
949 	 * We don't need to set trace_idt_table like set_intr_gate(),
950 	 * since we don't have trace_debug and it will be reset to
951 	 * 'debug' in trap_init() by set_intr_gate_ist().
952 	 */
953 	set_intr_gate_notrace(X86_TRAP_DB, debug);
954 	/* int3 can be called from all */
955 	set_system_intr_gate(X86_TRAP_BP, &int3);
956 #ifdef CONFIG_X86_32
957 	set_intr_gate(X86_TRAP_PF, page_fault);
958 #endif
959 	load_idt(&idt_descr);
960 }
961 
962 void __init early_trap_pf_init(void)
963 {
964 #ifdef CONFIG_X86_64
965 	set_intr_gate(X86_TRAP_PF, page_fault);
966 #endif
967 }
968 
969 void __init trap_init(void)
970 {
971 	int i;
972 
973 #ifdef CONFIG_EISA
974 	void __iomem *p = early_ioremap(0x0FFFD9, 4);
975 
976 	if (readl(p) == 'E' + ('I'<<8) + ('S'<<16) + ('A'<<24))
977 		EISA_bus = 1;
978 	early_iounmap(p, 4);
979 #endif
980 
981 	set_intr_gate(X86_TRAP_DE, divide_error);
982 	set_intr_gate_ist(X86_TRAP_NMI, &nmi, NMI_STACK);
983 	/* int4 can be called from all */
984 	set_system_intr_gate(X86_TRAP_OF, &overflow);
985 	set_intr_gate(X86_TRAP_BR, bounds);
986 	set_intr_gate(X86_TRAP_UD, invalid_op);
987 	set_intr_gate(X86_TRAP_NM, device_not_available);
988 #ifdef CONFIG_X86_32
989 	set_task_gate(X86_TRAP_DF, GDT_ENTRY_DOUBLEFAULT_TSS);
990 #else
991 	set_intr_gate_ist(X86_TRAP_DF, &double_fault, DOUBLEFAULT_STACK);
992 #endif
993 	set_intr_gate(X86_TRAP_OLD_MF, coprocessor_segment_overrun);
994 	set_intr_gate(X86_TRAP_TS, invalid_TSS);
995 	set_intr_gate(X86_TRAP_NP, segment_not_present);
996 	set_intr_gate(X86_TRAP_SS, stack_segment);
997 	set_intr_gate(X86_TRAP_GP, general_protection);
998 	set_intr_gate(X86_TRAP_SPURIOUS, spurious_interrupt_bug);
999 	set_intr_gate(X86_TRAP_MF, coprocessor_error);
1000 	set_intr_gate(X86_TRAP_AC, alignment_check);
1001 #ifdef CONFIG_X86_MCE
1002 	set_intr_gate_ist(X86_TRAP_MC, &machine_check, MCE_STACK);
1003 #endif
1004 	set_intr_gate(X86_TRAP_XF, simd_coprocessor_error);
1005 
1006 	/* Reserve all the builtin and the syscall vector: */
1007 	for (i = 0; i < FIRST_EXTERNAL_VECTOR; i++)
1008 		set_bit(i, used_vectors);
1009 
1010 #ifdef CONFIG_IA32_EMULATION
1011 	set_system_intr_gate(IA32_SYSCALL_VECTOR, entry_INT80_compat);
1012 	set_bit(IA32_SYSCALL_VECTOR, used_vectors);
1013 #endif
1014 
1015 #ifdef CONFIG_X86_32
1016 	set_system_intr_gate(IA32_SYSCALL_VECTOR, entry_INT80_32);
1017 	set_bit(IA32_SYSCALL_VECTOR, used_vectors);
1018 #endif
1019 
1020 	/*
1021 	 * Set the IDT descriptor to a fixed read-only location, so that the
1022 	 * "sidt" instruction will not leak the location of the kernel, and
1023 	 * to defend the IDT against arbitrary memory write vulnerabilities.
1024 	 * It will be reloaded in cpu_init() */
1025 	__set_fixmap(FIX_RO_IDT, __pa_symbol(idt_table), PAGE_KERNEL_RO);
1026 	idt_descr.address = fix_to_virt(FIX_RO_IDT);
1027 
1028 	/*
1029 	 * Should be a barrier for any external CPU state:
1030 	 */
1031 	cpu_init();
1032 
1033 	/*
1034 	 * X86_TRAP_DB and X86_TRAP_BP have been set
1035 	 * in early_trap_init(). However, ITS works only after
1036 	 * cpu_init() loads TSS. See comments in early_trap_init().
1037 	 */
1038 	set_intr_gate_ist(X86_TRAP_DB, &debug, DEBUG_STACK);
1039 	/* int3 can be called from all */
1040 	set_system_intr_gate_ist(X86_TRAP_BP, &int3, DEBUG_STACK);
1041 
1042 	x86_init.irqs.trap_init();
1043 
1044 #ifdef CONFIG_X86_64
1045 	memcpy(&debug_idt_table, &idt_table, IDT_ENTRIES * 16);
1046 	set_nmi_gate(X86_TRAP_DB, &debug);
1047 	set_nmi_gate(X86_TRAP_BP, &int3);
1048 #endif
1049 }
1050