1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * AMD Memory Encryption Support 4 * 5 * Copyright (C) 2019 SUSE 6 * 7 * Author: Joerg Roedel <jroedel@suse.de> 8 */ 9 10 #define pr_fmt(fmt) "SEV-ES: " fmt 11 12 #include <linux/sched/debug.h> /* For show_regs() */ 13 #include <linux/percpu-defs.h> 14 #include <linux/mem_encrypt.h> 15 #include <linux/lockdep.h> 16 #include <linux/printk.h> 17 #include <linux/mm_types.h> 18 #include <linux/set_memory.h> 19 #include <linux/memblock.h> 20 #include <linux/kernel.h> 21 #include <linux/mm.h> 22 23 #include <asm/cpu_entry_area.h> 24 #include <asm/stacktrace.h> 25 #include <asm/sev.h> 26 #include <asm/insn-eval.h> 27 #include <asm/fpu/internal.h> 28 #include <asm/processor.h> 29 #include <asm/realmode.h> 30 #include <asm/traps.h> 31 #include <asm/svm.h> 32 #include <asm/smp.h> 33 #include <asm/cpu.h> 34 35 #define DR7_RESET_VALUE 0x400 36 37 /* For early boot hypervisor communication in SEV-ES enabled guests */ 38 static struct ghcb boot_ghcb_page __bss_decrypted __aligned(PAGE_SIZE); 39 40 /* 41 * Needs to be in the .data section because we need it NULL before bss is 42 * cleared 43 */ 44 static struct ghcb __initdata *boot_ghcb; 45 46 /* #VC handler runtime per-CPU data */ 47 struct sev_es_runtime_data { 48 struct ghcb ghcb_page; 49 50 /* Physical storage for the per-CPU IST stack of the #VC handler */ 51 char ist_stack[EXCEPTION_STKSZ] __aligned(PAGE_SIZE); 52 53 /* 54 * Physical storage for the per-CPU fall-back stack of the #VC handler. 55 * The fall-back stack is used when it is not safe to switch back to the 56 * interrupted stack in the #VC entry code. 57 */ 58 char fallback_stack[EXCEPTION_STKSZ] __aligned(PAGE_SIZE); 59 60 /* 61 * Reserve one page per CPU as backup storage for the unencrypted GHCB. 62 * It is needed when an NMI happens while the #VC handler uses the real 63 * GHCB, and the NMI handler itself is causing another #VC exception. In 64 * that case the GHCB content of the first handler needs to be backed up 65 * and restored. 66 */ 67 struct ghcb backup_ghcb; 68 69 /* 70 * Mark the per-cpu GHCBs as in-use to detect nested #VC exceptions. 71 * There is no need for it to be atomic, because nothing is written to 72 * the GHCB between the read and the write of ghcb_active. So it is safe 73 * to use it when a nested #VC exception happens before the write. 74 * 75 * This is necessary for example in the #VC->NMI->#VC case when the NMI 76 * happens while the first #VC handler uses the GHCB. When the NMI code 77 * raises a second #VC handler it might overwrite the contents of the 78 * GHCB written by the first handler. To avoid this the content of the 79 * GHCB is saved and restored when the GHCB is detected to be in use 80 * already. 81 */ 82 bool ghcb_active; 83 bool backup_ghcb_active; 84 85 /* 86 * Cached DR7 value - write it on DR7 writes and return it on reads. 87 * That value will never make it to the real hardware DR7 as debugging 88 * is currently unsupported in SEV-ES guests. 89 */ 90 unsigned long dr7; 91 }; 92 93 struct ghcb_state { 94 struct ghcb *ghcb; 95 }; 96 97 static DEFINE_PER_CPU(struct sev_es_runtime_data*, runtime_data); 98 DEFINE_STATIC_KEY_FALSE(sev_es_enable_key); 99 100 /* Needed in vc_early_forward_exception */ 101 void do_early_exception(struct pt_regs *regs, int trapnr); 102 103 static void __init setup_vc_stacks(int cpu) 104 { 105 struct sev_es_runtime_data *data; 106 struct cpu_entry_area *cea; 107 unsigned long vaddr; 108 phys_addr_t pa; 109 110 data = per_cpu(runtime_data, cpu); 111 cea = get_cpu_entry_area(cpu); 112 113 /* Map #VC IST stack */ 114 vaddr = CEA_ESTACK_BOT(&cea->estacks, VC); 115 pa = __pa(data->ist_stack); 116 cea_set_pte((void *)vaddr, pa, PAGE_KERNEL); 117 118 /* Map VC fall-back stack */ 119 vaddr = CEA_ESTACK_BOT(&cea->estacks, VC2); 120 pa = __pa(data->fallback_stack); 121 cea_set_pte((void *)vaddr, pa, PAGE_KERNEL); 122 } 123 124 static __always_inline bool on_vc_stack(struct pt_regs *regs) 125 { 126 unsigned long sp = regs->sp; 127 128 /* User-mode RSP is not trusted */ 129 if (user_mode(regs)) 130 return false; 131 132 /* SYSCALL gap still has user-mode RSP */ 133 if (ip_within_syscall_gap(regs)) 134 return false; 135 136 return ((sp >= __this_cpu_ist_bottom_va(VC)) && (sp < __this_cpu_ist_top_va(VC))); 137 } 138 139 /* 140 * This function handles the case when an NMI is raised in the #VC 141 * exception handler entry code, before the #VC handler has switched off 142 * its IST stack. In this case, the IST entry for #VC must be adjusted, 143 * so that any nested #VC exception will not overwrite the stack 144 * contents of the interrupted #VC handler. 145 * 146 * The IST entry is adjusted unconditionally so that it can be also be 147 * unconditionally adjusted back in __sev_es_ist_exit(). Otherwise a 148 * nested sev_es_ist_exit() call may adjust back the IST entry too 149 * early. 150 * 151 * The __sev_es_ist_enter() and __sev_es_ist_exit() functions always run 152 * on the NMI IST stack, as they are only called from NMI handling code 153 * right now. 154 */ 155 void noinstr __sev_es_ist_enter(struct pt_regs *regs) 156 { 157 unsigned long old_ist, new_ist; 158 159 /* Read old IST entry */ 160 new_ist = old_ist = __this_cpu_read(cpu_tss_rw.x86_tss.ist[IST_INDEX_VC]); 161 162 /* 163 * If NMI happened while on the #VC IST stack, set the new IST 164 * value below regs->sp, so that the interrupted stack frame is 165 * not overwritten by subsequent #VC exceptions. 166 */ 167 if (on_vc_stack(regs)) 168 new_ist = regs->sp; 169 170 /* 171 * Reserve additional 8 bytes and store old IST value so this 172 * adjustment can be unrolled in __sev_es_ist_exit(). 173 */ 174 new_ist -= sizeof(old_ist); 175 *(unsigned long *)new_ist = old_ist; 176 177 /* Set new IST entry */ 178 this_cpu_write(cpu_tss_rw.x86_tss.ist[IST_INDEX_VC], new_ist); 179 } 180 181 void noinstr __sev_es_ist_exit(void) 182 { 183 unsigned long ist; 184 185 /* Read IST entry */ 186 ist = __this_cpu_read(cpu_tss_rw.x86_tss.ist[IST_INDEX_VC]); 187 188 if (WARN_ON(ist == __this_cpu_ist_top_va(VC))) 189 return; 190 191 /* Read back old IST entry and write it to the TSS */ 192 this_cpu_write(cpu_tss_rw.x86_tss.ist[IST_INDEX_VC], *(unsigned long *)ist); 193 } 194 195 static __always_inline struct ghcb *sev_es_get_ghcb(struct ghcb_state *state) 196 { 197 struct sev_es_runtime_data *data; 198 struct ghcb *ghcb; 199 200 data = this_cpu_read(runtime_data); 201 ghcb = &data->ghcb_page; 202 203 if (unlikely(data->ghcb_active)) { 204 /* GHCB is already in use - save its contents */ 205 206 if (unlikely(data->backup_ghcb_active)) 207 return NULL; 208 209 /* Mark backup_ghcb active before writing to it */ 210 data->backup_ghcb_active = true; 211 212 state->ghcb = &data->backup_ghcb; 213 214 /* Backup GHCB content */ 215 *state->ghcb = *ghcb; 216 } else { 217 state->ghcb = NULL; 218 data->ghcb_active = true; 219 } 220 221 return ghcb; 222 } 223 224 static __always_inline void sev_es_put_ghcb(struct ghcb_state *state) 225 { 226 struct sev_es_runtime_data *data; 227 struct ghcb *ghcb; 228 229 data = this_cpu_read(runtime_data); 230 ghcb = &data->ghcb_page; 231 232 if (state->ghcb) { 233 /* Restore GHCB from Backup */ 234 *ghcb = *state->ghcb; 235 data->backup_ghcb_active = false; 236 state->ghcb = NULL; 237 } else { 238 data->ghcb_active = false; 239 } 240 } 241 242 /* Needed in vc_early_forward_exception */ 243 void do_early_exception(struct pt_regs *regs, int trapnr); 244 245 static inline u64 sev_es_rd_ghcb_msr(void) 246 { 247 return __rdmsr(MSR_AMD64_SEV_ES_GHCB); 248 } 249 250 static __always_inline void sev_es_wr_ghcb_msr(u64 val) 251 { 252 u32 low, high; 253 254 low = (u32)(val); 255 high = (u32)(val >> 32); 256 257 native_wrmsr(MSR_AMD64_SEV_ES_GHCB, low, high); 258 } 259 260 static int vc_fetch_insn_kernel(struct es_em_ctxt *ctxt, 261 unsigned char *buffer) 262 { 263 return copy_from_kernel_nofault(buffer, (unsigned char *)ctxt->regs->ip, MAX_INSN_SIZE); 264 } 265 266 static enum es_result __vc_decode_user_insn(struct es_em_ctxt *ctxt) 267 { 268 char buffer[MAX_INSN_SIZE]; 269 int res; 270 271 res = insn_fetch_from_user_inatomic(ctxt->regs, buffer); 272 if (!res) { 273 ctxt->fi.vector = X86_TRAP_PF; 274 ctxt->fi.error_code = X86_PF_INSTR | X86_PF_USER; 275 ctxt->fi.cr2 = ctxt->regs->ip; 276 return ES_EXCEPTION; 277 } 278 279 if (!insn_decode_from_regs(&ctxt->insn, ctxt->regs, buffer, res)) 280 return ES_DECODE_FAILED; 281 282 if (ctxt->insn.immediate.got) 283 return ES_OK; 284 else 285 return ES_DECODE_FAILED; 286 } 287 288 static enum es_result __vc_decode_kern_insn(struct es_em_ctxt *ctxt) 289 { 290 char buffer[MAX_INSN_SIZE]; 291 int res, ret; 292 293 res = vc_fetch_insn_kernel(ctxt, buffer); 294 if (res) { 295 ctxt->fi.vector = X86_TRAP_PF; 296 ctxt->fi.error_code = X86_PF_INSTR; 297 ctxt->fi.cr2 = ctxt->regs->ip; 298 return ES_EXCEPTION; 299 } 300 301 ret = insn_decode(&ctxt->insn, buffer, MAX_INSN_SIZE, INSN_MODE_64); 302 if (ret < 0) 303 return ES_DECODE_FAILED; 304 else 305 return ES_OK; 306 } 307 308 static enum es_result vc_decode_insn(struct es_em_ctxt *ctxt) 309 { 310 if (user_mode(ctxt->regs)) 311 return __vc_decode_user_insn(ctxt); 312 else 313 return __vc_decode_kern_insn(ctxt); 314 } 315 316 static enum es_result vc_write_mem(struct es_em_ctxt *ctxt, 317 char *dst, char *buf, size_t size) 318 { 319 unsigned long error_code = X86_PF_PROT | X86_PF_WRITE; 320 char __user *target = (char __user *)dst; 321 u64 d8; 322 u32 d4; 323 u16 d2; 324 u8 d1; 325 326 /* If instruction ran in kernel mode and the I/O buffer is in kernel space */ 327 if (!user_mode(ctxt->regs) && !access_ok(target, size)) { 328 memcpy(dst, buf, size); 329 return ES_OK; 330 } 331 332 switch (size) { 333 case 1: 334 memcpy(&d1, buf, 1); 335 if (put_user(d1, target)) 336 goto fault; 337 break; 338 case 2: 339 memcpy(&d2, buf, 2); 340 if (put_user(d2, target)) 341 goto fault; 342 break; 343 case 4: 344 memcpy(&d4, buf, 4); 345 if (put_user(d4, target)) 346 goto fault; 347 break; 348 case 8: 349 memcpy(&d8, buf, 8); 350 if (put_user(d8, target)) 351 goto fault; 352 break; 353 default: 354 WARN_ONCE(1, "%s: Invalid size: %zu\n", __func__, size); 355 return ES_UNSUPPORTED; 356 } 357 358 return ES_OK; 359 360 fault: 361 if (user_mode(ctxt->regs)) 362 error_code |= X86_PF_USER; 363 364 ctxt->fi.vector = X86_TRAP_PF; 365 ctxt->fi.error_code = error_code; 366 ctxt->fi.cr2 = (unsigned long)dst; 367 368 return ES_EXCEPTION; 369 } 370 371 static enum es_result vc_read_mem(struct es_em_ctxt *ctxt, 372 char *src, char *buf, size_t size) 373 { 374 unsigned long error_code = X86_PF_PROT; 375 char __user *s = (char __user *)src; 376 u64 d8; 377 u32 d4; 378 u16 d2; 379 u8 d1; 380 381 /* If instruction ran in kernel mode and the I/O buffer is in kernel space */ 382 if (!user_mode(ctxt->regs) && !access_ok(s, size)) { 383 memcpy(buf, src, size); 384 return ES_OK; 385 } 386 387 switch (size) { 388 case 1: 389 if (get_user(d1, s)) 390 goto fault; 391 memcpy(buf, &d1, 1); 392 break; 393 case 2: 394 if (get_user(d2, s)) 395 goto fault; 396 memcpy(buf, &d2, 2); 397 break; 398 case 4: 399 if (get_user(d4, s)) 400 goto fault; 401 memcpy(buf, &d4, 4); 402 break; 403 case 8: 404 if (get_user(d8, s)) 405 goto fault; 406 memcpy(buf, &d8, 8); 407 break; 408 default: 409 WARN_ONCE(1, "%s: Invalid size: %zu\n", __func__, size); 410 return ES_UNSUPPORTED; 411 } 412 413 return ES_OK; 414 415 fault: 416 if (user_mode(ctxt->regs)) 417 error_code |= X86_PF_USER; 418 419 ctxt->fi.vector = X86_TRAP_PF; 420 ctxt->fi.error_code = error_code; 421 ctxt->fi.cr2 = (unsigned long)src; 422 423 return ES_EXCEPTION; 424 } 425 426 static enum es_result vc_slow_virt_to_phys(struct ghcb *ghcb, struct es_em_ctxt *ctxt, 427 unsigned long vaddr, phys_addr_t *paddr) 428 { 429 unsigned long va = (unsigned long)vaddr; 430 unsigned int level; 431 phys_addr_t pa; 432 pgd_t *pgd; 433 pte_t *pte; 434 435 pgd = __va(read_cr3_pa()); 436 pgd = &pgd[pgd_index(va)]; 437 pte = lookup_address_in_pgd(pgd, va, &level); 438 if (!pte) { 439 ctxt->fi.vector = X86_TRAP_PF; 440 ctxt->fi.cr2 = vaddr; 441 ctxt->fi.error_code = 0; 442 443 if (user_mode(ctxt->regs)) 444 ctxt->fi.error_code |= X86_PF_USER; 445 446 return ES_EXCEPTION; 447 } 448 449 if (WARN_ON_ONCE(pte_val(*pte) & _PAGE_ENC)) 450 /* Emulated MMIO to/from encrypted memory not supported */ 451 return ES_UNSUPPORTED; 452 453 pa = (phys_addr_t)pte_pfn(*pte) << PAGE_SHIFT; 454 pa |= va & ~page_level_mask(level); 455 456 *paddr = pa; 457 458 return ES_OK; 459 } 460 461 /* Include code shared with pre-decompression boot stage */ 462 #include "sev-shared.c" 463 464 void noinstr __sev_es_nmi_complete(void) 465 { 466 struct ghcb_state state; 467 struct ghcb *ghcb; 468 469 ghcb = sev_es_get_ghcb(&state); 470 471 vc_ghcb_invalidate(ghcb); 472 ghcb_set_sw_exit_code(ghcb, SVM_VMGEXIT_NMI_COMPLETE); 473 ghcb_set_sw_exit_info_1(ghcb, 0); 474 ghcb_set_sw_exit_info_2(ghcb, 0); 475 476 sev_es_wr_ghcb_msr(__pa_nodebug(ghcb)); 477 VMGEXIT(); 478 479 sev_es_put_ghcb(&state); 480 } 481 482 static u64 get_jump_table_addr(void) 483 { 484 struct ghcb_state state; 485 unsigned long flags; 486 struct ghcb *ghcb; 487 u64 ret = 0; 488 489 local_irq_save(flags); 490 491 ghcb = sev_es_get_ghcb(&state); 492 493 vc_ghcb_invalidate(ghcb); 494 ghcb_set_sw_exit_code(ghcb, SVM_VMGEXIT_AP_JUMP_TABLE); 495 ghcb_set_sw_exit_info_1(ghcb, SVM_VMGEXIT_GET_AP_JUMP_TABLE); 496 ghcb_set_sw_exit_info_2(ghcb, 0); 497 498 sev_es_wr_ghcb_msr(__pa(ghcb)); 499 VMGEXIT(); 500 501 if (ghcb_sw_exit_info_1_is_valid(ghcb) && 502 ghcb_sw_exit_info_2_is_valid(ghcb)) 503 ret = ghcb->save.sw_exit_info_2; 504 505 sev_es_put_ghcb(&state); 506 507 local_irq_restore(flags); 508 509 return ret; 510 } 511 512 int sev_es_setup_ap_jump_table(struct real_mode_header *rmh) 513 { 514 u16 startup_cs, startup_ip; 515 phys_addr_t jump_table_pa; 516 u64 jump_table_addr; 517 u16 __iomem *jump_table; 518 519 jump_table_addr = get_jump_table_addr(); 520 521 /* On UP guests there is no jump table so this is not a failure */ 522 if (!jump_table_addr) 523 return 0; 524 525 /* Check if AP Jump Table is page-aligned */ 526 if (jump_table_addr & ~PAGE_MASK) 527 return -EINVAL; 528 529 jump_table_pa = jump_table_addr & PAGE_MASK; 530 531 startup_cs = (u16)(rmh->trampoline_start >> 4); 532 startup_ip = (u16)(rmh->sev_es_trampoline_start - 533 rmh->trampoline_start); 534 535 jump_table = ioremap_encrypted(jump_table_pa, PAGE_SIZE); 536 if (!jump_table) 537 return -EIO; 538 539 writew(startup_ip, &jump_table[0]); 540 writew(startup_cs, &jump_table[1]); 541 542 iounmap(jump_table); 543 544 return 0; 545 } 546 547 /* 548 * This is needed by the OVMF UEFI firmware which will use whatever it finds in 549 * the GHCB MSR as its GHCB to talk to the hypervisor. So make sure the per-cpu 550 * runtime GHCBs used by the kernel are also mapped in the EFI page-table. 551 */ 552 int __init sev_es_efi_map_ghcbs(pgd_t *pgd) 553 { 554 struct sev_es_runtime_data *data; 555 unsigned long address, pflags; 556 int cpu; 557 u64 pfn; 558 559 if (!sev_es_active()) 560 return 0; 561 562 pflags = _PAGE_NX | _PAGE_RW; 563 564 for_each_possible_cpu(cpu) { 565 data = per_cpu(runtime_data, cpu); 566 567 address = __pa(&data->ghcb_page); 568 pfn = address >> PAGE_SHIFT; 569 570 if (kernel_map_pages_in_pgd(pgd, pfn, address, 1, pflags)) 571 return 1; 572 } 573 574 return 0; 575 } 576 577 static enum es_result vc_handle_msr(struct ghcb *ghcb, struct es_em_ctxt *ctxt) 578 { 579 struct pt_regs *regs = ctxt->regs; 580 enum es_result ret; 581 u64 exit_info_1; 582 583 /* Is it a WRMSR? */ 584 exit_info_1 = (ctxt->insn.opcode.bytes[1] == 0x30) ? 1 : 0; 585 586 ghcb_set_rcx(ghcb, regs->cx); 587 if (exit_info_1) { 588 ghcb_set_rax(ghcb, regs->ax); 589 ghcb_set_rdx(ghcb, regs->dx); 590 } 591 592 ret = sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_MSR, exit_info_1, 0); 593 594 if ((ret == ES_OK) && (!exit_info_1)) { 595 regs->ax = ghcb->save.rax; 596 regs->dx = ghcb->save.rdx; 597 } 598 599 return ret; 600 } 601 602 /* 603 * This function runs on the first #VC exception after the kernel 604 * switched to virtual addresses. 605 */ 606 static bool __init sev_es_setup_ghcb(void) 607 { 608 /* First make sure the hypervisor talks a supported protocol. */ 609 if (!sev_es_negotiate_protocol()) 610 return false; 611 612 /* 613 * Clear the boot_ghcb. The first exception comes in before the bss 614 * section is cleared. 615 */ 616 memset(&boot_ghcb_page, 0, PAGE_SIZE); 617 618 /* Alright - Make the boot-ghcb public */ 619 boot_ghcb = &boot_ghcb_page; 620 621 return true; 622 } 623 624 #ifdef CONFIG_HOTPLUG_CPU 625 static void sev_es_ap_hlt_loop(void) 626 { 627 struct ghcb_state state; 628 struct ghcb *ghcb; 629 630 ghcb = sev_es_get_ghcb(&state); 631 632 while (true) { 633 vc_ghcb_invalidate(ghcb); 634 ghcb_set_sw_exit_code(ghcb, SVM_VMGEXIT_AP_HLT_LOOP); 635 ghcb_set_sw_exit_info_1(ghcb, 0); 636 ghcb_set_sw_exit_info_2(ghcb, 0); 637 638 sev_es_wr_ghcb_msr(__pa(ghcb)); 639 VMGEXIT(); 640 641 /* Wakeup signal? */ 642 if (ghcb_sw_exit_info_2_is_valid(ghcb) && 643 ghcb->save.sw_exit_info_2) 644 break; 645 } 646 647 sev_es_put_ghcb(&state); 648 } 649 650 /* 651 * Play_dead handler when running under SEV-ES. This is needed because 652 * the hypervisor can't deliver an SIPI request to restart the AP. 653 * Instead the kernel has to issue a VMGEXIT to halt the VCPU until the 654 * hypervisor wakes it up again. 655 */ 656 static void sev_es_play_dead(void) 657 { 658 play_dead_common(); 659 660 /* IRQs now disabled */ 661 662 sev_es_ap_hlt_loop(); 663 664 /* 665 * If we get here, the VCPU was woken up again. Jump to CPU 666 * startup code to get it back online. 667 */ 668 start_cpu0(); 669 } 670 #else /* CONFIG_HOTPLUG_CPU */ 671 #define sev_es_play_dead native_play_dead 672 #endif /* CONFIG_HOTPLUG_CPU */ 673 674 #ifdef CONFIG_SMP 675 static void __init sev_es_setup_play_dead(void) 676 { 677 smp_ops.play_dead = sev_es_play_dead; 678 } 679 #else 680 static inline void sev_es_setup_play_dead(void) { } 681 #endif 682 683 static void __init alloc_runtime_data(int cpu) 684 { 685 struct sev_es_runtime_data *data; 686 687 data = memblock_alloc(sizeof(*data), PAGE_SIZE); 688 if (!data) 689 panic("Can't allocate SEV-ES runtime data"); 690 691 per_cpu(runtime_data, cpu) = data; 692 } 693 694 static void __init init_ghcb(int cpu) 695 { 696 struct sev_es_runtime_data *data; 697 int err; 698 699 data = per_cpu(runtime_data, cpu); 700 701 err = early_set_memory_decrypted((unsigned long)&data->ghcb_page, 702 sizeof(data->ghcb_page)); 703 if (err) 704 panic("Can't map GHCBs unencrypted"); 705 706 memset(&data->ghcb_page, 0, sizeof(data->ghcb_page)); 707 708 data->ghcb_active = false; 709 data->backup_ghcb_active = false; 710 } 711 712 void __init sev_es_init_vc_handling(void) 713 { 714 int cpu; 715 716 BUILD_BUG_ON(offsetof(struct sev_es_runtime_data, ghcb_page) % PAGE_SIZE); 717 718 if (!sev_es_active()) 719 return; 720 721 if (!sev_es_check_cpu_features()) 722 panic("SEV-ES CPU Features missing"); 723 724 /* Enable SEV-ES special handling */ 725 static_branch_enable(&sev_es_enable_key); 726 727 /* Initialize per-cpu GHCB pages */ 728 for_each_possible_cpu(cpu) { 729 alloc_runtime_data(cpu); 730 init_ghcb(cpu); 731 setup_vc_stacks(cpu); 732 } 733 734 sev_es_setup_play_dead(); 735 736 /* Secondary CPUs use the runtime #VC handler */ 737 initial_vc_handler = (unsigned long)safe_stack_exc_vmm_communication; 738 } 739 740 static void __init vc_early_forward_exception(struct es_em_ctxt *ctxt) 741 { 742 int trapnr = ctxt->fi.vector; 743 744 if (trapnr == X86_TRAP_PF) 745 native_write_cr2(ctxt->fi.cr2); 746 747 ctxt->regs->orig_ax = ctxt->fi.error_code; 748 do_early_exception(ctxt->regs, trapnr); 749 } 750 751 static long *vc_insn_get_reg(struct es_em_ctxt *ctxt) 752 { 753 long *reg_array; 754 int offset; 755 756 reg_array = (long *)ctxt->regs; 757 offset = insn_get_modrm_reg_off(&ctxt->insn, ctxt->regs); 758 759 if (offset < 0) 760 return NULL; 761 762 offset /= sizeof(long); 763 764 return reg_array + offset; 765 } 766 767 static long *vc_insn_get_rm(struct es_em_ctxt *ctxt) 768 { 769 long *reg_array; 770 int offset; 771 772 reg_array = (long *)ctxt->regs; 773 offset = insn_get_modrm_rm_off(&ctxt->insn, ctxt->regs); 774 775 if (offset < 0) 776 return NULL; 777 778 offset /= sizeof(long); 779 780 return reg_array + offset; 781 } 782 static enum es_result vc_do_mmio(struct ghcb *ghcb, struct es_em_ctxt *ctxt, 783 unsigned int bytes, bool read) 784 { 785 u64 exit_code, exit_info_1, exit_info_2; 786 unsigned long ghcb_pa = __pa(ghcb); 787 enum es_result res; 788 phys_addr_t paddr; 789 void __user *ref; 790 791 ref = insn_get_addr_ref(&ctxt->insn, ctxt->regs); 792 if (ref == (void __user *)-1L) 793 return ES_UNSUPPORTED; 794 795 exit_code = read ? SVM_VMGEXIT_MMIO_READ : SVM_VMGEXIT_MMIO_WRITE; 796 797 res = vc_slow_virt_to_phys(ghcb, ctxt, (unsigned long)ref, &paddr); 798 if (res != ES_OK) { 799 if (res == ES_EXCEPTION && !read) 800 ctxt->fi.error_code |= X86_PF_WRITE; 801 802 return res; 803 } 804 805 exit_info_1 = paddr; 806 /* Can never be greater than 8 */ 807 exit_info_2 = bytes; 808 809 ghcb_set_sw_scratch(ghcb, ghcb_pa + offsetof(struct ghcb, shared_buffer)); 810 811 return sev_es_ghcb_hv_call(ghcb, ctxt, exit_code, exit_info_1, exit_info_2); 812 } 813 814 static enum es_result vc_handle_mmio_twobyte_ops(struct ghcb *ghcb, 815 struct es_em_ctxt *ctxt) 816 { 817 struct insn *insn = &ctxt->insn; 818 unsigned int bytes = 0; 819 enum es_result ret; 820 int sign_byte; 821 long *reg_data; 822 823 switch (insn->opcode.bytes[1]) { 824 /* MMIO Read w/ zero-extension */ 825 case 0xb6: 826 bytes = 1; 827 fallthrough; 828 case 0xb7: 829 if (!bytes) 830 bytes = 2; 831 832 ret = vc_do_mmio(ghcb, ctxt, bytes, true); 833 if (ret) 834 break; 835 836 /* Zero extend based on operand size */ 837 reg_data = vc_insn_get_reg(ctxt); 838 if (!reg_data) 839 return ES_DECODE_FAILED; 840 841 memset(reg_data, 0, insn->opnd_bytes); 842 843 memcpy(reg_data, ghcb->shared_buffer, bytes); 844 break; 845 846 /* MMIO Read w/ sign-extension */ 847 case 0xbe: 848 bytes = 1; 849 fallthrough; 850 case 0xbf: 851 if (!bytes) 852 bytes = 2; 853 854 ret = vc_do_mmio(ghcb, ctxt, bytes, true); 855 if (ret) 856 break; 857 858 /* Sign extend based on operand size */ 859 reg_data = vc_insn_get_reg(ctxt); 860 if (!reg_data) 861 return ES_DECODE_FAILED; 862 863 if (bytes == 1) { 864 u8 *val = (u8 *)ghcb->shared_buffer; 865 866 sign_byte = (*val & 0x80) ? 0xff : 0x00; 867 } else { 868 u16 *val = (u16 *)ghcb->shared_buffer; 869 870 sign_byte = (*val & 0x8000) ? 0xff : 0x00; 871 } 872 memset(reg_data, sign_byte, insn->opnd_bytes); 873 874 memcpy(reg_data, ghcb->shared_buffer, bytes); 875 break; 876 877 default: 878 ret = ES_UNSUPPORTED; 879 } 880 881 return ret; 882 } 883 884 /* 885 * The MOVS instruction has two memory operands, which raises the 886 * problem that it is not known whether the access to the source or the 887 * destination caused the #VC exception (and hence whether an MMIO read 888 * or write operation needs to be emulated). 889 * 890 * Instead of playing games with walking page-tables and trying to guess 891 * whether the source or destination is an MMIO range, split the move 892 * into two operations, a read and a write with only one memory operand. 893 * This will cause a nested #VC exception on the MMIO address which can 894 * then be handled. 895 * 896 * This implementation has the benefit that it also supports MOVS where 897 * source _and_ destination are MMIO regions. 898 * 899 * It will slow MOVS on MMIO down a lot, but in SEV-ES guests it is a 900 * rare operation. If it turns out to be a performance problem the split 901 * operations can be moved to memcpy_fromio() and memcpy_toio(). 902 */ 903 static enum es_result vc_handle_mmio_movs(struct es_em_ctxt *ctxt, 904 unsigned int bytes) 905 { 906 unsigned long ds_base, es_base; 907 unsigned char *src, *dst; 908 unsigned char buffer[8]; 909 enum es_result ret; 910 bool rep; 911 int off; 912 913 ds_base = insn_get_seg_base(ctxt->regs, INAT_SEG_REG_DS); 914 es_base = insn_get_seg_base(ctxt->regs, INAT_SEG_REG_ES); 915 916 if (ds_base == -1L || es_base == -1L) { 917 ctxt->fi.vector = X86_TRAP_GP; 918 ctxt->fi.error_code = 0; 919 return ES_EXCEPTION; 920 } 921 922 src = ds_base + (unsigned char *)ctxt->regs->si; 923 dst = es_base + (unsigned char *)ctxt->regs->di; 924 925 ret = vc_read_mem(ctxt, src, buffer, bytes); 926 if (ret != ES_OK) 927 return ret; 928 929 ret = vc_write_mem(ctxt, dst, buffer, bytes); 930 if (ret != ES_OK) 931 return ret; 932 933 if (ctxt->regs->flags & X86_EFLAGS_DF) 934 off = -bytes; 935 else 936 off = bytes; 937 938 ctxt->regs->si += off; 939 ctxt->regs->di += off; 940 941 rep = insn_has_rep_prefix(&ctxt->insn); 942 if (rep) 943 ctxt->regs->cx -= 1; 944 945 if (!rep || ctxt->regs->cx == 0) 946 return ES_OK; 947 else 948 return ES_RETRY; 949 } 950 951 static enum es_result vc_handle_mmio(struct ghcb *ghcb, 952 struct es_em_ctxt *ctxt) 953 { 954 struct insn *insn = &ctxt->insn; 955 unsigned int bytes = 0; 956 enum es_result ret; 957 long *reg_data; 958 959 switch (insn->opcode.bytes[0]) { 960 /* MMIO Write */ 961 case 0x88: 962 bytes = 1; 963 fallthrough; 964 case 0x89: 965 if (!bytes) 966 bytes = insn->opnd_bytes; 967 968 reg_data = vc_insn_get_reg(ctxt); 969 if (!reg_data) 970 return ES_DECODE_FAILED; 971 972 memcpy(ghcb->shared_buffer, reg_data, bytes); 973 974 ret = vc_do_mmio(ghcb, ctxt, bytes, false); 975 break; 976 977 case 0xc6: 978 bytes = 1; 979 fallthrough; 980 case 0xc7: 981 if (!bytes) 982 bytes = insn->opnd_bytes; 983 984 memcpy(ghcb->shared_buffer, insn->immediate1.bytes, bytes); 985 986 ret = vc_do_mmio(ghcb, ctxt, bytes, false); 987 break; 988 989 /* MMIO Read */ 990 case 0x8a: 991 bytes = 1; 992 fallthrough; 993 case 0x8b: 994 if (!bytes) 995 bytes = insn->opnd_bytes; 996 997 ret = vc_do_mmio(ghcb, ctxt, bytes, true); 998 if (ret) 999 break; 1000 1001 reg_data = vc_insn_get_reg(ctxt); 1002 if (!reg_data) 1003 return ES_DECODE_FAILED; 1004 1005 /* Zero-extend for 32-bit operation */ 1006 if (bytes == 4) 1007 *reg_data = 0; 1008 1009 memcpy(reg_data, ghcb->shared_buffer, bytes); 1010 break; 1011 1012 /* MOVS instruction */ 1013 case 0xa4: 1014 bytes = 1; 1015 fallthrough; 1016 case 0xa5: 1017 if (!bytes) 1018 bytes = insn->opnd_bytes; 1019 1020 ret = vc_handle_mmio_movs(ctxt, bytes); 1021 break; 1022 /* Two-Byte Opcodes */ 1023 case 0x0f: 1024 ret = vc_handle_mmio_twobyte_ops(ghcb, ctxt); 1025 break; 1026 default: 1027 ret = ES_UNSUPPORTED; 1028 } 1029 1030 return ret; 1031 } 1032 1033 static enum es_result vc_handle_dr7_write(struct ghcb *ghcb, 1034 struct es_em_ctxt *ctxt) 1035 { 1036 struct sev_es_runtime_data *data = this_cpu_read(runtime_data); 1037 long val, *reg = vc_insn_get_rm(ctxt); 1038 enum es_result ret; 1039 1040 if (!reg) 1041 return ES_DECODE_FAILED; 1042 1043 val = *reg; 1044 1045 /* Upper 32 bits must be written as zeroes */ 1046 if (val >> 32) { 1047 ctxt->fi.vector = X86_TRAP_GP; 1048 ctxt->fi.error_code = 0; 1049 return ES_EXCEPTION; 1050 } 1051 1052 /* Clear out other reserved bits and set bit 10 */ 1053 val = (val & 0xffff23ffL) | BIT(10); 1054 1055 /* Early non-zero writes to DR7 are not supported */ 1056 if (!data && (val & ~DR7_RESET_VALUE)) 1057 return ES_UNSUPPORTED; 1058 1059 /* Using a value of 0 for ExitInfo1 means RAX holds the value */ 1060 ghcb_set_rax(ghcb, val); 1061 ret = sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_WRITE_DR7, 0, 0); 1062 if (ret != ES_OK) 1063 return ret; 1064 1065 if (data) 1066 data->dr7 = val; 1067 1068 return ES_OK; 1069 } 1070 1071 static enum es_result vc_handle_dr7_read(struct ghcb *ghcb, 1072 struct es_em_ctxt *ctxt) 1073 { 1074 struct sev_es_runtime_data *data = this_cpu_read(runtime_data); 1075 long *reg = vc_insn_get_rm(ctxt); 1076 1077 if (!reg) 1078 return ES_DECODE_FAILED; 1079 1080 if (data) 1081 *reg = data->dr7; 1082 else 1083 *reg = DR7_RESET_VALUE; 1084 1085 return ES_OK; 1086 } 1087 1088 static enum es_result vc_handle_wbinvd(struct ghcb *ghcb, 1089 struct es_em_ctxt *ctxt) 1090 { 1091 return sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_WBINVD, 0, 0); 1092 } 1093 1094 static enum es_result vc_handle_rdpmc(struct ghcb *ghcb, struct es_em_ctxt *ctxt) 1095 { 1096 enum es_result ret; 1097 1098 ghcb_set_rcx(ghcb, ctxt->regs->cx); 1099 1100 ret = sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_RDPMC, 0, 0); 1101 if (ret != ES_OK) 1102 return ret; 1103 1104 if (!(ghcb_rax_is_valid(ghcb) && ghcb_rdx_is_valid(ghcb))) 1105 return ES_VMM_ERROR; 1106 1107 ctxt->regs->ax = ghcb->save.rax; 1108 ctxt->regs->dx = ghcb->save.rdx; 1109 1110 return ES_OK; 1111 } 1112 1113 static enum es_result vc_handle_monitor(struct ghcb *ghcb, 1114 struct es_em_ctxt *ctxt) 1115 { 1116 /* 1117 * Treat it as a NOP and do not leak a physical address to the 1118 * hypervisor. 1119 */ 1120 return ES_OK; 1121 } 1122 1123 static enum es_result vc_handle_mwait(struct ghcb *ghcb, 1124 struct es_em_ctxt *ctxt) 1125 { 1126 /* Treat the same as MONITOR/MONITORX */ 1127 return ES_OK; 1128 } 1129 1130 static enum es_result vc_handle_vmmcall(struct ghcb *ghcb, 1131 struct es_em_ctxt *ctxt) 1132 { 1133 enum es_result ret; 1134 1135 ghcb_set_rax(ghcb, ctxt->regs->ax); 1136 ghcb_set_cpl(ghcb, user_mode(ctxt->regs) ? 3 : 0); 1137 1138 if (x86_platform.hyper.sev_es_hcall_prepare) 1139 x86_platform.hyper.sev_es_hcall_prepare(ghcb, ctxt->regs); 1140 1141 ret = sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_VMMCALL, 0, 0); 1142 if (ret != ES_OK) 1143 return ret; 1144 1145 if (!ghcb_rax_is_valid(ghcb)) 1146 return ES_VMM_ERROR; 1147 1148 ctxt->regs->ax = ghcb->save.rax; 1149 1150 /* 1151 * Call sev_es_hcall_finish() after regs->ax is already set. 1152 * This allows the hypervisor handler to overwrite it again if 1153 * necessary. 1154 */ 1155 if (x86_platform.hyper.sev_es_hcall_finish && 1156 !x86_platform.hyper.sev_es_hcall_finish(ghcb, ctxt->regs)) 1157 return ES_VMM_ERROR; 1158 1159 return ES_OK; 1160 } 1161 1162 static enum es_result vc_handle_trap_ac(struct ghcb *ghcb, 1163 struct es_em_ctxt *ctxt) 1164 { 1165 /* 1166 * Calling ecx_alignment_check() directly does not work, because it 1167 * enables IRQs and the GHCB is active. Forward the exception and call 1168 * it later from vc_forward_exception(). 1169 */ 1170 ctxt->fi.vector = X86_TRAP_AC; 1171 ctxt->fi.error_code = 0; 1172 return ES_EXCEPTION; 1173 } 1174 1175 static __always_inline void vc_handle_trap_db(struct pt_regs *regs) 1176 { 1177 if (user_mode(regs)) 1178 noist_exc_debug(regs); 1179 else 1180 exc_debug(regs); 1181 } 1182 1183 static enum es_result vc_handle_exitcode(struct es_em_ctxt *ctxt, 1184 struct ghcb *ghcb, 1185 unsigned long exit_code) 1186 { 1187 enum es_result result; 1188 1189 switch (exit_code) { 1190 case SVM_EXIT_READ_DR7: 1191 result = vc_handle_dr7_read(ghcb, ctxt); 1192 break; 1193 case SVM_EXIT_WRITE_DR7: 1194 result = vc_handle_dr7_write(ghcb, ctxt); 1195 break; 1196 case SVM_EXIT_EXCP_BASE + X86_TRAP_AC: 1197 result = vc_handle_trap_ac(ghcb, ctxt); 1198 break; 1199 case SVM_EXIT_RDTSC: 1200 case SVM_EXIT_RDTSCP: 1201 result = vc_handle_rdtsc(ghcb, ctxt, exit_code); 1202 break; 1203 case SVM_EXIT_RDPMC: 1204 result = vc_handle_rdpmc(ghcb, ctxt); 1205 break; 1206 case SVM_EXIT_INVD: 1207 pr_err_ratelimited("#VC exception for INVD??? Seriously???\n"); 1208 result = ES_UNSUPPORTED; 1209 break; 1210 case SVM_EXIT_CPUID: 1211 result = vc_handle_cpuid(ghcb, ctxt); 1212 break; 1213 case SVM_EXIT_IOIO: 1214 result = vc_handle_ioio(ghcb, ctxt); 1215 break; 1216 case SVM_EXIT_MSR: 1217 result = vc_handle_msr(ghcb, ctxt); 1218 break; 1219 case SVM_EXIT_VMMCALL: 1220 result = vc_handle_vmmcall(ghcb, ctxt); 1221 break; 1222 case SVM_EXIT_WBINVD: 1223 result = vc_handle_wbinvd(ghcb, ctxt); 1224 break; 1225 case SVM_EXIT_MONITOR: 1226 result = vc_handle_monitor(ghcb, ctxt); 1227 break; 1228 case SVM_EXIT_MWAIT: 1229 result = vc_handle_mwait(ghcb, ctxt); 1230 break; 1231 case SVM_EXIT_NPF: 1232 result = vc_handle_mmio(ghcb, ctxt); 1233 break; 1234 default: 1235 /* 1236 * Unexpected #VC exception 1237 */ 1238 result = ES_UNSUPPORTED; 1239 } 1240 1241 return result; 1242 } 1243 1244 static __always_inline void vc_forward_exception(struct es_em_ctxt *ctxt) 1245 { 1246 long error_code = ctxt->fi.error_code; 1247 int trapnr = ctxt->fi.vector; 1248 1249 ctxt->regs->orig_ax = ctxt->fi.error_code; 1250 1251 switch (trapnr) { 1252 case X86_TRAP_GP: 1253 exc_general_protection(ctxt->regs, error_code); 1254 break; 1255 case X86_TRAP_UD: 1256 exc_invalid_op(ctxt->regs); 1257 break; 1258 case X86_TRAP_AC: 1259 exc_alignment_check(ctxt->regs, error_code); 1260 break; 1261 default: 1262 pr_emerg("Unsupported exception in #VC instruction emulation - can't continue\n"); 1263 BUG(); 1264 } 1265 } 1266 1267 static __always_inline bool on_vc_fallback_stack(struct pt_regs *regs) 1268 { 1269 unsigned long sp = (unsigned long)regs; 1270 1271 return (sp >= __this_cpu_ist_bottom_va(VC2) && sp < __this_cpu_ist_top_va(VC2)); 1272 } 1273 1274 /* 1275 * Main #VC exception handler. It is called when the entry code was able to 1276 * switch off the IST to a safe kernel stack. 1277 * 1278 * With the current implementation it is always possible to switch to a safe 1279 * stack because #VC exceptions only happen at known places, like intercepted 1280 * instructions or accesses to MMIO areas/IO ports. They can also happen with 1281 * code instrumentation when the hypervisor intercepts #DB, but the critical 1282 * paths are forbidden to be instrumented, so #DB exceptions currently also 1283 * only happen in safe places. 1284 */ 1285 DEFINE_IDTENTRY_VC_SAFE_STACK(exc_vmm_communication) 1286 { 1287 struct sev_es_runtime_data *data = this_cpu_read(runtime_data); 1288 irqentry_state_t irq_state; 1289 struct ghcb_state state; 1290 struct es_em_ctxt ctxt; 1291 enum es_result result; 1292 struct ghcb *ghcb; 1293 1294 /* 1295 * Handle #DB before calling into !noinstr code to avoid recursive #DB. 1296 */ 1297 if (error_code == SVM_EXIT_EXCP_BASE + X86_TRAP_DB) { 1298 vc_handle_trap_db(regs); 1299 return; 1300 } 1301 1302 irq_state = irqentry_nmi_enter(regs); 1303 lockdep_assert_irqs_disabled(); 1304 instrumentation_begin(); 1305 1306 /* 1307 * This is invoked through an interrupt gate, so IRQs are disabled. The 1308 * code below might walk page-tables for user or kernel addresses, so 1309 * keep the IRQs disabled to protect us against concurrent TLB flushes. 1310 */ 1311 1312 ghcb = sev_es_get_ghcb(&state); 1313 if (!ghcb) { 1314 /* 1315 * Mark GHCBs inactive so that panic() is able to print the 1316 * message. 1317 */ 1318 data->ghcb_active = false; 1319 data->backup_ghcb_active = false; 1320 1321 panic("Unable to handle #VC exception! GHCB and Backup GHCB are already in use"); 1322 } 1323 1324 vc_ghcb_invalidate(ghcb); 1325 result = vc_init_em_ctxt(&ctxt, regs, error_code); 1326 1327 if (result == ES_OK) 1328 result = vc_handle_exitcode(&ctxt, ghcb, error_code); 1329 1330 sev_es_put_ghcb(&state); 1331 1332 /* Done - now check the result */ 1333 switch (result) { 1334 case ES_OK: 1335 vc_finish_insn(&ctxt); 1336 break; 1337 case ES_UNSUPPORTED: 1338 pr_err_ratelimited("Unsupported exit-code 0x%02lx in early #VC exception (IP: 0x%lx)\n", 1339 error_code, regs->ip); 1340 goto fail; 1341 case ES_VMM_ERROR: 1342 pr_err_ratelimited("Failure in communication with VMM (exit-code 0x%02lx IP: 0x%lx)\n", 1343 error_code, regs->ip); 1344 goto fail; 1345 case ES_DECODE_FAILED: 1346 pr_err_ratelimited("Failed to decode instruction (exit-code 0x%02lx IP: 0x%lx)\n", 1347 error_code, regs->ip); 1348 goto fail; 1349 case ES_EXCEPTION: 1350 vc_forward_exception(&ctxt); 1351 break; 1352 case ES_RETRY: 1353 /* Nothing to do */ 1354 break; 1355 default: 1356 pr_emerg("Unknown result in %s():%d\n", __func__, result); 1357 /* 1358 * Emulating the instruction which caused the #VC exception 1359 * failed - can't continue so print debug information 1360 */ 1361 BUG(); 1362 } 1363 1364 out: 1365 instrumentation_end(); 1366 irqentry_nmi_exit(regs, irq_state); 1367 1368 return; 1369 1370 fail: 1371 if (user_mode(regs)) { 1372 /* 1373 * Do not kill the machine if user-space triggered the 1374 * exception. Send SIGBUS instead and let user-space deal with 1375 * it. 1376 */ 1377 force_sig_fault(SIGBUS, BUS_OBJERR, (void __user *)0); 1378 } else { 1379 pr_emerg("PANIC: Unhandled #VC exception in kernel space (result=%d)\n", 1380 result); 1381 1382 /* Show some debug info */ 1383 show_regs(regs); 1384 1385 /* Ask hypervisor to sev_es_terminate */ 1386 sev_es_terminate(GHCB_SEV_ES_REASON_GENERAL_REQUEST); 1387 1388 /* If that fails and we get here - just panic */ 1389 panic("Returned from Terminate-Request to Hypervisor\n"); 1390 } 1391 1392 goto out; 1393 } 1394 1395 /* This handler runs on the #VC fall-back stack. It can cause further #VC exceptions */ 1396 DEFINE_IDTENTRY_VC_IST(exc_vmm_communication) 1397 { 1398 instrumentation_begin(); 1399 panic("Can't handle #VC exception from unsupported context\n"); 1400 instrumentation_end(); 1401 } 1402 1403 DEFINE_IDTENTRY_VC(exc_vmm_communication) 1404 { 1405 if (likely(!on_vc_fallback_stack(regs))) 1406 safe_stack_exc_vmm_communication(regs, error_code); 1407 else 1408 ist_exc_vmm_communication(regs, error_code); 1409 } 1410 1411 bool __init handle_vc_boot_ghcb(struct pt_regs *regs) 1412 { 1413 unsigned long exit_code = regs->orig_ax; 1414 struct es_em_ctxt ctxt; 1415 enum es_result result; 1416 1417 /* Do initial setup or terminate the guest */ 1418 if (unlikely(boot_ghcb == NULL && !sev_es_setup_ghcb())) 1419 sev_es_terminate(GHCB_SEV_ES_REASON_GENERAL_REQUEST); 1420 1421 vc_ghcb_invalidate(boot_ghcb); 1422 1423 result = vc_init_em_ctxt(&ctxt, regs, exit_code); 1424 if (result == ES_OK) 1425 result = vc_handle_exitcode(&ctxt, boot_ghcb, exit_code); 1426 1427 /* Done - now check the result */ 1428 switch (result) { 1429 case ES_OK: 1430 vc_finish_insn(&ctxt); 1431 break; 1432 case ES_UNSUPPORTED: 1433 early_printk("PANIC: Unsupported exit-code 0x%02lx in early #VC exception (IP: 0x%lx)\n", 1434 exit_code, regs->ip); 1435 goto fail; 1436 case ES_VMM_ERROR: 1437 early_printk("PANIC: Failure in communication with VMM (exit-code 0x%02lx IP: 0x%lx)\n", 1438 exit_code, regs->ip); 1439 goto fail; 1440 case ES_DECODE_FAILED: 1441 early_printk("PANIC: Failed to decode instruction (exit-code 0x%02lx IP: 0x%lx)\n", 1442 exit_code, regs->ip); 1443 goto fail; 1444 case ES_EXCEPTION: 1445 vc_early_forward_exception(&ctxt); 1446 break; 1447 case ES_RETRY: 1448 /* Nothing to do */ 1449 break; 1450 default: 1451 BUG(); 1452 } 1453 1454 return true; 1455 1456 fail: 1457 show_regs(regs); 1458 1459 while (true) 1460 halt(); 1461 } 1462