1 #include <linux/module.h> 2 #include <linux/reboot.h> 3 #include <linux/init.h> 4 #include <linux/pm.h> 5 #include <linux/efi.h> 6 #include <linux/dmi.h> 7 #include <linux/sched.h> 8 #include <linux/tboot.h> 9 #include <acpi/reboot.h> 10 #include <asm/io.h> 11 #include <asm/apic.h> 12 #include <asm/desc.h> 13 #include <asm/hpet.h> 14 #include <asm/pgtable.h> 15 #include <asm/proto.h> 16 #include <asm/reboot_fixups.h> 17 #include <asm/reboot.h> 18 #include <asm/pci_x86.h> 19 #include <asm/virtext.h> 20 #include <asm/cpu.h> 21 22 #ifdef CONFIG_X86_32 23 # include <linux/ctype.h> 24 # include <linux/mc146818rtc.h> 25 #else 26 # include <asm/x86_init.h> 27 #endif 28 29 /* 30 * Power off function, if any 31 */ 32 void (*pm_power_off)(void); 33 EXPORT_SYMBOL(pm_power_off); 34 35 static const struct desc_ptr no_idt = {}; 36 static int reboot_mode; 37 enum reboot_type reboot_type = BOOT_KBD; 38 int reboot_force; 39 40 #if defined(CONFIG_X86_32) && defined(CONFIG_SMP) 41 static int reboot_cpu = -1; 42 #endif 43 44 /* This is set if we need to go through the 'emergency' path. 45 * When machine_emergency_restart() is called, we may be on 46 * an inconsistent state and won't be able to do a clean cleanup 47 */ 48 static int reboot_emergency; 49 50 /* This is set by the PCI code if either type 1 or type 2 PCI is detected */ 51 bool port_cf9_safe = false; 52 53 /* reboot=b[ios] | s[mp] | t[riple] | k[bd] | e[fi] [, [w]arm | [c]old] | p[ci] 54 warm Don't set the cold reboot flag 55 cold Set the cold reboot flag 56 bios Reboot by jumping through the BIOS (only for X86_32) 57 smp Reboot by executing reset on BSP or other CPU (only for X86_32) 58 triple Force a triple fault (init) 59 kbd Use the keyboard controller. cold reset (default) 60 acpi Use the RESET_REG in the FADT 61 efi Use efi reset_system runtime service 62 pci Use the so-called "PCI reset register", CF9 63 force Avoid anything that could hang. 64 */ 65 static int __init reboot_setup(char *str) 66 { 67 for (;;) { 68 switch (*str) { 69 case 'w': 70 reboot_mode = 0x1234; 71 break; 72 73 case 'c': 74 reboot_mode = 0; 75 break; 76 77 #ifdef CONFIG_X86_32 78 #ifdef CONFIG_SMP 79 case 's': 80 if (isdigit(*(str+1))) { 81 reboot_cpu = (int) (*(str+1) - '0'); 82 if (isdigit(*(str+2))) 83 reboot_cpu = reboot_cpu*10 + (int)(*(str+2) - '0'); 84 } 85 /* we will leave sorting out the final value 86 when we are ready to reboot, since we might not 87 have set up boot_cpu_id or smp_num_cpu */ 88 break; 89 #endif /* CONFIG_SMP */ 90 91 case 'b': 92 #endif 93 case 'a': 94 case 'k': 95 case 't': 96 case 'e': 97 case 'p': 98 reboot_type = *str; 99 break; 100 101 case 'f': 102 reboot_force = 1; 103 break; 104 } 105 106 str = strchr(str, ','); 107 if (str) 108 str++; 109 else 110 break; 111 } 112 return 1; 113 } 114 115 __setup("reboot=", reboot_setup); 116 117 118 #ifdef CONFIG_X86_32 119 /* 120 * Reboot options and system auto-detection code provided by 121 * Dell Inc. so their systems "just work". :-) 122 */ 123 124 /* 125 * Some machines require the "reboot=b" commandline option, 126 * this quirk makes that automatic. 127 */ 128 static int __init set_bios_reboot(const struct dmi_system_id *d) 129 { 130 if (reboot_type != BOOT_BIOS) { 131 reboot_type = BOOT_BIOS; 132 printk(KERN_INFO "%s series board detected. Selecting BIOS-method for reboots.\n", d->ident); 133 } 134 return 0; 135 } 136 137 static struct dmi_system_id __initdata reboot_dmi_table[] = { 138 { /* Handle problems with rebooting on Dell E520's */ 139 .callback = set_bios_reboot, 140 .ident = "Dell E520", 141 .matches = { 142 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 143 DMI_MATCH(DMI_PRODUCT_NAME, "Dell DM061"), 144 }, 145 }, 146 { /* Handle problems with rebooting on Dell 1300's */ 147 .callback = set_bios_reboot, 148 .ident = "Dell PowerEdge 1300", 149 .matches = { 150 DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"), 151 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1300/"), 152 }, 153 }, 154 { /* Handle problems with rebooting on Dell 300's */ 155 .callback = set_bios_reboot, 156 .ident = "Dell PowerEdge 300", 157 .matches = { 158 DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"), 159 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 300/"), 160 }, 161 }, 162 { /* Handle problems with rebooting on Dell Optiplex 745's SFF*/ 163 .callback = set_bios_reboot, 164 .ident = "Dell OptiPlex 745", 165 .matches = { 166 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 167 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 745"), 168 }, 169 }, 170 { /* Handle problems with rebooting on Dell Optiplex 745's DFF*/ 171 .callback = set_bios_reboot, 172 .ident = "Dell OptiPlex 745", 173 .matches = { 174 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 175 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 745"), 176 DMI_MATCH(DMI_BOARD_NAME, "0MM599"), 177 }, 178 }, 179 { /* Handle problems with rebooting on Dell Optiplex 745 with 0KW626 */ 180 .callback = set_bios_reboot, 181 .ident = "Dell OptiPlex 745", 182 .matches = { 183 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 184 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 745"), 185 DMI_MATCH(DMI_BOARD_NAME, "0KW626"), 186 }, 187 }, 188 { /* Handle problems with rebooting on Dell Optiplex 330 with 0KP561 */ 189 .callback = set_bios_reboot, 190 .ident = "Dell OptiPlex 330", 191 .matches = { 192 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 193 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 330"), 194 DMI_MATCH(DMI_BOARD_NAME, "0KP561"), 195 }, 196 }, 197 { /* Handle problems with rebooting on Dell Optiplex 360 with 0T656F */ 198 .callback = set_bios_reboot, 199 .ident = "Dell OptiPlex 360", 200 .matches = { 201 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 202 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 360"), 203 DMI_MATCH(DMI_BOARD_NAME, "0T656F"), 204 }, 205 }, 206 { /* Handle problems with rebooting on Dell 2400's */ 207 .callback = set_bios_reboot, 208 .ident = "Dell PowerEdge 2400", 209 .matches = { 210 DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"), 211 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2400"), 212 }, 213 }, 214 { /* Handle problems with rebooting on Dell T5400's */ 215 .callback = set_bios_reboot, 216 .ident = "Dell Precision T5400", 217 .matches = { 218 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 219 DMI_MATCH(DMI_PRODUCT_NAME, "Precision WorkStation T5400"), 220 }, 221 }, 222 { /* Handle problems with rebooting on HP laptops */ 223 .callback = set_bios_reboot, 224 .ident = "HP Compaq Laptop", 225 .matches = { 226 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), 227 DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq"), 228 }, 229 }, 230 { /* Handle problems with rebooting on Dell XPS710 */ 231 .callback = set_bios_reboot, 232 .ident = "Dell XPS710", 233 .matches = { 234 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 235 DMI_MATCH(DMI_PRODUCT_NAME, "Dell XPS710"), 236 }, 237 }, 238 { /* Handle problems with rebooting on Dell DXP061 */ 239 .callback = set_bios_reboot, 240 .ident = "Dell DXP061", 241 .matches = { 242 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 243 DMI_MATCH(DMI_PRODUCT_NAME, "Dell DXP061"), 244 }, 245 }, 246 { /* Handle problems with rebooting on Sony VGN-Z540N */ 247 .callback = set_bios_reboot, 248 .ident = "Sony VGN-Z540N", 249 .matches = { 250 DMI_MATCH(DMI_SYS_VENDOR, "Sony Corporation"), 251 DMI_MATCH(DMI_PRODUCT_NAME, "VGN-Z540N"), 252 }, 253 }, 254 { /* Handle problems with rebooting on CompuLab SBC-FITPC2 */ 255 .callback = set_bios_reboot, 256 .ident = "CompuLab SBC-FITPC2", 257 .matches = { 258 DMI_MATCH(DMI_SYS_VENDOR, "CompuLab"), 259 DMI_MATCH(DMI_PRODUCT_NAME, "SBC-FITPC2"), 260 }, 261 }, 262 { /* Handle problems with rebooting on ASUS P4S800 */ 263 .callback = set_bios_reboot, 264 .ident = "ASUS P4S800", 265 .matches = { 266 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), 267 DMI_MATCH(DMI_BOARD_NAME, "P4S800"), 268 }, 269 }, 270 { } 271 }; 272 273 static int __init reboot_init(void) 274 { 275 dmi_check_system(reboot_dmi_table); 276 return 0; 277 } 278 core_initcall(reboot_init); 279 280 /* The following code and data reboots the machine by switching to real 281 mode and jumping to the BIOS reset entry point, as if the CPU has 282 really been reset. The previous version asked the keyboard 283 controller to pulse the CPU reset line, which is more thorough, but 284 doesn't work with at least one type of 486 motherboard. It is easy 285 to stop this code working; hence the copious comments. */ 286 static const unsigned long long 287 real_mode_gdt_entries [3] = 288 { 289 0x0000000000000000ULL, /* Null descriptor */ 290 0x00009b000000ffffULL, /* 16-bit real-mode 64k code at 0x00000000 */ 291 0x000093000100ffffULL /* 16-bit real-mode 64k data at 0x00000100 */ 292 }; 293 294 static const struct desc_ptr 295 real_mode_gdt = { sizeof (real_mode_gdt_entries) - 1, (long)real_mode_gdt_entries }, 296 real_mode_idt = { 0x3ff, 0 }; 297 298 /* This is 16-bit protected mode code to disable paging and the cache, 299 switch to real mode and jump to the BIOS reset code. 300 301 The instruction that switches to real mode by writing to CR0 must be 302 followed immediately by a far jump instruction, which set CS to a 303 valid value for real mode, and flushes the prefetch queue to avoid 304 running instructions that have already been decoded in protected 305 mode. 306 307 Clears all the flags except ET, especially PG (paging), PE 308 (protected-mode enable) and TS (task switch for coprocessor state 309 save). Flushes the TLB after paging has been disabled. Sets CD and 310 NW, to disable the cache on a 486, and invalidates the cache. This 311 is more like the state of a 486 after reset. I don't know if 312 something else should be done for other chips. 313 314 More could be done here to set up the registers as if a CPU reset had 315 occurred; hopefully real BIOSs don't assume much. */ 316 static const unsigned char real_mode_switch [] = 317 { 318 0x66, 0x0f, 0x20, 0xc0, /* movl %cr0,%eax */ 319 0x66, 0x83, 0xe0, 0x11, /* andl $0x00000011,%eax */ 320 0x66, 0x0d, 0x00, 0x00, 0x00, 0x60, /* orl $0x60000000,%eax */ 321 0x66, 0x0f, 0x22, 0xc0, /* movl %eax,%cr0 */ 322 0x66, 0x0f, 0x22, 0xd8, /* movl %eax,%cr3 */ 323 0x66, 0x0f, 0x20, 0xc3, /* movl %cr0,%ebx */ 324 0x66, 0x81, 0xe3, 0x00, 0x00, 0x00, 0x60, /* andl $0x60000000,%ebx */ 325 0x74, 0x02, /* jz f */ 326 0x0f, 0x09, /* wbinvd */ 327 0x24, 0x10, /* f: andb $0x10,al */ 328 0x66, 0x0f, 0x22, 0xc0 /* movl %eax,%cr0 */ 329 }; 330 static const unsigned char jump_to_bios [] = 331 { 332 0xea, 0x00, 0x00, 0xff, 0xff /* ljmp $0xffff,$0x0000 */ 333 }; 334 335 /* 336 * Switch to real mode and then execute the code 337 * specified by the code and length parameters. 338 * We assume that length will aways be less that 100! 339 */ 340 void machine_real_restart(const unsigned char *code, int length) 341 { 342 local_irq_disable(); 343 344 /* Write zero to CMOS register number 0x0f, which the BIOS POST 345 routine will recognize as telling it to do a proper reboot. (Well 346 that's what this book in front of me says -- it may only apply to 347 the Phoenix BIOS though, it's not clear). At the same time, 348 disable NMIs by setting the top bit in the CMOS address register, 349 as we're about to do peculiar things to the CPU. I'm not sure if 350 `outb_p' is needed instead of just `outb'. Use it to be on the 351 safe side. (Yes, CMOS_WRITE does outb_p's. - Paul G.) 352 */ 353 spin_lock(&rtc_lock); 354 CMOS_WRITE(0x00, 0x8f); 355 spin_unlock(&rtc_lock); 356 357 /* Remap the kernel at virtual address zero, as well as offset zero 358 from the kernel segment. This assumes the kernel segment starts at 359 virtual address PAGE_OFFSET. */ 360 memcpy(swapper_pg_dir, swapper_pg_dir + KERNEL_PGD_BOUNDARY, 361 sizeof(swapper_pg_dir [0]) * KERNEL_PGD_PTRS); 362 363 /* 364 * Use `swapper_pg_dir' as our page directory. 365 */ 366 load_cr3(swapper_pg_dir); 367 368 /* Write 0x1234 to absolute memory location 0x472. The BIOS reads 369 this on booting to tell it to "Bypass memory test (also warm 370 boot)". This seems like a fairly standard thing that gets set by 371 REBOOT.COM programs, and the previous reset routine did this 372 too. */ 373 *((unsigned short *)0x472) = reboot_mode; 374 375 /* For the switch to real mode, copy some code to low memory. It has 376 to be in the first 64k because it is running in 16-bit mode, and it 377 has to have the same physical and virtual address, because it turns 378 off paging. Copy it near the end of the first page, out of the way 379 of BIOS variables. */ 380 memcpy((void *)(0x1000 - sizeof(real_mode_switch) - 100), 381 real_mode_switch, sizeof (real_mode_switch)); 382 memcpy((void *)(0x1000 - 100), code, length); 383 384 /* Set up the IDT for real mode. */ 385 load_idt(&real_mode_idt); 386 387 /* Set up a GDT from which we can load segment descriptors for real 388 mode. The GDT is not used in real mode; it is just needed here to 389 prepare the descriptors. */ 390 load_gdt(&real_mode_gdt); 391 392 /* Load the data segment registers, and thus the descriptors ready for 393 real mode. The base address of each segment is 0x100, 16 times the 394 selector value being loaded here. This is so that the segment 395 registers don't have to be reloaded after switching to real mode: 396 the values are consistent for real mode operation already. */ 397 __asm__ __volatile__ ("movl $0x0010,%%eax\n" 398 "\tmovl %%eax,%%ds\n" 399 "\tmovl %%eax,%%es\n" 400 "\tmovl %%eax,%%fs\n" 401 "\tmovl %%eax,%%gs\n" 402 "\tmovl %%eax,%%ss" : : : "eax"); 403 404 /* Jump to the 16-bit code that we copied earlier. It disables paging 405 and the cache, switches to real mode, and jumps to the BIOS reset 406 entry point. */ 407 __asm__ __volatile__ ("ljmp $0x0008,%0" 408 : 409 : "i" ((void *)(0x1000 - sizeof (real_mode_switch) - 100))); 410 } 411 #ifdef CONFIG_APM_MODULE 412 EXPORT_SYMBOL(machine_real_restart); 413 #endif 414 415 #endif /* CONFIG_X86_32 */ 416 417 /* 418 * Some Apple MacBook and MacBookPro's needs reboot=p to be able to reboot 419 */ 420 static int __init set_pci_reboot(const struct dmi_system_id *d) 421 { 422 if (reboot_type != BOOT_CF9) { 423 reboot_type = BOOT_CF9; 424 printk(KERN_INFO "%s series board detected. " 425 "Selecting PCI-method for reboots.\n", d->ident); 426 } 427 return 0; 428 } 429 430 static struct dmi_system_id __initdata pci_reboot_dmi_table[] = { 431 { /* Handle problems with rebooting on Apple MacBook5 */ 432 .callback = set_pci_reboot, 433 .ident = "Apple MacBook5", 434 .matches = { 435 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), 436 DMI_MATCH(DMI_PRODUCT_NAME, "MacBook5"), 437 }, 438 }, 439 { /* Handle problems with rebooting on Apple MacBookPro5 */ 440 .callback = set_pci_reboot, 441 .ident = "Apple MacBookPro5", 442 .matches = { 443 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), 444 DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro5"), 445 }, 446 }, 447 { /* Handle problems with rebooting on Apple Macmini3,1 */ 448 .callback = set_pci_reboot, 449 .ident = "Apple Macmini3,1", 450 .matches = { 451 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), 452 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini3,1"), 453 }, 454 }, 455 { } 456 }; 457 458 static int __init pci_reboot_init(void) 459 { 460 dmi_check_system(pci_reboot_dmi_table); 461 return 0; 462 } 463 core_initcall(pci_reboot_init); 464 465 static inline void kb_wait(void) 466 { 467 int i; 468 469 for (i = 0; i < 0x10000; i++) { 470 if ((inb(0x64) & 0x02) == 0) 471 break; 472 udelay(2); 473 } 474 } 475 476 static void vmxoff_nmi(int cpu, struct die_args *args) 477 { 478 cpu_emergency_vmxoff(); 479 } 480 481 /* Use NMIs as IPIs to tell all CPUs to disable virtualization 482 */ 483 static void emergency_vmx_disable_all(void) 484 { 485 /* Just make sure we won't change CPUs while doing this */ 486 local_irq_disable(); 487 488 /* We need to disable VMX on all CPUs before rebooting, otherwise 489 * we risk hanging up the machine, because the CPU ignore INIT 490 * signals when VMX is enabled. 491 * 492 * We can't take any locks and we may be on an inconsistent 493 * state, so we use NMIs as IPIs to tell the other CPUs to disable 494 * VMX and halt. 495 * 496 * For safety, we will avoid running the nmi_shootdown_cpus() 497 * stuff unnecessarily, but we don't have a way to check 498 * if other CPUs have VMX enabled. So we will call it only if the 499 * CPU we are running on has VMX enabled. 500 * 501 * We will miss cases where VMX is not enabled on all CPUs. This 502 * shouldn't do much harm because KVM always enable VMX on all 503 * CPUs anyway. But we can miss it on the small window where KVM 504 * is still enabling VMX. 505 */ 506 if (cpu_has_vmx() && cpu_vmx_enabled()) { 507 /* Disable VMX on this CPU. 508 */ 509 cpu_vmxoff(); 510 511 /* Halt and disable VMX on the other CPUs */ 512 nmi_shootdown_cpus(vmxoff_nmi); 513 514 } 515 } 516 517 518 void __attribute__((weak)) mach_reboot_fixups(void) 519 { 520 } 521 522 static void native_machine_emergency_restart(void) 523 { 524 int i; 525 526 if (reboot_emergency) 527 emergency_vmx_disable_all(); 528 529 tboot_shutdown(TB_SHUTDOWN_REBOOT); 530 531 /* Tell the BIOS if we want cold or warm reboot */ 532 *((unsigned short *)__va(0x472)) = reboot_mode; 533 534 for (;;) { 535 /* Could also try the reset bit in the Hammer NB */ 536 switch (reboot_type) { 537 case BOOT_KBD: 538 mach_reboot_fixups(); /* for board specific fixups */ 539 540 for (i = 0; i < 10; i++) { 541 kb_wait(); 542 udelay(50); 543 outb(0xfe, 0x64); /* pulse reset low */ 544 udelay(50); 545 } 546 547 case BOOT_TRIPLE: 548 load_idt(&no_idt); 549 __asm__ __volatile__("int3"); 550 551 reboot_type = BOOT_KBD; 552 break; 553 554 #ifdef CONFIG_X86_32 555 case BOOT_BIOS: 556 machine_real_restart(jump_to_bios, sizeof(jump_to_bios)); 557 558 reboot_type = BOOT_KBD; 559 break; 560 #endif 561 562 case BOOT_ACPI: 563 acpi_reboot(); 564 reboot_type = BOOT_KBD; 565 break; 566 567 case BOOT_EFI: 568 if (efi_enabled) 569 efi.reset_system(reboot_mode ? 570 EFI_RESET_WARM : 571 EFI_RESET_COLD, 572 EFI_SUCCESS, 0, NULL); 573 reboot_type = BOOT_KBD; 574 break; 575 576 case BOOT_CF9: 577 port_cf9_safe = true; 578 /* fall through */ 579 580 case BOOT_CF9_COND: 581 if (port_cf9_safe) { 582 u8 cf9 = inb(0xcf9) & ~6; 583 outb(cf9|2, 0xcf9); /* Request hard reset */ 584 udelay(50); 585 outb(cf9|6, 0xcf9); /* Actually do the reset */ 586 udelay(50); 587 } 588 reboot_type = BOOT_KBD; 589 break; 590 } 591 } 592 } 593 594 void native_machine_shutdown(void) 595 { 596 /* Stop the cpus and apics */ 597 #ifdef CONFIG_SMP 598 599 /* The boot cpu is always logical cpu 0 */ 600 int reboot_cpu_id = 0; 601 602 #ifdef CONFIG_X86_32 603 /* See if there has been given a command line override */ 604 if ((reboot_cpu != -1) && (reboot_cpu < nr_cpu_ids) && 605 cpu_online(reboot_cpu)) 606 reboot_cpu_id = reboot_cpu; 607 #endif 608 609 /* Make certain the cpu I'm about to reboot on is online */ 610 if (!cpu_online(reboot_cpu_id)) 611 reboot_cpu_id = smp_processor_id(); 612 613 /* Make certain I only run on the appropriate processor */ 614 set_cpus_allowed_ptr(current, cpumask_of(reboot_cpu_id)); 615 616 /* O.K Now that I'm on the appropriate processor, 617 * stop all of the others. 618 */ 619 smp_send_stop(); 620 #endif 621 622 lapic_shutdown(); 623 624 #ifdef CONFIG_X86_IO_APIC 625 disable_IO_APIC(); 626 #endif 627 628 #ifdef CONFIG_HPET_TIMER 629 hpet_disable(); 630 #endif 631 632 #ifdef CONFIG_X86_64 633 x86_platform.iommu_shutdown(); 634 #endif 635 } 636 637 static void __machine_emergency_restart(int emergency) 638 { 639 reboot_emergency = emergency; 640 machine_ops.emergency_restart(); 641 } 642 643 static void native_machine_restart(char *__unused) 644 { 645 printk("machine restart\n"); 646 647 if (!reboot_force) 648 machine_shutdown(); 649 __machine_emergency_restart(0); 650 } 651 652 static void native_machine_halt(void) 653 { 654 /* stop other cpus and apics */ 655 machine_shutdown(); 656 657 tboot_shutdown(TB_SHUTDOWN_HALT); 658 659 /* stop this cpu */ 660 stop_this_cpu(NULL); 661 } 662 663 static void native_machine_power_off(void) 664 { 665 if (pm_power_off) { 666 if (!reboot_force) 667 machine_shutdown(); 668 pm_power_off(); 669 } 670 /* a fallback in case there is no PM info available */ 671 tboot_shutdown(TB_SHUTDOWN_HALT); 672 } 673 674 struct machine_ops machine_ops = { 675 .power_off = native_machine_power_off, 676 .shutdown = native_machine_shutdown, 677 .emergency_restart = native_machine_emergency_restart, 678 .restart = native_machine_restart, 679 .halt = native_machine_halt, 680 #ifdef CONFIG_KEXEC 681 .crash_shutdown = native_machine_crash_shutdown, 682 #endif 683 }; 684 685 void machine_power_off(void) 686 { 687 machine_ops.power_off(); 688 } 689 690 void machine_shutdown(void) 691 { 692 machine_ops.shutdown(); 693 } 694 695 void machine_emergency_restart(void) 696 { 697 __machine_emergency_restart(1); 698 } 699 700 void machine_restart(char *cmd) 701 { 702 machine_ops.restart(cmd); 703 } 704 705 void machine_halt(void) 706 { 707 machine_ops.halt(); 708 } 709 710 #ifdef CONFIG_KEXEC 711 void machine_crash_shutdown(struct pt_regs *regs) 712 { 713 machine_ops.crash_shutdown(regs); 714 } 715 #endif 716 717 718 #if defined(CONFIG_SMP) 719 720 /* This keeps a track of which one is crashing cpu. */ 721 static int crashing_cpu; 722 static nmi_shootdown_cb shootdown_callback; 723 724 static atomic_t waiting_for_crash_ipi; 725 726 static int crash_nmi_callback(struct notifier_block *self, 727 unsigned long val, void *data) 728 { 729 int cpu; 730 731 if (val != DIE_NMI_IPI) 732 return NOTIFY_OK; 733 734 cpu = raw_smp_processor_id(); 735 736 /* Don't do anything if this handler is invoked on crashing cpu. 737 * Otherwise, system will completely hang. Crashing cpu can get 738 * an NMI if system was initially booted with nmi_watchdog parameter. 739 */ 740 if (cpu == crashing_cpu) 741 return NOTIFY_STOP; 742 local_irq_disable(); 743 744 shootdown_callback(cpu, (struct die_args *)data); 745 746 atomic_dec(&waiting_for_crash_ipi); 747 /* Assume hlt works */ 748 halt(); 749 for (;;) 750 cpu_relax(); 751 752 return 1; 753 } 754 755 static void smp_send_nmi_allbutself(void) 756 { 757 apic->send_IPI_allbutself(NMI_VECTOR); 758 } 759 760 static struct notifier_block crash_nmi_nb = { 761 .notifier_call = crash_nmi_callback, 762 }; 763 764 /* Halt all other CPUs, calling the specified function on each of them 765 * 766 * This function can be used to halt all other CPUs on crash 767 * or emergency reboot time. The function passed as parameter 768 * will be called inside a NMI handler on all CPUs. 769 */ 770 void nmi_shootdown_cpus(nmi_shootdown_cb callback) 771 { 772 unsigned long msecs; 773 local_irq_disable(); 774 775 /* Make a note of crashing cpu. Will be used in NMI callback.*/ 776 crashing_cpu = safe_smp_processor_id(); 777 778 shootdown_callback = callback; 779 780 atomic_set(&waiting_for_crash_ipi, num_online_cpus() - 1); 781 /* Would it be better to replace the trap vector here? */ 782 if (register_die_notifier(&crash_nmi_nb)) 783 return; /* return what? */ 784 /* Ensure the new callback function is set before sending 785 * out the NMI 786 */ 787 wmb(); 788 789 smp_send_nmi_allbutself(); 790 791 msecs = 1000; /* Wait at most a second for the other cpus to stop */ 792 while ((atomic_read(&waiting_for_crash_ipi) > 0) && msecs) { 793 mdelay(1); 794 msecs--; 795 } 796 797 /* Leave the nmi callback set */ 798 } 799 #else /* !CONFIG_SMP */ 800 void nmi_shootdown_cpus(nmi_shootdown_cb callback) 801 { 802 /* No other CPUs to shoot down */ 803 } 804 #endif 805