1 #include <linux/module.h> 2 #include <linux/reboot.h> 3 #include <linux/init.h> 4 #include <linux/pm.h> 5 #include <linux/efi.h> 6 #include <linux/dmi.h> 7 #include <linux/sched.h> 8 #include <linux/tboot.h> 9 #include <acpi/reboot.h> 10 #include <asm/io.h> 11 #include <asm/apic.h> 12 #include <asm/desc.h> 13 #include <asm/hpet.h> 14 #include <asm/pgtable.h> 15 #include <asm/proto.h> 16 #include <asm/reboot_fixups.h> 17 #include <asm/reboot.h> 18 #include <asm/pci_x86.h> 19 #include <asm/virtext.h> 20 #include <asm/cpu.h> 21 22 #ifdef CONFIG_X86_32 23 # include <linux/ctype.h> 24 # include <linux/mc146818rtc.h> 25 #else 26 # include <asm/x86_init.h> 27 #endif 28 29 /* 30 * Power off function, if any 31 */ 32 void (*pm_power_off)(void); 33 EXPORT_SYMBOL(pm_power_off); 34 35 static const struct desc_ptr no_idt = {}; 36 static int reboot_mode; 37 enum reboot_type reboot_type = BOOT_KBD; 38 int reboot_force; 39 40 #if defined(CONFIG_X86_32) && defined(CONFIG_SMP) 41 static int reboot_cpu = -1; 42 #endif 43 44 /* This is set if we need to go through the 'emergency' path. 45 * When machine_emergency_restart() is called, we may be on 46 * an inconsistent state and won't be able to do a clean cleanup 47 */ 48 static int reboot_emergency; 49 50 /* This is set by the PCI code if either type 1 or type 2 PCI is detected */ 51 bool port_cf9_safe = false; 52 53 /* reboot=b[ios] | s[mp] | t[riple] | k[bd] | e[fi] [, [w]arm | [c]old] | p[ci] 54 warm Don't set the cold reboot flag 55 cold Set the cold reboot flag 56 bios Reboot by jumping through the BIOS (only for X86_32) 57 smp Reboot by executing reset on BSP or other CPU (only for X86_32) 58 triple Force a triple fault (init) 59 kbd Use the keyboard controller. cold reset (default) 60 acpi Use the RESET_REG in the FADT 61 efi Use efi reset_system runtime service 62 pci Use the so-called "PCI reset register", CF9 63 force Avoid anything that could hang. 64 */ 65 static int __init reboot_setup(char *str) 66 { 67 for (;;) { 68 switch (*str) { 69 case 'w': 70 reboot_mode = 0x1234; 71 break; 72 73 case 'c': 74 reboot_mode = 0; 75 break; 76 77 #ifdef CONFIG_X86_32 78 #ifdef CONFIG_SMP 79 case 's': 80 if (isdigit(*(str+1))) { 81 reboot_cpu = (int) (*(str+1) - '0'); 82 if (isdigit(*(str+2))) 83 reboot_cpu = reboot_cpu*10 + (int)(*(str+2) - '0'); 84 } 85 /* we will leave sorting out the final value 86 when we are ready to reboot, since we might not 87 have set up boot_cpu_id or smp_num_cpu */ 88 break; 89 #endif /* CONFIG_SMP */ 90 91 case 'b': 92 #endif 93 case 'a': 94 case 'k': 95 case 't': 96 case 'e': 97 case 'p': 98 reboot_type = *str; 99 break; 100 101 case 'f': 102 reboot_force = 1; 103 break; 104 } 105 106 str = strchr(str, ','); 107 if (str) 108 str++; 109 else 110 break; 111 } 112 return 1; 113 } 114 115 __setup("reboot=", reboot_setup); 116 117 118 #ifdef CONFIG_X86_32 119 /* 120 * Reboot options and system auto-detection code provided by 121 * Dell Inc. so their systems "just work". :-) 122 */ 123 124 /* 125 * Some machines require the "reboot=b" commandline option, 126 * this quirk makes that automatic. 127 */ 128 static int __init set_bios_reboot(const struct dmi_system_id *d) 129 { 130 if (reboot_type != BOOT_BIOS) { 131 reboot_type = BOOT_BIOS; 132 printk(KERN_INFO "%s series board detected. Selecting BIOS-method for reboots.\n", d->ident); 133 } 134 return 0; 135 } 136 137 static struct dmi_system_id __initdata reboot_dmi_table[] = { 138 { /* Handle problems with rebooting on Dell E520's */ 139 .callback = set_bios_reboot, 140 .ident = "Dell E520", 141 .matches = { 142 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 143 DMI_MATCH(DMI_PRODUCT_NAME, "Dell DM061"), 144 }, 145 }, 146 { /* Handle problems with rebooting on Dell 1300's */ 147 .callback = set_bios_reboot, 148 .ident = "Dell PowerEdge 1300", 149 .matches = { 150 DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"), 151 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1300/"), 152 }, 153 }, 154 { /* Handle problems with rebooting on Dell 300's */ 155 .callback = set_bios_reboot, 156 .ident = "Dell PowerEdge 300", 157 .matches = { 158 DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"), 159 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 300/"), 160 }, 161 }, 162 { /* Handle problems with rebooting on Dell Optiplex 745's SFF*/ 163 .callback = set_bios_reboot, 164 .ident = "Dell OptiPlex 745", 165 .matches = { 166 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 167 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 745"), 168 }, 169 }, 170 { /* Handle problems with rebooting on Dell Optiplex 745's DFF*/ 171 .callback = set_bios_reboot, 172 .ident = "Dell OptiPlex 745", 173 .matches = { 174 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 175 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 745"), 176 DMI_MATCH(DMI_BOARD_NAME, "0MM599"), 177 }, 178 }, 179 { /* Handle problems with rebooting on Dell Optiplex 745 with 0KW626 */ 180 .callback = set_bios_reboot, 181 .ident = "Dell OptiPlex 745", 182 .matches = { 183 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 184 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 745"), 185 DMI_MATCH(DMI_BOARD_NAME, "0KW626"), 186 }, 187 }, 188 { /* Handle problems with rebooting on Dell Optiplex 330 with 0KP561 */ 189 .callback = set_bios_reboot, 190 .ident = "Dell OptiPlex 330", 191 .matches = { 192 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 193 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 330"), 194 DMI_MATCH(DMI_BOARD_NAME, "0KP561"), 195 }, 196 }, 197 { /* Handle problems with rebooting on Dell Optiplex 360 with 0T656F */ 198 .callback = set_bios_reboot, 199 .ident = "Dell OptiPlex 360", 200 .matches = { 201 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 202 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 360"), 203 DMI_MATCH(DMI_BOARD_NAME, "0T656F"), 204 }, 205 }, 206 { /* Handle problems with rebooting on Dell OptiPlex 760 with 0G919G*/ 207 .callback = set_bios_reboot, 208 .ident = "Dell OptiPlex 760", 209 .matches = { 210 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 211 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 760"), 212 DMI_MATCH(DMI_BOARD_NAME, "0G919G"), 213 }, 214 }, 215 { /* Handle problems with rebooting on Dell 2400's */ 216 .callback = set_bios_reboot, 217 .ident = "Dell PowerEdge 2400", 218 .matches = { 219 DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"), 220 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2400"), 221 }, 222 }, 223 { /* Handle problems with rebooting on Dell T5400's */ 224 .callback = set_bios_reboot, 225 .ident = "Dell Precision T5400", 226 .matches = { 227 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 228 DMI_MATCH(DMI_PRODUCT_NAME, "Precision WorkStation T5400"), 229 }, 230 }, 231 { /* Handle problems with rebooting on HP laptops */ 232 .callback = set_bios_reboot, 233 .ident = "HP Compaq Laptop", 234 .matches = { 235 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), 236 DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq"), 237 }, 238 }, 239 { /* Handle problems with rebooting on Dell XPS710 */ 240 .callback = set_bios_reboot, 241 .ident = "Dell XPS710", 242 .matches = { 243 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 244 DMI_MATCH(DMI_PRODUCT_NAME, "Dell XPS710"), 245 }, 246 }, 247 { /* Handle problems with rebooting on Dell DXP061 */ 248 .callback = set_bios_reboot, 249 .ident = "Dell DXP061", 250 .matches = { 251 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 252 DMI_MATCH(DMI_PRODUCT_NAME, "Dell DXP061"), 253 }, 254 }, 255 { /* Handle problems with rebooting on Sony VGN-Z540N */ 256 .callback = set_bios_reboot, 257 .ident = "Sony VGN-Z540N", 258 .matches = { 259 DMI_MATCH(DMI_SYS_VENDOR, "Sony Corporation"), 260 DMI_MATCH(DMI_PRODUCT_NAME, "VGN-Z540N"), 261 }, 262 }, 263 { /* Handle problems with rebooting on CompuLab SBC-FITPC2 */ 264 .callback = set_bios_reboot, 265 .ident = "CompuLab SBC-FITPC2", 266 .matches = { 267 DMI_MATCH(DMI_SYS_VENDOR, "CompuLab"), 268 DMI_MATCH(DMI_PRODUCT_NAME, "SBC-FITPC2"), 269 }, 270 }, 271 { /* Handle problems with rebooting on ASUS P4S800 */ 272 .callback = set_bios_reboot, 273 .ident = "ASUS P4S800", 274 .matches = { 275 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), 276 DMI_MATCH(DMI_BOARD_NAME, "P4S800"), 277 }, 278 }, 279 { } 280 }; 281 282 static int __init reboot_init(void) 283 { 284 dmi_check_system(reboot_dmi_table); 285 return 0; 286 } 287 core_initcall(reboot_init); 288 289 /* The following code and data reboots the machine by switching to real 290 mode and jumping to the BIOS reset entry point, as if the CPU has 291 really been reset. The previous version asked the keyboard 292 controller to pulse the CPU reset line, which is more thorough, but 293 doesn't work with at least one type of 486 motherboard. It is easy 294 to stop this code working; hence the copious comments. */ 295 static const unsigned long long 296 real_mode_gdt_entries [3] = 297 { 298 0x0000000000000000ULL, /* Null descriptor */ 299 0x00009b000000ffffULL, /* 16-bit real-mode 64k code at 0x00000000 */ 300 0x000093000100ffffULL /* 16-bit real-mode 64k data at 0x00000100 */ 301 }; 302 303 static const struct desc_ptr 304 real_mode_gdt = { sizeof (real_mode_gdt_entries) - 1, (long)real_mode_gdt_entries }, 305 real_mode_idt = { 0x3ff, 0 }; 306 307 /* This is 16-bit protected mode code to disable paging and the cache, 308 switch to real mode and jump to the BIOS reset code. 309 310 The instruction that switches to real mode by writing to CR0 must be 311 followed immediately by a far jump instruction, which set CS to a 312 valid value for real mode, and flushes the prefetch queue to avoid 313 running instructions that have already been decoded in protected 314 mode. 315 316 Clears all the flags except ET, especially PG (paging), PE 317 (protected-mode enable) and TS (task switch for coprocessor state 318 save). Flushes the TLB after paging has been disabled. Sets CD and 319 NW, to disable the cache on a 486, and invalidates the cache. This 320 is more like the state of a 486 after reset. I don't know if 321 something else should be done for other chips. 322 323 More could be done here to set up the registers as if a CPU reset had 324 occurred; hopefully real BIOSs don't assume much. */ 325 static const unsigned char real_mode_switch [] = 326 { 327 0x66, 0x0f, 0x20, 0xc0, /* movl %cr0,%eax */ 328 0x66, 0x83, 0xe0, 0x11, /* andl $0x00000011,%eax */ 329 0x66, 0x0d, 0x00, 0x00, 0x00, 0x60, /* orl $0x60000000,%eax */ 330 0x66, 0x0f, 0x22, 0xc0, /* movl %eax,%cr0 */ 331 0x66, 0x0f, 0x22, 0xd8, /* movl %eax,%cr3 */ 332 0x66, 0x0f, 0x20, 0xc3, /* movl %cr0,%ebx */ 333 0x66, 0x81, 0xe3, 0x00, 0x00, 0x00, 0x60, /* andl $0x60000000,%ebx */ 334 0x74, 0x02, /* jz f */ 335 0x0f, 0x09, /* wbinvd */ 336 0x24, 0x10, /* f: andb $0x10,al */ 337 0x66, 0x0f, 0x22, 0xc0 /* movl %eax,%cr0 */ 338 }; 339 static const unsigned char jump_to_bios [] = 340 { 341 0xea, 0x00, 0x00, 0xff, 0xff /* ljmp $0xffff,$0x0000 */ 342 }; 343 344 /* 345 * Switch to real mode and then execute the code 346 * specified by the code and length parameters. 347 * We assume that length will aways be less that 100! 348 */ 349 void machine_real_restart(const unsigned char *code, int length) 350 { 351 local_irq_disable(); 352 353 /* Write zero to CMOS register number 0x0f, which the BIOS POST 354 routine will recognize as telling it to do a proper reboot. (Well 355 that's what this book in front of me says -- it may only apply to 356 the Phoenix BIOS though, it's not clear). At the same time, 357 disable NMIs by setting the top bit in the CMOS address register, 358 as we're about to do peculiar things to the CPU. I'm not sure if 359 `outb_p' is needed instead of just `outb'. Use it to be on the 360 safe side. (Yes, CMOS_WRITE does outb_p's. - Paul G.) 361 */ 362 spin_lock(&rtc_lock); 363 CMOS_WRITE(0x00, 0x8f); 364 spin_unlock(&rtc_lock); 365 366 /* Remap the kernel at virtual address zero, as well as offset zero 367 from the kernel segment. This assumes the kernel segment starts at 368 virtual address PAGE_OFFSET. */ 369 memcpy(swapper_pg_dir, swapper_pg_dir + KERNEL_PGD_BOUNDARY, 370 sizeof(swapper_pg_dir [0]) * KERNEL_PGD_PTRS); 371 372 /* 373 * Use `swapper_pg_dir' as our page directory. 374 */ 375 load_cr3(swapper_pg_dir); 376 377 /* Write 0x1234 to absolute memory location 0x472. The BIOS reads 378 this on booting to tell it to "Bypass memory test (also warm 379 boot)". This seems like a fairly standard thing that gets set by 380 REBOOT.COM programs, and the previous reset routine did this 381 too. */ 382 *((unsigned short *)0x472) = reboot_mode; 383 384 /* For the switch to real mode, copy some code to low memory. It has 385 to be in the first 64k because it is running in 16-bit mode, and it 386 has to have the same physical and virtual address, because it turns 387 off paging. Copy it near the end of the first page, out of the way 388 of BIOS variables. */ 389 memcpy((void *)(0x1000 - sizeof(real_mode_switch) - 100), 390 real_mode_switch, sizeof (real_mode_switch)); 391 memcpy((void *)(0x1000 - 100), code, length); 392 393 /* Set up the IDT for real mode. */ 394 load_idt(&real_mode_idt); 395 396 /* Set up a GDT from which we can load segment descriptors for real 397 mode. The GDT is not used in real mode; it is just needed here to 398 prepare the descriptors. */ 399 load_gdt(&real_mode_gdt); 400 401 /* Load the data segment registers, and thus the descriptors ready for 402 real mode. The base address of each segment is 0x100, 16 times the 403 selector value being loaded here. This is so that the segment 404 registers don't have to be reloaded after switching to real mode: 405 the values are consistent for real mode operation already. */ 406 __asm__ __volatile__ ("movl $0x0010,%%eax\n" 407 "\tmovl %%eax,%%ds\n" 408 "\tmovl %%eax,%%es\n" 409 "\tmovl %%eax,%%fs\n" 410 "\tmovl %%eax,%%gs\n" 411 "\tmovl %%eax,%%ss" : : : "eax"); 412 413 /* Jump to the 16-bit code that we copied earlier. It disables paging 414 and the cache, switches to real mode, and jumps to the BIOS reset 415 entry point. */ 416 __asm__ __volatile__ ("ljmp $0x0008,%0" 417 : 418 : "i" ((void *)(0x1000 - sizeof (real_mode_switch) - 100))); 419 } 420 #ifdef CONFIG_APM_MODULE 421 EXPORT_SYMBOL(machine_real_restart); 422 #endif 423 424 #endif /* CONFIG_X86_32 */ 425 426 /* 427 * Some Apple MacBook and MacBookPro's needs reboot=p to be able to reboot 428 */ 429 static int __init set_pci_reboot(const struct dmi_system_id *d) 430 { 431 if (reboot_type != BOOT_CF9) { 432 reboot_type = BOOT_CF9; 433 printk(KERN_INFO "%s series board detected. " 434 "Selecting PCI-method for reboots.\n", d->ident); 435 } 436 return 0; 437 } 438 439 static struct dmi_system_id __initdata pci_reboot_dmi_table[] = { 440 { /* Handle problems with rebooting on Apple MacBook5 */ 441 .callback = set_pci_reboot, 442 .ident = "Apple MacBook5", 443 .matches = { 444 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), 445 DMI_MATCH(DMI_PRODUCT_NAME, "MacBook5"), 446 }, 447 }, 448 { /* Handle problems with rebooting on Apple MacBookPro5 */ 449 .callback = set_pci_reboot, 450 .ident = "Apple MacBookPro5", 451 .matches = { 452 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), 453 DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro5"), 454 }, 455 }, 456 { /* Handle problems with rebooting on Apple Macmini3,1 */ 457 .callback = set_pci_reboot, 458 .ident = "Apple Macmini3,1", 459 .matches = { 460 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), 461 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini3,1"), 462 }, 463 }, 464 { /* Handle problems with rebooting on the iMac9,1. */ 465 .callback = set_pci_reboot, 466 .ident = "Apple iMac9,1", 467 .matches = { 468 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), 469 DMI_MATCH(DMI_PRODUCT_NAME, "iMac9,1"), 470 }, 471 }, 472 { } 473 }; 474 475 static int __init pci_reboot_init(void) 476 { 477 dmi_check_system(pci_reboot_dmi_table); 478 return 0; 479 } 480 core_initcall(pci_reboot_init); 481 482 static inline void kb_wait(void) 483 { 484 int i; 485 486 for (i = 0; i < 0x10000; i++) { 487 if ((inb(0x64) & 0x02) == 0) 488 break; 489 udelay(2); 490 } 491 } 492 493 static void vmxoff_nmi(int cpu, struct die_args *args) 494 { 495 cpu_emergency_vmxoff(); 496 } 497 498 /* Use NMIs as IPIs to tell all CPUs to disable virtualization 499 */ 500 static void emergency_vmx_disable_all(void) 501 { 502 /* Just make sure we won't change CPUs while doing this */ 503 local_irq_disable(); 504 505 /* We need to disable VMX on all CPUs before rebooting, otherwise 506 * we risk hanging up the machine, because the CPU ignore INIT 507 * signals when VMX is enabled. 508 * 509 * We can't take any locks and we may be on an inconsistent 510 * state, so we use NMIs as IPIs to tell the other CPUs to disable 511 * VMX and halt. 512 * 513 * For safety, we will avoid running the nmi_shootdown_cpus() 514 * stuff unnecessarily, but we don't have a way to check 515 * if other CPUs have VMX enabled. So we will call it only if the 516 * CPU we are running on has VMX enabled. 517 * 518 * We will miss cases where VMX is not enabled on all CPUs. This 519 * shouldn't do much harm because KVM always enable VMX on all 520 * CPUs anyway. But we can miss it on the small window where KVM 521 * is still enabling VMX. 522 */ 523 if (cpu_has_vmx() && cpu_vmx_enabled()) { 524 /* Disable VMX on this CPU. 525 */ 526 cpu_vmxoff(); 527 528 /* Halt and disable VMX on the other CPUs */ 529 nmi_shootdown_cpus(vmxoff_nmi); 530 531 } 532 } 533 534 535 void __attribute__((weak)) mach_reboot_fixups(void) 536 { 537 } 538 539 static void native_machine_emergency_restart(void) 540 { 541 int i; 542 543 if (reboot_emergency) 544 emergency_vmx_disable_all(); 545 546 tboot_shutdown(TB_SHUTDOWN_REBOOT); 547 548 /* Tell the BIOS if we want cold or warm reboot */ 549 *((unsigned short *)__va(0x472)) = reboot_mode; 550 551 for (;;) { 552 /* Could also try the reset bit in the Hammer NB */ 553 switch (reboot_type) { 554 case BOOT_KBD: 555 mach_reboot_fixups(); /* for board specific fixups */ 556 557 for (i = 0; i < 10; i++) { 558 kb_wait(); 559 udelay(50); 560 outb(0xfe, 0x64); /* pulse reset low */ 561 udelay(50); 562 } 563 564 case BOOT_TRIPLE: 565 load_idt(&no_idt); 566 __asm__ __volatile__("int3"); 567 568 reboot_type = BOOT_KBD; 569 break; 570 571 #ifdef CONFIG_X86_32 572 case BOOT_BIOS: 573 machine_real_restart(jump_to_bios, sizeof(jump_to_bios)); 574 575 reboot_type = BOOT_KBD; 576 break; 577 #endif 578 579 case BOOT_ACPI: 580 acpi_reboot(); 581 reboot_type = BOOT_KBD; 582 break; 583 584 case BOOT_EFI: 585 if (efi_enabled) 586 efi.reset_system(reboot_mode ? 587 EFI_RESET_WARM : 588 EFI_RESET_COLD, 589 EFI_SUCCESS, 0, NULL); 590 reboot_type = BOOT_KBD; 591 break; 592 593 case BOOT_CF9: 594 port_cf9_safe = true; 595 /* fall through */ 596 597 case BOOT_CF9_COND: 598 if (port_cf9_safe) { 599 u8 cf9 = inb(0xcf9) & ~6; 600 outb(cf9|2, 0xcf9); /* Request hard reset */ 601 udelay(50); 602 outb(cf9|6, 0xcf9); /* Actually do the reset */ 603 udelay(50); 604 } 605 reboot_type = BOOT_KBD; 606 break; 607 } 608 } 609 } 610 611 void native_machine_shutdown(void) 612 { 613 /* Stop the cpus and apics */ 614 #ifdef CONFIG_SMP 615 616 /* The boot cpu is always logical cpu 0 */ 617 int reboot_cpu_id = 0; 618 619 #ifdef CONFIG_X86_32 620 /* See if there has been given a command line override */ 621 if ((reboot_cpu != -1) && (reboot_cpu < nr_cpu_ids) && 622 cpu_online(reboot_cpu)) 623 reboot_cpu_id = reboot_cpu; 624 #endif 625 626 /* Make certain the cpu I'm about to reboot on is online */ 627 if (!cpu_online(reboot_cpu_id)) 628 reboot_cpu_id = smp_processor_id(); 629 630 /* Make certain I only run on the appropriate processor */ 631 set_cpus_allowed_ptr(current, cpumask_of(reboot_cpu_id)); 632 633 /* O.K Now that I'm on the appropriate processor, 634 * stop all of the others. 635 */ 636 smp_send_stop(); 637 #endif 638 639 lapic_shutdown(); 640 641 #ifdef CONFIG_X86_IO_APIC 642 disable_IO_APIC(); 643 #endif 644 645 #ifdef CONFIG_HPET_TIMER 646 hpet_disable(); 647 #endif 648 649 #ifdef CONFIG_X86_64 650 x86_platform.iommu_shutdown(); 651 #endif 652 } 653 654 static void __machine_emergency_restart(int emergency) 655 { 656 reboot_emergency = emergency; 657 machine_ops.emergency_restart(); 658 } 659 660 static void native_machine_restart(char *__unused) 661 { 662 printk("machine restart\n"); 663 664 if (!reboot_force) 665 machine_shutdown(); 666 __machine_emergency_restart(0); 667 } 668 669 static void native_machine_halt(void) 670 { 671 /* stop other cpus and apics */ 672 machine_shutdown(); 673 674 tboot_shutdown(TB_SHUTDOWN_HALT); 675 676 /* stop this cpu */ 677 stop_this_cpu(NULL); 678 } 679 680 static void native_machine_power_off(void) 681 { 682 if (pm_power_off) { 683 if (!reboot_force) 684 machine_shutdown(); 685 pm_power_off(); 686 } 687 /* a fallback in case there is no PM info available */ 688 tboot_shutdown(TB_SHUTDOWN_HALT); 689 } 690 691 struct machine_ops machine_ops = { 692 .power_off = native_machine_power_off, 693 .shutdown = native_machine_shutdown, 694 .emergency_restart = native_machine_emergency_restart, 695 .restart = native_machine_restart, 696 .halt = native_machine_halt, 697 #ifdef CONFIG_KEXEC 698 .crash_shutdown = native_machine_crash_shutdown, 699 #endif 700 }; 701 702 void machine_power_off(void) 703 { 704 machine_ops.power_off(); 705 } 706 707 void machine_shutdown(void) 708 { 709 machine_ops.shutdown(); 710 } 711 712 void machine_emergency_restart(void) 713 { 714 __machine_emergency_restart(1); 715 } 716 717 void machine_restart(char *cmd) 718 { 719 machine_ops.restart(cmd); 720 } 721 722 void machine_halt(void) 723 { 724 machine_ops.halt(); 725 } 726 727 #ifdef CONFIG_KEXEC 728 void machine_crash_shutdown(struct pt_regs *regs) 729 { 730 machine_ops.crash_shutdown(regs); 731 } 732 #endif 733 734 735 #if defined(CONFIG_SMP) 736 737 /* This keeps a track of which one is crashing cpu. */ 738 static int crashing_cpu; 739 static nmi_shootdown_cb shootdown_callback; 740 741 static atomic_t waiting_for_crash_ipi; 742 743 static int crash_nmi_callback(struct notifier_block *self, 744 unsigned long val, void *data) 745 { 746 int cpu; 747 748 if (val != DIE_NMI_IPI) 749 return NOTIFY_OK; 750 751 cpu = raw_smp_processor_id(); 752 753 /* Don't do anything if this handler is invoked on crashing cpu. 754 * Otherwise, system will completely hang. Crashing cpu can get 755 * an NMI if system was initially booted with nmi_watchdog parameter. 756 */ 757 if (cpu == crashing_cpu) 758 return NOTIFY_STOP; 759 local_irq_disable(); 760 761 shootdown_callback(cpu, (struct die_args *)data); 762 763 atomic_dec(&waiting_for_crash_ipi); 764 /* Assume hlt works */ 765 halt(); 766 for (;;) 767 cpu_relax(); 768 769 return 1; 770 } 771 772 static void smp_send_nmi_allbutself(void) 773 { 774 apic->send_IPI_allbutself(NMI_VECTOR); 775 } 776 777 static struct notifier_block crash_nmi_nb = { 778 .notifier_call = crash_nmi_callback, 779 }; 780 781 /* Halt all other CPUs, calling the specified function on each of them 782 * 783 * This function can be used to halt all other CPUs on crash 784 * or emergency reboot time. The function passed as parameter 785 * will be called inside a NMI handler on all CPUs. 786 */ 787 void nmi_shootdown_cpus(nmi_shootdown_cb callback) 788 { 789 unsigned long msecs; 790 local_irq_disable(); 791 792 /* Make a note of crashing cpu. Will be used in NMI callback.*/ 793 crashing_cpu = safe_smp_processor_id(); 794 795 shootdown_callback = callback; 796 797 atomic_set(&waiting_for_crash_ipi, num_online_cpus() - 1); 798 /* Would it be better to replace the trap vector here? */ 799 if (register_die_notifier(&crash_nmi_nb)) 800 return; /* return what? */ 801 /* Ensure the new callback function is set before sending 802 * out the NMI 803 */ 804 wmb(); 805 806 smp_send_nmi_allbutself(); 807 808 msecs = 1000; /* Wait at most a second for the other cpus to stop */ 809 while ((atomic_read(&waiting_for_crash_ipi) > 0) && msecs) { 810 mdelay(1); 811 msecs--; 812 } 813 814 /* Leave the nmi callback set */ 815 } 816 #else /* !CONFIG_SMP */ 817 void nmi_shootdown_cpus(nmi_shootdown_cb callback) 818 { 819 /* No other CPUs to shoot down */ 820 } 821 #endif 822