1 /* 2 * Copyright (C) 1995 Linus Torvalds 3 * 4 * Pentium III FXSR, SSE support 5 * Gareth Hughes <gareth@valinux.com>, May 2000 6 */ 7 8 /* 9 * This file handles the architecture-dependent parts of process handling.. 10 */ 11 12 #include <linux/cpu.h> 13 #include <linux/errno.h> 14 #include <linux/sched.h> 15 #include <linux/sched/task.h> 16 #include <linux/sched/task_stack.h> 17 #include <linux/fs.h> 18 #include <linux/kernel.h> 19 #include <linux/mm.h> 20 #include <linux/elfcore.h> 21 #include <linux/smp.h> 22 #include <linux/stddef.h> 23 #include <linux/slab.h> 24 #include <linux/vmalloc.h> 25 #include <linux/user.h> 26 #include <linux/interrupt.h> 27 #include <linux/delay.h> 28 #include <linux/reboot.h> 29 #include <linux/mc146818rtc.h> 30 #include <linux/export.h> 31 #include <linux/kallsyms.h> 32 #include <linux/ptrace.h> 33 #include <linux/personality.h> 34 #include <linux/percpu.h> 35 #include <linux/prctl.h> 36 #include <linux/ftrace.h> 37 #include <linux/uaccess.h> 38 #include <linux/io.h> 39 #include <linux/kdebug.h> 40 #include <linux/syscalls.h> 41 42 #include <asm/pgtable.h> 43 #include <asm/ldt.h> 44 #include <asm/processor.h> 45 #include <asm/fpu/internal.h> 46 #include <asm/desc.h> 47 48 #include <linux/err.h> 49 50 #include <asm/tlbflush.h> 51 #include <asm/cpu.h> 52 #include <asm/syscalls.h> 53 #include <asm/debugreg.h> 54 #include <asm/switch_to.h> 55 #include <asm/vm86.h> 56 #include <asm/resctrl_sched.h> 57 #include <asm/proto.h> 58 59 #include "process.h" 60 61 void __show_regs(struct pt_regs *regs, enum show_regs_mode mode) 62 { 63 unsigned long cr0 = 0L, cr2 = 0L, cr3 = 0L, cr4 = 0L; 64 unsigned long d0, d1, d2, d3, d6, d7; 65 unsigned long sp; 66 unsigned short ss, gs; 67 68 if (user_mode(regs)) { 69 sp = regs->sp; 70 ss = regs->ss; 71 gs = get_user_gs(regs); 72 } else { 73 sp = kernel_stack_pointer(regs); 74 savesegment(ss, ss); 75 savesegment(gs, gs); 76 } 77 78 show_ip(regs, KERN_DEFAULT); 79 80 printk(KERN_DEFAULT "EAX: %08lx EBX: %08lx ECX: %08lx EDX: %08lx\n", 81 regs->ax, regs->bx, regs->cx, regs->dx); 82 printk(KERN_DEFAULT "ESI: %08lx EDI: %08lx EBP: %08lx ESP: %08lx\n", 83 regs->si, regs->di, regs->bp, sp); 84 printk(KERN_DEFAULT "DS: %04x ES: %04x FS: %04x GS: %04x SS: %04x EFLAGS: %08lx\n", 85 (u16)regs->ds, (u16)regs->es, (u16)regs->fs, gs, ss, regs->flags); 86 87 if (mode != SHOW_REGS_ALL) 88 return; 89 90 cr0 = read_cr0(); 91 cr2 = read_cr2(); 92 cr3 = __read_cr3(); 93 cr4 = __read_cr4(); 94 printk(KERN_DEFAULT "CR0: %08lx CR2: %08lx CR3: %08lx CR4: %08lx\n", 95 cr0, cr2, cr3, cr4); 96 97 get_debugreg(d0, 0); 98 get_debugreg(d1, 1); 99 get_debugreg(d2, 2); 100 get_debugreg(d3, 3); 101 get_debugreg(d6, 6); 102 get_debugreg(d7, 7); 103 104 /* Only print out debug registers if they are in their non-default state. */ 105 if ((d0 == 0) && (d1 == 0) && (d2 == 0) && (d3 == 0) && 106 (d6 == DR6_RESERVED) && (d7 == 0x400)) 107 return; 108 109 printk(KERN_DEFAULT "DR0: %08lx DR1: %08lx DR2: %08lx DR3: %08lx\n", 110 d0, d1, d2, d3); 111 printk(KERN_DEFAULT "DR6: %08lx DR7: %08lx\n", 112 d6, d7); 113 } 114 115 void release_thread(struct task_struct *dead_task) 116 { 117 BUG_ON(dead_task->mm); 118 release_vm86_irqs(dead_task); 119 } 120 121 int copy_thread_tls(unsigned long clone_flags, unsigned long sp, 122 unsigned long arg, struct task_struct *p, unsigned long tls) 123 { 124 struct pt_regs *childregs = task_pt_regs(p); 125 struct fork_frame *fork_frame = container_of(childregs, struct fork_frame, regs); 126 struct inactive_task_frame *frame = &fork_frame->frame; 127 struct task_struct *tsk; 128 int err; 129 130 /* 131 * For a new task use the RESET flags value since there is no before. 132 * All the status flags are zero; DF and all the system flags must also 133 * be 0, specifically IF must be 0 because we context switch to the new 134 * task with interrupts disabled. 135 */ 136 frame->flags = X86_EFLAGS_FIXED; 137 frame->bp = 0; 138 frame->ret_addr = (unsigned long) ret_from_fork; 139 p->thread.sp = (unsigned long) fork_frame; 140 p->thread.sp0 = (unsigned long) (childregs+1); 141 memset(p->thread.ptrace_bps, 0, sizeof(p->thread.ptrace_bps)); 142 143 if (unlikely(p->flags & PF_KTHREAD)) { 144 /* kernel thread */ 145 memset(childregs, 0, sizeof(struct pt_regs)); 146 frame->bx = sp; /* function */ 147 frame->di = arg; 148 p->thread.io_bitmap_ptr = NULL; 149 return 0; 150 } 151 frame->bx = 0; 152 *childregs = *current_pt_regs(); 153 childregs->ax = 0; 154 if (sp) 155 childregs->sp = sp; 156 157 task_user_gs(p) = get_user_gs(current_pt_regs()); 158 159 p->thread.io_bitmap_ptr = NULL; 160 tsk = current; 161 err = -ENOMEM; 162 163 if (unlikely(test_tsk_thread_flag(tsk, TIF_IO_BITMAP))) { 164 p->thread.io_bitmap_ptr = kmemdup(tsk->thread.io_bitmap_ptr, 165 IO_BITMAP_BYTES, GFP_KERNEL); 166 if (!p->thread.io_bitmap_ptr) { 167 p->thread.io_bitmap_max = 0; 168 return -ENOMEM; 169 } 170 set_tsk_thread_flag(p, TIF_IO_BITMAP); 171 } 172 173 err = 0; 174 175 /* 176 * Set a new TLS for the child thread? 177 */ 178 if (clone_flags & CLONE_SETTLS) 179 err = do_set_thread_area(p, -1, 180 (struct user_desc __user *)tls, 0); 181 182 if (err && p->thread.io_bitmap_ptr) { 183 kfree(p->thread.io_bitmap_ptr); 184 p->thread.io_bitmap_max = 0; 185 } 186 return err; 187 } 188 189 void 190 start_thread(struct pt_regs *regs, unsigned long new_ip, unsigned long new_sp) 191 { 192 set_user_gs(regs, 0); 193 regs->fs = 0; 194 regs->ds = __USER_DS; 195 regs->es = __USER_DS; 196 regs->ss = __USER_DS; 197 regs->cs = __USER_CS; 198 regs->ip = new_ip; 199 regs->sp = new_sp; 200 regs->flags = X86_EFLAGS_IF; 201 force_iret(); 202 } 203 EXPORT_SYMBOL_GPL(start_thread); 204 205 206 /* 207 * switch_to(x,y) should switch tasks from x to y. 208 * 209 * We fsave/fwait so that an exception goes off at the right time 210 * (as a call from the fsave or fwait in effect) rather than to 211 * the wrong process. Lazy FP saving no longer makes any sense 212 * with modern CPU's, and this simplifies a lot of things (SMP 213 * and UP become the same). 214 * 215 * NOTE! We used to use the x86 hardware context switching. The 216 * reason for not using it any more becomes apparent when you 217 * try to recover gracefully from saved state that is no longer 218 * valid (stale segment register values in particular). With the 219 * hardware task-switch, there is no way to fix up bad state in 220 * a reasonable manner. 221 * 222 * The fact that Intel documents the hardware task-switching to 223 * be slow is a fairly red herring - this code is not noticeably 224 * faster. However, there _is_ some room for improvement here, 225 * so the performance issues may eventually be a valid point. 226 * More important, however, is the fact that this allows us much 227 * more flexibility. 228 * 229 * The return value (in %ax) will be the "prev" task after 230 * the task-switch, and shows up in ret_from_fork in entry.S, 231 * for example. 232 */ 233 __visible __notrace_funcgraph struct task_struct * 234 __switch_to(struct task_struct *prev_p, struct task_struct *next_p) 235 { 236 struct thread_struct *prev = &prev_p->thread, 237 *next = &next_p->thread; 238 struct fpu *prev_fpu = &prev->fpu; 239 struct fpu *next_fpu = &next->fpu; 240 int cpu = smp_processor_id(); 241 242 /* never put a printk in __switch_to... printk() calls wake_up*() indirectly */ 243 244 if (!test_thread_flag(TIF_NEED_FPU_LOAD)) 245 switch_fpu_prepare(prev_fpu, cpu); 246 247 /* 248 * Save away %gs. No need to save %fs, as it was saved on the 249 * stack on entry. No need to save %es and %ds, as those are 250 * always kernel segments while inside the kernel. Doing this 251 * before setting the new TLS descriptors avoids the situation 252 * where we temporarily have non-reloadable segments in %fs 253 * and %gs. This could be an issue if the NMI handler ever 254 * used %fs or %gs (it does not today), or if the kernel is 255 * running inside of a hypervisor layer. 256 */ 257 lazy_save_gs(prev->gs); 258 259 /* 260 * Load the per-thread Thread-Local Storage descriptor. 261 */ 262 load_TLS(next, cpu); 263 264 /* 265 * Restore IOPL if needed. In normal use, the flags restore 266 * in the switch assembly will handle this. But if the kernel 267 * is running virtualized at a non-zero CPL, the popf will 268 * not restore flags, so it must be done in a separate step. 269 */ 270 if (get_kernel_rpl() && unlikely(prev->iopl != next->iopl)) 271 set_iopl_mask(next->iopl); 272 273 switch_to_extra(prev_p, next_p); 274 275 /* 276 * Leave lazy mode, flushing any hypercalls made here. 277 * This must be done before restoring TLS segments so 278 * the GDT and LDT are properly updated. 279 */ 280 arch_end_context_switch(next_p); 281 282 /* 283 * Reload esp0 and cpu_current_top_of_stack. This changes 284 * current_thread_info(). Refresh the SYSENTER configuration in 285 * case prev or next is vm86. 286 */ 287 update_task_stack(next_p); 288 refresh_sysenter_cs(next); 289 this_cpu_write(cpu_current_top_of_stack, 290 (unsigned long)task_stack_page(next_p) + 291 THREAD_SIZE); 292 293 /* 294 * Restore %gs if needed (which is common) 295 */ 296 if (prev->gs | next->gs) 297 lazy_load_gs(next->gs); 298 299 this_cpu_write(current_task, next_p); 300 301 switch_fpu_finish(next_fpu); 302 303 /* Load the Intel cache allocation PQR MSR. */ 304 resctrl_sched_in(); 305 306 return prev_p; 307 } 308 309 SYSCALL_DEFINE2(arch_prctl, int, option, unsigned long, arg2) 310 { 311 return do_arch_prctl_common(current, option, arg2); 312 } 313