1 /* 2 * Intel Multiprocessor Specification 1.1 and 1.4 3 * compliant MP-table parsing routines. 4 * 5 * (c) 1995 Alan Cox, Building #3 <alan@lxorguk.ukuu.org.uk> 6 * (c) 1998, 1999, 2000, 2009 Ingo Molnar <mingo@redhat.com> 7 * (c) 2008 Alexey Starikovskiy <astarikovskiy@suse.de> 8 */ 9 10 #include <linux/mm.h> 11 #include <linux/init.h> 12 #include <linux/delay.h> 13 #include <linux/bootmem.h> 14 #include <linux/kernel_stat.h> 15 #include <linux/mc146818rtc.h> 16 #include <linux/bitops.h> 17 #include <linux/acpi.h> 18 #include <linux/module.h> 19 #include <linux/smp.h> 20 #include <linux/pci.h> 21 22 #include <asm/mtrr.h> 23 #include <asm/mpspec.h> 24 #include <asm/pgalloc.h> 25 #include <asm/io_apic.h> 26 #include <asm/proto.h> 27 #include <asm/bios_ebda.h> 28 #include <asm/e820.h> 29 #include <asm/trampoline.h> 30 #include <asm/setup.h> 31 #include <asm/smp.h> 32 33 #include <asm/apic.h> 34 /* 35 * Checksum an MP configuration block. 36 */ 37 38 static int __init mpf_checksum(unsigned char *mp, int len) 39 { 40 int sum = 0; 41 42 while (len--) 43 sum += *mp++; 44 45 return sum & 0xFF; 46 } 47 48 int __init default_mpc_apic_id(struct mpc_cpu *m) 49 { 50 return m->apicid; 51 } 52 53 static void __init MP_processor_info(struct mpc_cpu *m) 54 { 55 int apicid; 56 char *bootup_cpu = ""; 57 58 if (!(m->cpuflag & CPU_ENABLED)) { 59 disabled_cpus++; 60 return; 61 } 62 63 apicid = x86_init.mpparse.mpc_apic_id(m); 64 65 if (m->cpuflag & CPU_BOOTPROCESSOR) { 66 bootup_cpu = " (Bootup-CPU)"; 67 boot_cpu_physical_apicid = m->apicid; 68 } 69 70 printk(KERN_INFO "Processor #%d%s\n", m->apicid, bootup_cpu); 71 generic_processor_info(apicid, m->apicver); 72 } 73 74 #ifdef CONFIG_X86_IO_APIC 75 void __init default_mpc_oem_bus_info(struct mpc_bus *m, char *str) 76 { 77 memcpy(str, m->bustype, 6); 78 str[6] = 0; 79 apic_printk(APIC_VERBOSE, "Bus #%d is %s\n", m->busid, str); 80 } 81 82 static void __init MP_bus_info(struct mpc_bus *m) 83 { 84 char str[7]; 85 86 x86_init.mpparse.mpc_oem_bus_info(m, str); 87 88 #if MAX_MP_BUSSES < 256 89 if (m->busid >= MAX_MP_BUSSES) { 90 printk(KERN_WARNING "MP table busid value (%d) for bustype %s " 91 " is too large, max. supported is %d\n", 92 m->busid, str, MAX_MP_BUSSES - 1); 93 return; 94 } 95 #endif 96 97 if (strncmp(str, BUSTYPE_ISA, sizeof(BUSTYPE_ISA) - 1) == 0) { 98 set_bit(m->busid, mp_bus_not_pci); 99 #if defined(CONFIG_EISA) || defined(CONFIG_MCA) 100 mp_bus_id_to_type[m->busid] = MP_BUS_ISA; 101 #endif 102 } else if (strncmp(str, BUSTYPE_PCI, sizeof(BUSTYPE_PCI) - 1) == 0) { 103 if (x86_init.mpparse.mpc_oem_pci_bus) 104 x86_init.mpparse.mpc_oem_pci_bus(m); 105 106 clear_bit(m->busid, mp_bus_not_pci); 107 #if defined(CONFIG_EISA) || defined(CONFIG_MCA) 108 mp_bus_id_to_type[m->busid] = MP_BUS_PCI; 109 } else if (strncmp(str, BUSTYPE_EISA, sizeof(BUSTYPE_EISA) - 1) == 0) { 110 mp_bus_id_to_type[m->busid] = MP_BUS_EISA; 111 } else if (strncmp(str, BUSTYPE_MCA, sizeof(BUSTYPE_MCA) - 1) == 0) { 112 mp_bus_id_to_type[m->busid] = MP_BUS_MCA; 113 #endif 114 } else 115 printk(KERN_WARNING "Unknown bustype %s - ignoring\n", str); 116 } 117 118 static int bad_ioapic(unsigned long address) 119 { 120 if (nr_ioapics >= MAX_IO_APICS) { 121 printk(KERN_ERR "ERROR: Max # of I/O APICs (%d) exceeded " 122 "(found %d)\n", MAX_IO_APICS, nr_ioapics); 123 panic("Recompile kernel with bigger MAX_IO_APICS!\n"); 124 } 125 if (!address) { 126 printk(KERN_ERR "WARNING: Bogus (zero) I/O APIC address" 127 " found in table, skipping!\n"); 128 return 1; 129 } 130 return 0; 131 } 132 133 static void __init MP_ioapic_info(struct mpc_ioapic *m) 134 { 135 if (!(m->flags & MPC_APIC_USABLE)) 136 return; 137 138 printk(KERN_INFO "I/O APIC #%d Version %d at 0x%X.\n", 139 m->apicid, m->apicver, m->apicaddr); 140 141 if (bad_ioapic(m->apicaddr)) 142 return; 143 144 mp_ioapics[nr_ioapics].apicaddr = m->apicaddr; 145 mp_ioapics[nr_ioapics].apicid = m->apicid; 146 mp_ioapics[nr_ioapics].type = m->type; 147 mp_ioapics[nr_ioapics].apicver = m->apicver; 148 mp_ioapics[nr_ioapics].flags = m->flags; 149 nr_ioapics++; 150 } 151 152 static void print_MP_intsrc_info(struct mpc_intsrc *m) 153 { 154 apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x," 155 " IRQ %02x, APIC ID %x, APIC INT %02x\n", 156 m->irqtype, m->irqflag & 3, (m->irqflag >> 2) & 3, m->srcbus, 157 m->srcbusirq, m->dstapic, m->dstirq); 158 } 159 160 static void __init print_mp_irq_info(struct mpc_intsrc *mp_irq) 161 { 162 apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x," 163 " IRQ %02x, APIC ID %x, APIC INT %02x\n", 164 mp_irq->irqtype, mp_irq->irqflag & 3, 165 (mp_irq->irqflag >> 2) & 3, mp_irq->srcbus, 166 mp_irq->srcbusirq, mp_irq->dstapic, mp_irq->dstirq); 167 } 168 169 static void __init assign_to_mp_irq(struct mpc_intsrc *m, 170 struct mpc_intsrc *mp_irq) 171 { 172 mp_irq->dstapic = m->dstapic; 173 mp_irq->type = m->type; 174 mp_irq->irqtype = m->irqtype; 175 mp_irq->irqflag = m->irqflag; 176 mp_irq->srcbus = m->srcbus; 177 mp_irq->srcbusirq = m->srcbusirq; 178 mp_irq->dstirq = m->dstirq; 179 } 180 181 static void __init assign_to_mpc_intsrc(struct mpc_intsrc *mp_irq, 182 struct mpc_intsrc *m) 183 { 184 m->dstapic = mp_irq->dstapic; 185 m->type = mp_irq->type; 186 m->irqtype = mp_irq->irqtype; 187 m->irqflag = mp_irq->irqflag; 188 m->srcbus = mp_irq->srcbus; 189 m->srcbusirq = mp_irq->srcbusirq; 190 m->dstirq = mp_irq->dstirq; 191 } 192 193 static int __init mp_irq_mpc_intsrc_cmp(struct mpc_intsrc *mp_irq, 194 struct mpc_intsrc *m) 195 { 196 if (mp_irq->dstapic != m->dstapic) 197 return 1; 198 if (mp_irq->type != m->type) 199 return 2; 200 if (mp_irq->irqtype != m->irqtype) 201 return 3; 202 if (mp_irq->irqflag != m->irqflag) 203 return 4; 204 if (mp_irq->srcbus != m->srcbus) 205 return 5; 206 if (mp_irq->srcbusirq != m->srcbusirq) 207 return 6; 208 if (mp_irq->dstirq != m->dstirq) 209 return 7; 210 211 return 0; 212 } 213 214 static void __init MP_intsrc_info(struct mpc_intsrc *m) 215 { 216 int i; 217 218 print_MP_intsrc_info(m); 219 220 for (i = 0; i < mp_irq_entries; i++) { 221 if (!mp_irq_mpc_intsrc_cmp(&mp_irqs[i], m)) 222 return; 223 } 224 225 assign_to_mp_irq(m, &mp_irqs[mp_irq_entries]); 226 if (++mp_irq_entries == MAX_IRQ_SOURCES) 227 panic("Max # of irq sources exceeded!!\n"); 228 } 229 #else /* CONFIG_X86_IO_APIC */ 230 static inline void __init MP_bus_info(struct mpc_bus *m) {} 231 static inline void __init MP_ioapic_info(struct mpc_ioapic *m) {} 232 static inline void __init MP_intsrc_info(struct mpc_intsrc *m) {} 233 #endif /* CONFIG_X86_IO_APIC */ 234 235 236 static void __init MP_lintsrc_info(struct mpc_lintsrc *m) 237 { 238 apic_printk(APIC_VERBOSE, "Lint: type %d, pol %d, trig %d, bus %02x," 239 " IRQ %02x, APIC ID %x, APIC LINT %02x\n", 240 m->irqtype, m->irqflag & 3, (m->irqflag >> 2) & 3, m->srcbusid, 241 m->srcbusirq, m->destapic, m->destapiclint); 242 } 243 244 /* 245 * Read/parse the MPC 246 */ 247 248 static int __init smp_check_mpc(struct mpc_table *mpc, char *oem, char *str) 249 { 250 251 if (memcmp(mpc->signature, MPC_SIGNATURE, 4)) { 252 printk(KERN_ERR "MPTABLE: bad signature [%c%c%c%c]!\n", 253 mpc->signature[0], mpc->signature[1], 254 mpc->signature[2], mpc->signature[3]); 255 return 0; 256 } 257 if (mpf_checksum((unsigned char *)mpc, mpc->length)) { 258 printk(KERN_ERR "MPTABLE: checksum error!\n"); 259 return 0; 260 } 261 if (mpc->spec != 0x01 && mpc->spec != 0x04) { 262 printk(KERN_ERR "MPTABLE: bad table version (%d)!!\n", 263 mpc->spec); 264 return 0; 265 } 266 if (!mpc->lapic) { 267 printk(KERN_ERR "MPTABLE: null local APIC address!\n"); 268 return 0; 269 } 270 memcpy(oem, mpc->oem, 8); 271 oem[8] = 0; 272 printk(KERN_INFO "MPTABLE: OEM ID: %s\n", oem); 273 274 memcpy(str, mpc->productid, 12); 275 str[12] = 0; 276 277 printk(KERN_INFO "MPTABLE: Product ID: %s\n", str); 278 279 printk(KERN_INFO "MPTABLE: APIC at: 0x%X\n", mpc->lapic); 280 281 return 1; 282 } 283 284 static void skip_entry(unsigned char **ptr, int *count, int size) 285 { 286 *ptr += size; 287 *count += size; 288 } 289 290 static void __init smp_dump_mptable(struct mpc_table *mpc, unsigned char *mpt) 291 { 292 printk(KERN_ERR "Your mptable is wrong, contact your HW vendor!\n" 293 "type %x\n", *mpt); 294 print_hex_dump(KERN_ERR, " ", DUMP_PREFIX_ADDRESS, 16, 295 1, mpc, mpc->length, 1); 296 } 297 298 void __init default_smp_read_mpc_oem(struct mpc_table *mpc) { } 299 300 static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early) 301 { 302 char str[16]; 303 char oem[10]; 304 305 int count = sizeof(*mpc); 306 unsigned char *mpt = ((unsigned char *)mpc) + count; 307 308 if (!smp_check_mpc(mpc, oem, str)) 309 return 0; 310 311 #ifdef CONFIG_X86_32 312 generic_mps_oem_check(mpc, oem, str); 313 #endif 314 /* save the local APIC address, it might be non-default */ 315 if (!acpi_lapic) 316 mp_lapic_addr = mpc->lapic; 317 318 if (early) 319 return 1; 320 321 if (mpc->oemptr) 322 x86_init.mpparse.smp_read_mpc_oem(mpc); 323 324 /* 325 * Now process the configuration blocks. 326 */ 327 x86_init.mpparse.mpc_record(0); 328 329 while (count < mpc->length) { 330 switch (*mpt) { 331 case MP_PROCESSOR: 332 /* ACPI may have already provided this data */ 333 if (!acpi_lapic) 334 MP_processor_info((struct mpc_cpu *)mpt); 335 skip_entry(&mpt, &count, sizeof(struct mpc_cpu)); 336 break; 337 case MP_BUS: 338 MP_bus_info((struct mpc_bus *)mpt); 339 skip_entry(&mpt, &count, sizeof(struct mpc_bus)); 340 break; 341 case MP_IOAPIC: 342 MP_ioapic_info((struct mpc_ioapic *)mpt); 343 skip_entry(&mpt, &count, sizeof(struct mpc_ioapic)); 344 break; 345 case MP_INTSRC: 346 MP_intsrc_info((struct mpc_intsrc *)mpt); 347 skip_entry(&mpt, &count, sizeof(struct mpc_intsrc)); 348 break; 349 case MP_LINTSRC: 350 MP_lintsrc_info((struct mpc_lintsrc *)mpt); 351 skip_entry(&mpt, &count, sizeof(struct mpc_lintsrc)); 352 break; 353 default: 354 /* wrong mptable */ 355 smp_dump_mptable(mpc, mpt); 356 count = mpc->length; 357 break; 358 } 359 x86_init.mpparse.mpc_record(1); 360 } 361 362 #ifdef CONFIG_X86_BIGSMP 363 generic_bigsmp_probe(); 364 #endif 365 366 if (apic->setup_apic_routing) 367 apic->setup_apic_routing(); 368 369 if (!num_processors) 370 printk(KERN_ERR "MPTABLE: no processors registered!\n"); 371 return num_processors; 372 } 373 374 #ifdef CONFIG_X86_IO_APIC 375 376 static int __init ELCR_trigger(unsigned int irq) 377 { 378 unsigned int port; 379 380 port = 0x4d0 + (irq >> 3); 381 return (inb(port) >> (irq & 7)) & 1; 382 } 383 384 static void __init construct_default_ioirq_mptable(int mpc_default_type) 385 { 386 struct mpc_intsrc intsrc; 387 int i; 388 int ELCR_fallback = 0; 389 390 intsrc.type = MP_INTSRC; 391 intsrc.irqflag = 0; /* conforming */ 392 intsrc.srcbus = 0; 393 intsrc.dstapic = mp_ioapics[0].apicid; 394 395 intsrc.irqtype = mp_INT; 396 397 /* 398 * If true, we have an ISA/PCI system with no IRQ entries 399 * in the MP table. To prevent the PCI interrupts from being set up 400 * incorrectly, we try to use the ELCR. The sanity check to see if 401 * there is good ELCR data is very simple - IRQ0, 1, 2 and 13 can 402 * never be level sensitive, so we simply see if the ELCR agrees. 403 * If it does, we assume it's valid. 404 */ 405 if (mpc_default_type == 5) { 406 printk(KERN_INFO "ISA/PCI bus type with no IRQ information... " 407 "falling back to ELCR\n"); 408 409 if (ELCR_trigger(0) || ELCR_trigger(1) || ELCR_trigger(2) || 410 ELCR_trigger(13)) 411 printk(KERN_ERR "ELCR contains invalid data... " 412 "not using ELCR\n"); 413 else { 414 printk(KERN_INFO 415 "Using ELCR to identify PCI interrupts\n"); 416 ELCR_fallback = 1; 417 } 418 } 419 420 for (i = 0; i < 16; i++) { 421 switch (mpc_default_type) { 422 case 2: 423 if (i == 0 || i == 13) 424 continue; /* IRQ0 & IRQ13 not connected */ 425 /* fall through */ 426 default: 427 if (i == 2) 428 continue; /* IRQ2 is never connected */ 429 } 430 431 if (ELCR_fallback) { 432 /* 433 * If the ELCR indicates a level-sensitive interrupt, we 434 * copy that information over to the MP table in the 435 * irqflag field (level sensitive, active high polarity). 436 */ 437 if (ELCR_trigger(i)) 438 intsrc.irqflag = 13; 439 else 440 intsrc.irqflag = 0; 441 } 442 443 intsrc.srcbusirq = i; 444 intsrc.dstirq = i ? i : 2; /* IRQ0 to INTIN2 */ 445 MP_intsrc_info(&intsrc); 446 } 447 448 intsrc.irqtype = mp_ExtINT; 449 intsrc.srcbusirq = 0; 450 intsrc.dstirq = 0; /* 8259A to INTIN0 */ 451 MP_intsrc_info(&intsrc); 452 } 453 454 455 static void __init construct_ioapic_table(int mpc_default_type) 456 { 457 struct mpc_ioapic ioapic; 458 struct mpc_bus bus; 459 460 bus.type = MP_BUS; 461 bus.busid = 0; 462 switch (mpc_default_type) { 463 default: 464 printk(KERN_ERR "???\nUnknown standard configuration %d\n", 465 mpc_default_type); 466 /* fall through */ 467 case 1: 468 case 5: 469 memcpy(bus.bustype, "ISA ", 6); 470 break; 471 case 2: 472 case 6: 473 case 3: 474 memcpy(bus.bustype, "EISA ", 6); 475 break; 476 case 4: 477 case 7: 478 memcpy(bus.bustype, "MCA ", 6); 479 } 480 MP_bus_info(&bus); 481 if (mpc_default_type > 4) { 482 bus.busid = 1; 483 memcpy(bus.bustype, "PCI ", 6); 484 MP_bus_info(&bus); 485 } 486 487 ioapic.type = MP_IOAPIC; 488 ioapic.apicid = 2; 489 ioapic.apicver = mpc_default_type > 4 ? 0x10 : 0x01; 490 ioapic.flags = MPC_APIC_USABLE; 491 ioapic.apicaddr = IO_APIC_DEFAULT_PHYS_BASE; 492 MP_ioapic_info(&ioapic); 493 494 /* 495 * We set up most of the low 16 IO-APIC pins according to MPS rules. 496 */ 497 construct_default_ioirq_mptable(mpc_default_type); 498 } 499 #else 500 static inline void __init construct_ioapic_table(int mpc_default_type) { } 501 #endif 502 503 static inline void __init construct_default_ISA_mptable(int mpc_default_type) 504 { 505 struct mpc_cpu processor; 506 struct mpc_lintsrc lintsrc; 507 int linttypes[2] = { mp_ExtINT, mp_NMI }; 508 int i; 509 510 /* 511 * local APIC has default address 512 */ 513 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE; 514 515 /* 516 * 2 CPUs, numbered 0 & 1. 517 */ 518 processor.type = MP_PROCESSOR; 519 /* Either an integrated APIC or a discrete 82489DX. */ 520 processor.apicver = mpc_default_type > 4 ? 0x10 : 0x01; 521 processor.cpuflag = CPU_ENABLED; 522 processor.cpufeature = (boot_cpu_data.x86 << 8) | 523 (boot_cpu_data.x86_model << 4) | boot_cpu_data.x86_mask; 524 processor.featureflag = boot_cpu_data.x86_capability[0]; 525 processor.reserved[0] = 0; 526 processor.reserved[1] = 0; 527 for (i = 0; i < 2; i++) { 528 processor.apicid = i; 529 MP_processor_info(&processor); 530 } 531 532 construct_ioapic_table(mpc_default_type); 533 534 lintsrc.type = MP_LINTSRC; 535 lintsrc.irqflag = 0; /* conforming */ 536 lintsrc.srcbusid = 0; 537 lintsrc.srcbusirq = 0; 538 lintsrc.destapic = MP_APIC_ALL; 539 for (i = 0; i < 2; i++) { 540 lintsrc.irqtype = linttypes[i]; 541 lintsrc.destapiclint = i; 542 MP_lintsrc_info(&lintsrc); 543 } 544 } 545 546 static struct mpf_intel *mpf_found; 547 548 static unsigned long __init get_mpc_size(unsigned long physptr) 549 { 550 struct mpc_table *mpc; 551 unsigned long size; 552 553 mpc = early_ioremap(physptr, PAGE_SIZE); 554 size = mpc->length; 555 early_iounmap(mpc, PAGE_SIZE); 556 apic_printk(APIC_VERBOSE, " mpc: %lx-%lx\n", physptr, physptr + size); 557 558 return size; 559 } 560 561 static int __init check_physptr(struct mpf_intel *mpf, unsigned int early) 562 { 563 struct mpc_table *mpc; 564 unsigned long size; 565 566 size = get_mpc_size(mpf->physptr); 567 mpc = early_ioremap(mpf->physptr, size); 568 /* 569 * Read the physical hardware table. Anything here will 570 * override the defaults. 571 */ 572 if (!smp_read_mpc(mpc, early)) { 573 #ifdef CONFIG_X86_LOCAL_APIC 574 smp_found_config = 0; 575 #endif 576 printk(KERN_ERR "BIOS bug, MP table errors detected!...\n" 577 "... disabling SMP support. (tell your hw vendor)\n"); 578 early_iounmap(mpc, size); 579 return -1; 580 } 581 early_iounmap(mpc, size); 582 583 if (early) 584 return -1; 585 586 #ifdef CONFIG_X86_IO_APIC 587 /* 588 * If there are no explicit MP IRQ entries, then we are 589 * broken. We set up most of the low 16 IO-APIC pins to 590 * ISA defaults and hope it will work. 591 */ 592 if (!mp_irq_entries) { 593 struct mpc_bus bus; 594 595 printk(KERN_ERR "BIOS bug, no explicit IRQ entries, " 596 "using default mptable. (tell your hw vendor)\n"); 597 598 bus.type = MP_BUS; 599 bus.busid = 0; 600 memcpy(bus.bustype, "ISA ", 6); 601 MP_bus_info(&bus); 602 603 construct_default_ioirq_mptable(0); 604 } 605 #endif 606 607 return 0; 608 } 609 610 /* 611 * Scan the memory blocks for an SMP configuration block. 612 */ 613 void __init default_get_smp_config(unsigned int early) 614 { 615 struct mpf_intel *mpf = mpf_found; 616 617 if (!mpf) 618 return; 619 620 if (acpi_lapic && early) 621 return; 622 623 /* 624 * MPS doesn't support hyperthreading, aka only have 625 * thread 0 apic id in MPS table 626 */ 627 if (acpi_lapic && acpi_ioapic) 628 return; 629 630 printk(KERN_INFO "Intel MultiProcessor Specification v1.%d\n", 631 mpf->specification); 632 #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32) 633 if (mpf->feature2 & (1 << 7)) { 634 printk(KERN_INFO " IMCR and PIC compatibility mode.\n"); 635 pic_mode = 1; 636 } else { 637 printk(KERN_INFO " Virtual Wire compatibility mode.\n"); 638 pic_mode = 0; 639 } 640 #endif 641 /* 642 * Now see if we need to read further. 643 */ 644 if (mpf->feature1 != 0) { 645 if (early) { 646 /* 647 * local APIC has default address 648 */ 649 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE; 650 return; 651 } 652 653 printk(KERN_INFO "Default MP configuration #%d\n", 654 mpf->feature1); 655 construct_default_ISA_mptable(mpf->feature1); 656 657 } else if (mpf->physptr) { 658 if (check_physptr(mpf, early)) 659 return; 660 } else 661 BUG(); 662 663 if (!early) 664 printk(KERN_INFO "Processors: %d\n", num_processors); 665 /* 666 * Only use the first configuration found. 667 */ 668 } 669 670 static void __init smp_reserve_bootmem(struct mpf_intel *mpf) 671 { 672 unsigned long size = get_mpc_size(mpf->physptr); 673 #ifdef CONFIG_X86_32 674 /* 675 * We cannot access to MPC table to compute table size yet, 676 * as only few megabytes from the bottom is mapped now. 677 * PC-9800's MPC table places on the very last of physical 678 * memory; so that simply reserving PAGE_SIZE from mpf->physptr 679 * yields BUG() in reserve_bootmem. 680 * also need to make sure physptr is below than max_low_pfn 681 * we don't need reserve the area above max_low_pfn 682 */ 683 unsigned long end = max_low_pfn * PAGE_SIZE; 684 685 if (mpf->physptr < end) { 686 if (mpf->physptr + size > end) 687 size = end - mpf->physptr; 688 reserve_bootmem_generic(mpf->physptr, size, BOOTMEM_DEFAULT); 689 } 690 #else 691 reserve_bootmem_generic(mpf->physptr, size, BOOTMEM_DEFAULT); 692 #endif 693 } 694 695 static int __init smp_scan_config(unsigned long base, unsigned long length, 696 unsigned reserve) 697 { 698 unsigned int *bp = phys_to_virt(base); 699 struct mpf_intel *mpf; 700 701 apic_printk(APIC_VERBOSE, "Scan SMP from %p for %ld bytes.\n", 702 bp, length); 703 BUILD_BUG_ON(sizeof(*mpf) != 16); 704 705 while (length > 0) { 706 mpf = (struct mpf_intel *)bp; 707 if ((*bp == SMP_MAGIC_IDENT) && 708 (mpf->length == 1) && 709 !mpf_checksum((unsigned char *)bp, 16) && 710 ((mpf->specification == 1) 711 || (mpf->specification == 4))) { 712 #ifdef CONFIG_X86_LOCAL_APIC 713 smp_found_config = 1; 714 #endif 715 mpf_found = mpf; 716 717 printk(KERN_INFO "found SMP MP-table at [%p] %llx\n", 718 mpf, (u64)virt_to_phys(mpf)); 719 720 if (!reserve) 721 return 1; 722 reserve_bootmem_generic(virt_to_phys(mpf), sizeof(*mpf), 723 BOOTMEM_DEFAULT); 724 if (mpf->physptr) 725 smp_reserve_bootmem(mpf); 726 727 return 1; 728 } 729 bp += 4; 730 length -= 16; 731 } 732 return 0; 733 } 734 735 void __init default_find_smp_config(unsigned int reserve) 736 { 737 unsigned int address; 738 739 /* 740 * FIXME: Linux assumes you have 640K of base ram.. 741 * this continues the error... 742 * 743 * 1) Scan the bottom 1K for a signature 744 * 2) Scan the top 1K of base RAM 745 * 3) Scan the 64K of bios 746 */ 747 if (smp_scan_config(0x0, 0x400, reserve) || 748 smp_scan_config(639 * 0x400, 0x400, reserve) || 749 smp_scan_config(0xF0000, 0x10000, reserve)) 750 return; 751 /* 752 * If it is an SMP machine we should know now, unless the 753 * configuration is in an EISA/MCA bus machine with an 754 * extended bios data area. 755 * 756 * there is a real-mode segmented pointer pointing to the 757 * 4K EBDA area at 0x40E, calculate and scan it here. 758 * 759 * NOTE! There are Linux loaders that will corrupt the EBDA 760 * area, and as such this kind of SMP config may be less 761 * trustworthy, simply because the SMP table may have been 762 * stomped on during early boot. These loaders are buggy and 763 * should be fixed. 764 * 765 * MP1.4 SPEC states to only scan first 1K of 4K EBDA. 766 */ 767 768 address = get_bios_ebda(); 769 if (address) 770 smp_scan_config(address, 0x400, reserve); 771 } 772 773 #ifdef CONFIG_X86_IO_APIC 774 static u8 __initdata irq_used[MAX_IRQ_SOURCES]; 775 776 static int __init get_MP_intsrc_index(struct mpc_intsrc *m) 777 { 778 int i; 779 780 if (m->irqtype != mp_INT) 781 return 0; 782 783 if (m->irqflag != 0x0f) 784 return 0; 785 786 /* not legacy */ 787 788 for (i = 0; i < mp_irq_entries; i++) { 789 if (mp_irqs[i].irqtype != mp_INT) 790 continue; 791 792 if (mp_irqs[i].irqflag != 0x0f) 793 continue; 794 795 if (mp_irqs[i].srcbus != m->srcbus) 796 continue; 797 if (mp_irqs[i].srcbusirq != m->srcbusirq) 798 continue; 799 if (irq_used[i]) { 800 /* already claimed */ 801 return -2; 802 } 803 irq_used[i] = 1; 804 return i; 805 } 806 807 /* not found */ 808 return -1; 809 } 810 811 #define SPARE_SLOT_NUM 20 812 813 static struct mpc_intsrc __initdata *m_spare[SPARE_SLOT_NUM]; 814 815 static void __init check_irq_src(struct mpc_intsrc *m, int *nr_m_spare) 816 { 817 int i; 818 819 apic_printk(APIC_VERBOSE, "OLD "); 820 print_MP_intsrc_info(m); 821 822 i = get_MP_intsrc_index(m); 823 if (i > 0) { 824 assign_to_mpc_intsrc(&mp_irqs[i], m); 825 apic_printk(APIC_VERBOSE, "NEW "); 826 print_mp_irq_info(&mp_irqs[i]); 827 return; 828 } 829 if (!i) { 830 /* legacy, do nothing */ 831 return; 832 } 833 if (*nr_m_spare < SPARE_SLOT_NUM) { 834 /* 835 * not found (-1), or duplicated (-2) are invalid entries, 836 * we need to use the slot later 837 */ 838 m_spare[*nr_m_spare] = m; 839 *nr_m_spare += 1; 840 } 841 } 842 #else /* CONFIG_X86_IO_APIC */ 843 static 844 inline void __init check_irq_src(struct mpc_intsrc *m, int *nr_m_spare) {} 845 #endif /* CONFIG_X86_IO_APIC */ 846 847 static int 848 check_slot(unsigned long mpc_new_phys, unsigned long mpc_new_length, int count) 849 { 850 int ret = 0; 851 852 if (!mpc_new_phys || count <= mpc_new_length) { 853 WARN(1, "update_mptable: No spare slots (length: %x)\n", count); 854 return -1; 855 } 856 857 return ret; 858 } 859 860 static int __init replace_intsrc_all(struct mpc_table *mpc, 861 unsigned long mpc_new_phys, 862 unsigned long mpc_new_length) 863 { 864 #ifdef CONFIG_X86_IO_APIC 865 int i; 866 #endif 867 int count = sizeof(*mpc); 868 int nr_m_spare = 0; 869 unsigned char *mpt = ((unsigned char *)mpc) + count; 870 871 printk(KERN_INFO "mpc_length %x\n", mpc->length); 872 while (count < mpc->length) { 873 switch (*mpt) { 874 case MP_PROCESSOR: 875 skip_entry(&mpt, &count, sizeof(struct mpc_cpu)); 876 break; 877 case MP_BUS: 878 skip_entry(&mpt, &count, sizeof(struct mpc_bus)); 879 break; 880 case MP_IOAPIC: 881 skip_entry(&mpt, &count, sizeof(struct mpc_ioapic)); 882 break; 883 case MP_INTSRC: 884 check_irq_src((struct mpc_intsrc *)mpt, &nr_m_spare); 885 skip_entry(&mpt, &count, sizeof(struct mpc_intsrc)); 886 break; 887 case MP_LINTSRC: 888 skip_entry(&mpt, &count, sizeof(struct mpc_lintsrc)); 889 break; 890 default: 891 /* wrong mptable */ 892 smp_dump_mptable(mpc, mpt); 893 goto out; 894 } 895 } 896 897 #ifdef CONFIG_X86_IO_APIC 898 for (i = 0; i < mp_irq_entries; i++) { 899 if (irq_used[i]) 900 continue; 901 902 if (mp_irqs[i].irqtype != mp_INT) 903 continue; 904 905 if (mp_irqs[i].irqflag != 0x0f) 906 continue; 907 908 if (nr_m_spare > 0) { 909 apic_printk(APIC_VERBOSE, "*NEW* found\n"); 910 nr_m_spare--; 911 assign_to_mpc_intsrc(&mp_irqs[i], m_spare[nr_m_spare]); 912 m_spare[nr_m_spare] = NULL; 913 } else { 914 struct mpc_intsrc *m = (struct mpc_intsrc *)mpt; 915 count += sizeof(struct mpc_intsrc); 916 if (check_slot(mpc_new_phys, mpc_new_length, count) < 0) 917 goto out; 918 assign_to_mpc_intsrc(&mp_irqs[i], m); 919 mpc->length = count; 920 mpt += sizeof(struct mpc_intsrc); 921 } 922 print_mp_irq_info(&mp_irqs[i]); 923 } 924 #endif 925 out: 926 /* update checksum */ 927 mpc->checksum = 0; 928 mpc->checksum -= mpf_checksum((unsigned char *)mpc, mpc->length); 929 930 return 0; 931 } 932 933 int enable_update_mptable; 934 935 static int __init update_mptable_setup(char *str) 936 { 937 enable_update_mptable = 1; 938 #ifdef CONFIG_PCI 939 pci_routeirq = 1; 940 #endif 941 return 0; 942 } 943 early_param("update_mptable", update_mptable_setup); 944 945 static unsigned long __initdata mpc_new_phys; 946 static unsigned long mpc_new_length __initdata = 4096; 947 948 /* alloc_mptable or alloc_mptable=4k */ 949 static int __initdata alloc_mptable; 950 static int __init parse_alloc_mptable_opt(char *p) 951 { 952 enable_update_mptable = 1; 953 #ifdef CONFIG_PCI 954 pci_routeirq = 1; 955 #endif 956 alloc_mptable = 1; 957 if (!p) 958 return 0; 959 mpc_new_length = memparse(p, &p); 960 return 0; 961 } 962 early_param("alloc_mptable", parse_alloc_mptable_opt); 963 964 void __init early_reserve_e820_mpc_new(void) 965 { 966 if (enable_update_mptable && alloc_mptable) { 967 u64 startt = 0; 968 #ifdef CONFIG_X86_TRAMPOLINE 969 startt = TRAMPOLINE_BASE; 970 #endif 971 mpc_new_phys = early_reserve_e820(startt, mpc_new_length, 4); 972 } 973 } 974 975 static int __init update_mp_table(void) 976 { 977 char str[16]; 978 char oem[10]; 979 struct mpf_intel *mpf; 980 struct mpc_table *mpc, *mpc_new; 981 982 if (!enable_update_mptable) 983 return 0; 984 985 mpf = mpf_found; 986 if (!mpf) 987 return 0; 988 989 /* 990 * Now see if we need to go further. 991 */ 992 if (mpf->feature1 != 0) 993 return 0; 994 995 if (!mpf->physptr) 996 return 0; 997 998 mpc = phys_to_virt(mpf->physptr); 999 1000 if (!smp_check_mpc(mpc, oem, str)) 1001 return 0; 1002 1003 printk(KERN_INFO "mpf: %llx\n", (u64)virt_to_phys(mpf)); 1004 printk(KERN_INFO "physptr: %x\n", mpf->physptr); 1005 1006 if (mpc_new_phys && mpc->length > mpc_new_length) { 1007 mpc_new_phys = 0; 1008 printk(KERN_INFO "mpc_new_length is %ld, please use alloc_mptable=8k\n", 1009 mpc_new_length); 1010 } 1011 1012 if (!mpc_new_phys) { 1013 unsigned char old, new; 1014 /* check if we can change the postion */ 1015 mpc->checksum = 0; 1016 old = mpf_checksum((unsigned char *)mpc, mpc->length); 1017 mpc->checksum = 0xff; 1018 new = mpf_checksum((unsigned char *)mpc, mpc->length); 1019 if (old == new) { 1020 printk(KERN_INFO "mpc is readonly, please try alloc_mptable instead\n"); 1021 return 0; 1022 } 1023 printk(KERN_INFO "use in-positon replacing\n"); 1024 } else { 1025 mpf->physptr = mpc_new_phys; 1026 mpc_new = phys_to_virt(mpc_new_phys); 1027 memcpy(mpc_new, mpc, mpc->length); 1028 mpc = mpc_new; 1029 /* check if we can modify that */ 1030 if (mpc_new_phys - mpf->physptr) { 1031 struct mpf_intel *mpf_new; 1032 /* steal 16 bytes from [0, 1k) */ 1033 printk(KERN_INFO "mpf new: %x\n", 0x400 - 16); 1034 mpf_new = phys_to_virt(0x400 - 16); 1035 memcpy(mpf_new, mpf, 16); 1036 mpf = mpf_new; 1037 mpf->physptr = mpc_new_phys; 1038 } 1039 mpf->checksum = 0; 1040 mpf->checksum -= mpf_checksum((unsigned char *)mpf, 16); 1041 printk(KERN_INFO "physptr new: %x\n", mpf->physptr); 1042 } 1043 1044 /* 1045 * only replace the one with mp_INT and 1046 * MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 1047 * already in mp_irqs , stored by ... and mp_config_acpi_gsi, 1048 * may need pci=routeirq for all coverage 1049 */ 1050 replace_intsrc_all(mpc, mpc_new_phys, mpc_new_length); 1051 1052 return 0; 1053 } 1054 1055 late_initcall(update_mp_table); 1056