1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Intel Multiprocessor Specification 1.1 and 1.4 4 * compliant MP-table parsing routines. 5 * 6 * (c) 1995 Alan Cox, Building #3 <alan@lxorguk.ukuu.org.uk> 7 * (c) 1998, 1999, 2000, 2009 Ingo Molnar <mingo@redhat.com> 8 * (c) 2008 Alexey Starikovskiy <astarikovskiy@suse.de> 9 */ 10 11 #include <linux/mm.h> 12 #include <linux/init.h> 13 #include <linux/delay.h> 14 #include <linux/memblock.h> 15 #include <linux/kernel_stat.h> 16 #include <linux/mc146818rtc.h> 17 #include <linux/bitops.h> 18 #include <linux/acpi.h> 19 #include <linux/smp.h> 20 #include <linux/pci.h> 21 22 #include <asm/irqdomain.h> 23 #include <asm/mtrr.h> 24 #include <asm/mpspec.h> 25 #include <asm/pgalloc.h> 26 #include <asm/io_apic.h> 27 #include <asm/proto.h> 28 #include <asm/bios_ebda.h> 29 #include <asm/e820/api.h> 30 #include <asm/setup.h> 31 #include <asm/smp.h> 32 33 #include <asm/apic.h> 34 /* 35 * Checksum an MP configuration block. 36 */ 37 38 static int __init mpf_checksum(unsigned char *mp, int len) 39 { 40 int sum = 0; 41 42 while (len--) 43 sum += *mp++; 44 45 return sum & 0xFF; 46 } 47 48 int __init default_mpc_apic_id(struct mpc_cpu *m) 49 { 50 return m->apicid; 51 } 52 53 static void __init MP_processor_info(struct mpc_cpu *m) 54 { 55 int apicid; 56 char *bootup_cpu = ""; 57 58 if (!(m->cpuflag & CPU_ENABLED)) { 59 disabled_cpus++; 60 return; 61 } 62 63 apicid = x86_init.mpparse.mpc_apic_id(m); 64 65 if (m->cpuflag & CPU_BOOTPROCESSOR) { 66 bootup_cpu = " (Bootup-CPU)"; 67 boot_cpu_physical_apicid = m->apicid; 68 } 69 70 pr_info("Processor #%d%s\n", m->apicid, bootup_cpu); 71 generic_processor_info(apicid, m->apicver); 72 } 73 74 #ifdef CONFIG_X86_IO_APIC 75 void __init default_mpc_oem_bus_info(struct mpc_bus *m, char *str) 76 { 77 memcpy(str, m->bustype, 6); 78 str[6] = 0; 79 apic_printk(APIC_VERBOSE, "Bus #%d is %s\n", m->busid, str); 80 } 81 82 static void __init MP_bus_info(struct mpc_bus *m) 83 { 84 char str[7]; 85 86 x86_init.mpparse.mpc_oem_bus_info(m, str); 87 88 #if MAX_MP_BUSSES < 256 89 if (m->busid >= MAX_MP_BUSSES) { 90 pr_warn("MP table busid value (%d) for bustype %s is too large, max. supported is %d\n", 91 m->busid, str, MAX_MP_BUSSES - 1); 92 return; 93 } 94 #endif 95 96 set_bit(m->busid, mp_bus_not_pci); 97 if (strncmp(str, BUSTYPE_ISA, sizeof(BUSTYPE_ISA) - 1) == 0) { 98 #ifdef CONFIG_EISA 99 mp_bus_id_to_type[m->busid] = MP_BUS_ISA; 100 #endif 101 } else if (strncmp(str, BUSTYPE_PCI, sizeof(BUSTYPE_PCI) - 1) == 0) { 102 if (x86_init.mpparse.mpc_oem_pci_bus) 103 x86_init.mpparse.mpc_oem_pci_bus(m); 104 105 clear_bit(m->busid, mp_bus_not_pci); 106 #ifdef CONFIG_EISA 107 mp_bus_id_to_type[m->busid] = MP_BUS_PCI; 108 } else if (strncmp(str, BUSTYPE_EISA, sizeof(BUSTYPE_EISA) - 1) == 0) { 109 mp_bus_id_to_type[m->busid] = MP_BUS_EISA; 110 #endif 111 } else 112 pr_warn("Unknown bustype %s - ignoring\n", str); 113 } 114 115 static void __init MP_ioapic_info(struct mpc_ioapic *m) 116 { 117 struct ioapic_domain_cfg cfg = { 118 .type = IOAPIC_DOMAIN_LEGACY, 119 .ops = &mp_ioapic_irqdomain_ops, 120 }; 121 122 if (m->flags & MPC_APIC_USABLE) 123 mp_register_ioapic(m->apicid, m->apicaddr, gsi_top, &cfg); 124 } 125 126 static void __init print_mp_irq_info(struct mpc_intsrc *mp_irq) 127 { 128 apic_printk(APIC_VERBOSE, 129 "Int: type %d, pol %d, trig %d, bus %02x, IRQ %02x, APIC ID %x, APIC INT %02x\n", 130 mp_irq->irqtype, mp_irq->irqflag & 3, 131 (mp_irq->irqflag >> 2) & 3, mp_irq->srcbus, 132 mp_irq->srcbusirq, mp_irq->dstapic, mp_irq->dstirq); 133 } 134 135 #else /* CONFIG_X86_IO_APIC */ 136 static inline void __init MP_bus_info(struct mpc_bus *m) {} 137 static inline void __init MP_ioapic_info(struct mpc_ioapic *m) {} 138 #endif /* CONFIG_X86_IO_APIC */ 139 140 static void __init MP_lintsrc_info(struct mpc_lintsrc *m) 141 { 142 apic_printk(APIC_VERBOSE, 143 "Lint: type %d, pol %d, trig %d, bus %02x, IRQ %02x, APIC ID %x, APIC LINT %02x\n", 144 m->irqtype, m->irqflag & 3, (m->irqflag >> 2) & 3, m->srcbusid, 145 m->srcbusirq, m->destapic, m->destapiclint); 146 } 147 148 /* 149 * Read/parse the MPC 150 */ 151 static int __init smp_check_mpc(struct mpc_table *mpc, char *oem, char *str) 152 { 153 154 if (memcmp(mpc->signature, MPC_SIGNATURE, 4)) { 155 pr_err("MPTABLE: bad signature [%c%c%c%c]!\n", 156 mpc->signature[0], mpc->signature[1], 157 mpc->signature[2], mpc->signature[3]); 158 return 0; 159 } 160 if (mpf_checksum((unsigned char *)mpc, mpc->length)) { 161 pr_err("MPTABLE: checksum error!\n"); 162 return 0; 163 } 164 if (mpc->spec != 0x01 && mpc->spec != 0x04) { 165 pr_err("MPTABLE: bad table version (%d)!!\n", mpc->spec); 166 return 0; 167 } 168 if (!mpc->lapic) { 169 pr_err("MPTABLE: null local APIC address!\n"); 170 return 0; 171 } 172 memcpy(oem, mpc->oem, 8); 173 oem[8] = 0; 174 pr_info("MPTABLE: OEM ID: %s\n", oem); 175 176 memcpy(str, mpc->productid, 12); 177 str[12] = 0; 178 179 pr_info("MPTABLE: Product ID: %s\n", str); 180 181 pr_info("MPTABLE: APIC at: 0x%X\n", mpc->lapic); 182 183 return 1; 184 } 185 186 static void skip_entry(unsigned char **ptr, int *count, int size) 187 { 188 *ptr += size; 189 *count += size; 190 } 191 192 static void __init smp_dump_mptable(struct mpc_table *mpc, unsigned char *mpt) 193 { 194 pr_err("Your mptable is wrong, contact your HW vendor!\n"); 195 pr_cont("type %x\n", *mpt); 196 print_hex_dump(KERN_ERR, " ", DUMP_PREFIX_ADDRESS, 16, 197 1, mpc, mpc->length, 1); 198 } 199 200 void __init default_smp_read_mpc_oem(struct mpc_table *mpc) { } 201 202 static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early) 203 { 204 char str[16]; 205 char oem[10]; 206 207 int count = sizeof(*mpc); 208 unsigned char *mpt = ((unsigned char *)mpc) + count; 209 210 if (!smp_check_mpc(mpc, oem, str)) 211 return 0; 212 213 /* Initialize the lapic mapping */ 214 if (!acpi_lapic) 215 register_lapic_address(mpc->lapic); 216 217 if (early) 218 return 1; 219 220 if (mpc->oemptr) 221 x86_init.mpparse.smp_read_mpc_oem(mpc); 222 223 /* 224 * Now process the configuration blocks. 225 */ 226 x86_init.mpparse.mpc_record(0); 227 228 while (count < mpc->length) { 229 switch (*mpt) { 230 case MP_PROCESSOR: 231 /* ACPI may have already provided this data */ 232 if (!acpi_lapic) 233 MP_processor_info((struct mpc_cpu *)mpt); 234 skip_entry(&mpt, &count, sizeof(struct mpc_cpu)); 235 break; 236 case MP_BUS: 237 MP_bus_info((struct mpc_bus *)mpt); 238 skip_entry(&mpt, &count, sizeof(struct mpc_bus)); 239 break; 240 case MP_IOAPIC: 241 MP_ioapic_info((struct mpc_ioapic *)mpt); 242 skip_entry(&mpt, &count, sizeof(struct mpc_ioapic)); 243 break; 244 case MP_INTSRC: 245 mp_save_irq((struct mpc_intsrc *)mpt); 246 skip_entry(&mpt, &count, sizeof(struct mpc_intsrc)); 247 break; 248 case MP_LINTSRC: 249 MP_lintsrc_info((struct mpc_lintsrc *)mpt); 250 skip_entry(&mpt, &count, sizeof(struct mpc_lintsrc)); 251 break; 252 default: 253 /* wrong mptable */ 254 smp_dump_mptable(mpc, mpt); 255 count = mpc->length; 256 break; 257 } 258 x86_init.mpparse.mpc_record(1); 259 } 260 261 if (!num_processors) 262 pr_err("MPTABLE: no processors registered!\n"); 263 return num_processors; 264 } 265 266 #ifdef CONFIG_X86_IO_APIC 267 268 static int __init ELCR_trigger(unsigned int irq) 269 { 270 unsigned int port; 271 272 port = 0x4d0 + (irq >> 3); 273 return (inb(port) >> (irq & 7)) & 1; 274 } 275 276 static void __init construct_default_ioirq_mptable(int mpc_default_type) 277 { 278 struct mpc_intsrc intsrc; 279 int i; 280 int ELCR_fallback = 0; 281 282 intsrc.type = MP_INTSRC; 283 intsrc.irqflag = MP_IRQTRIG_DEFAULT | MP_IRQPOL_DEFAULT; 284 intsrc.srcbus = 0; 285 intsrc.dstapic = mpc_ioapic_id(0); 286 287 intsrc.irqtype = mp_INT; 288 289 /* 290 * If true, we have an ISA/PCI system with no IRQ entries 291 * in the MP table. To prevent the PCI interrupts from being set up 292 * incorrectly, we try to use the ELCR. The sanity check to see if 293 * there is good ELCR data is very simple - IRQ0, 1, 2 and 13 can 294 * never be level sensitive, so we simply see if the ELCR agrees. 295 * If it does, we assume it's valid. 296 */ 297 if (mpc_default_type == 5) { 298 pr_info("ISA/PCI bus type with no IRQ information... falling back to ELCR\n"); 299 300 if (ELCR_trigger(0) || ELCR_trigger(1) || ELCR_trigger(2) || 301 ELCR_trigger(13)) 302 pr_err("ELCR contains invalid data... not using ELCR\n"); 303 else { 304 pr_info("Using ELCR to identify PCI interrupts\n"); 305 ELCR_fallback = 1; 306 } 307 } 308 309 for (i = 0; i < 16; i++) { 310 switch (mpc_default_type) { 311 case 2: 312 if (i == 0 || i == 13) 313 continue; /* IRQ0 & IRQ13 not connected */ 314 /* fall through */ 315 default: 316 if (i == 2) 317 continue; /* IRQ2 is never connected */ 318 } 319 320 if (ELCR_fallback) { 321 /* 322 * If the ELCR indicates a level-sensitive interrupt, we 323 * copy that information over to the MP table in the 324 * irqflag field (level sensitive, active high polarity). 325 */ 326 if (ELCR_trigger(i)) { 327 intsrc.irqflag = MP_IRQTRIG_LEVEL | 328 MP_IRQPOL_ACTIVE_HIGH; 329 } else { 330 intsrc.irqflag = MP_IRQTRIG_DEFAULT | 331 MP_IRQPOL_DEFAULT; 332 } 333 } 334 335 intsrc.srcbusirq = i; 336 intsrc.dstirq = i ? i : 2; /* IRQ0 to INTIN2 */ 337 mp_save_irq(&intsrc); 338 } 339 340 intsrc.irqtype = mp_ExtINT; 341 intsrc.srcbusirq = 0; 342 intsrc.dstirq = 0; /* 8259A to INTIN0 */ 343 mp_save_irq(&intsrc); 344 } 345 346 347 static void __init construct_ioapic_table(int mpc_default_type) 348 { 349 struct mpc_ioapic ioapic; 350 struct mpc_bus bus; 351 352 bus.type = MP_BUS; 353 bus.busid = 0; 354 switch (mpc_default_type) { 355 default: 356 pr_err("???\nUnknown standard configuration %d\n", 357 mpc_default_type); 358 /* fall through */ 359 case 1: 360 case 5: 361 memcpy(bus.bustype, "ISA ", 6); 362 break; 363 case 2: 364 case 6: 365 case 3: 366 memcpy(bus.bustype, "EISA ", 6); 367 break; 368 } 369 MP_bus_info(&bus); 370 if (mpc_default_type > 4) { 371 bus.busid = 1; 372 memcpy(bus.bustype, "PCI ", 6); 373 MP_bus_info(&bus); 374 } 375 376 ioapic.type = MP_IOAPIC; 377 ioapic.apicid = 2; 378 ioapic.apicver = mpc_default_type > 4 ? 0x10 : 0x01; 379 ioapic.flags = MPC_APIC_USABLE; 380 ioapic.apicaddr = IO_APIC_DEFAULT_PHYS_BASE; 381 MP_ioapic_info(&ioapic); 382 383 /* 384 * We set up most of the low 16 IO-APIC pins according to MPS rules. 385 */ 386 construct_default_ioirq_mptable(mpc_default_type); 387 } 388 #else 389 static inline void __init construct_ioapic_table(int mpc_default_type) { } 390 #endif 391 392 static inline void __init construct_default_ISA_mptable(int mpc_default_type) 393 { 394 struct mpc_cpu processor; 395 struct mpc_lintsrc lintsrc; 396 int linttypes[2] = { mp_ExtINT, mp_NMI }; 397 int i; 398 399 /* 400 * local APIC has default address 401 */ 402 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE; 403 404 /* 405 * 2 CPUs, numbered 0 & 1. 406 */ 407 processor.type = MP_PROCESSOR; 408 /* Either an integrated APIC or a discrete 82489DX. */ 409 processor.apicver = mpc_default_type > 4 ? 0x10 : 0x01; 410 processor.cpuflag = CPU_ENABLED; 411 processor.cpufeature = (boot_cpu_data.x86 << 8) | 412 (boot_cpu_data.x86_model << 4) | boot_cpu_data.x86_stepping; 413 processor.featureflag = boot_cpu_data.x86_capability[CPUID_1_EDX]; 414 processor.reserved[0] = 0; 415 processor.reserved[1] = 0; 416 for (i = 0; i < 2; i++) { 417 processor.apicid = i; 418 MP_processor_info(&processor); 419 } 420 421 construct_ioapic_table(mpc_default_type); 422 423 lintsrc.type = MP_LINTSRC; 424 lintsrc.irqflag = MP_IRQTRIG_DEFAULT | MP_IRQPOL_DEFAULT; 425 lintsrc.srcbusid = 0; 426 lintsrc.srcbusirq = 0; 427 lintsrc.destapic = MP_APIC_ALL; 428 for (i = 0; i < 2; i++) { 429 lintsrc.irqtype = linttypes[i]; 430 lintsrc.destapiclint = i; 431 MP_lintsrc_info(&lintsrc); 432 } 433 } 434 435 static unsigned long mpf_base; 436 static bool mpf_found; 437 438 static unsigned long __init get_mpc_size(unsigned long physptr) 439 { 440 struct mpc_table *mpc; 441 unsigned long size; 442 443 mpc = early_memremap(physptr, PAGE_SIZE); 444 size = mpc->length; 445 early_memunmap(mpc, PAGE_SIZE); 446 apic_printk(APIC_VERBOSE, " mpc: %lx-%lx\n", physptr, physptr + size); 447 448 return size; 449 } 450 451 static int __init check_physptr(struct mpf_intel *mpf, unsigned int early) 452 { 453 struct mpc_table *mpc; 454 unsigned long size; 455 456 size = get_mpc_size(mpf->physptr); 457 mpc = early_memremap(mpf->physptr, size); 458 459 /* 460 * Read the physical hardware table. Anything here will 461 * override the defaults. 462 */ 463 if (!smp_read_mpc(mpc, early)) { 464 #ifdef CONFIG_X86_LOCAL_APIC 465 smp_found_config = 0; 466 #endif 467 pr_err("BIOS bug, MP table errors detected!...\n"); 468 pr_cont("... disabling SMP support. (tell your hw vendor)\n"); 469 early_memunmap(mpc, size); 470 return -1; 471 } 472 early_memunmap(mpc, size); 473 474 if (early) 475 return -1; 476 477 #ifdef CONFIG_X86_IO_APIC 478 /* 479 * If there are no explicit MP IRQ entries, then we are 480 * broken. We set up most of the low 16 IO-APIC pins to 481 * ISA defaults and hope it will work. 482 */ 483 if (!mp_irq_entries) { 484 struct mpc_bus bus; 485 486 pr_err("BIOS bug, no explicit IRQ entries, using default mptable. (tell your hw vendor)\n"); 487 488 bus.type = MP_BUS; 489 bus.busid = 0; 490 memcpy(bus.bustype, "ISA ", 6); 491 MP_bus_info(&bus); 492 493 construct_default_ioirq_mptable(0); 494 } 495 #endif 496 497 return 0; 498 } 499 500 /* 501 * Scan the memory blocks for an SMP configuration block. 502 */ 503 void __init default_get_smp_config(unsigned int early) 504 { 505 struct mpf_intel *mpf; 506 507 if (!smp_found_config) 508 return; 509 510 if (!mpf_found) 511 return; 512 513 if (acpi_lapic && early) 514 return; 515 516 /* 517 * MPS doesn't support hyperthreading, aka only have 518 * thread 0 apic id in MPS table 519 */ 520 if (acpi_lapic && acpi_ioapic) 521 return; 522 523 mpf = early_memremap(mpf_base, sizeof(*mpf)); 524 if (!mpf) { 525 pr_err("MPTABLE: error mapping MP table\n"); 526 return; 527 } 528 529 pr_info("Intel MultiProcessor Specification v1.%d\n", 530 mpf->specification); 531 #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32) 532 if (mpf->feature2 & (1 << 7)) { 533 pr_info(" IMCR and PIC compatibility mode.\n"); 534 pic_mode = 1; 535 } else { 536 pr_info(" Virtual Wire compatibility mode.\n"); 537 pic_mode = 0; 538 } 539 #endif 540 /* 541 * Now see if we need to read further. 542 */ 543 if (mpf->feature1) { 544 if (early) { 545 /* 546 * local APIC has default address 547 */ 548 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE; 549 return; 550 } 551 552 pr_info("Default MP configuration #%d\n", mpf->feature1); 553 construct_default_ISA_mptable(mpf->feature1); 554 555 } else if (mpf->physptr) { 556 if (check_physptr(mpf, early)) { 557 early_memunmap(mpf, sizeof(*mpf)); 558 return; 559 } 560 } else 561 BUG(); 562 563 if (!early) 564 pr_info("Processors: %d\n", num_processors); 565 /* 566 * Only use the first configuration found. 567 */ 568 569 early_memunmap(mpf, sizeof(*mpf)); 570 } 571 572 static void __init smp_reserve_memory(struct mpf_intel *mpf) 573 { 574 memblock_reserve(mpf->physptr, get_mpc_size(mpf->physptr)); 575 } 576 577 static int __init smp_scan_config(unsigned long base, unsigned long length) 578 { 579 unsigned int *bp; 580 struct mpf_intel *mpf; 581 int ret = 0; 582 583 apic_printk(APIC_VERBOSE, "Scan for SMP in [mem %#010lx-%#010lx]\n", 584 base, base + length - 1); 585 BUILD_BUG_ON(sizeof(*mpf) != 16); 586 587 while (length > 0) { 588 bp = early_memremap(base, length); 589 mpf = (struct mpf_intel *)bp; 590 if ((*bp == SMP_MAGIC_IDENT) && 591 (mpf->length == 1) && 592 !mpf_checksum((unsigned char *)bp, 16) && 593 ((mpf->specification == 1) 594 || (mpf->specification == 4))) { 595 #ifdef CONFIG_X86_LOCAL_APIC 596 smp_found_config = 1; 597 #endif 598 mpf_base = base; 599 mpf_found = true; 600 601 pr_info("found SMP MP-table at [mem %#010lx-%#010lx]\n", 602 base, base + sizeof(*mpf) - 1); 603 604 memblock_reserve(base, sizeof(*mpf)); 605 if (mpf->physptr) 606 smp_reserve_memory(mpf); 607 608 ret = 1; 609 } 610 early_memunmap(bp, length); 611 612 if (ret) 613 break; 614 615 base += 16; 616 length -= 16; 617 } 618 return ret; 619 } 620 621 void __init default_find_smp_config(void) 622 { 623 unsigned int address; 624 625 /* 626 * FIXME: Linux assumes you have 640K of base ram.. 627 * this continues the error... 628 * 629 * 1) Scan the bottom 1K for a signature 630 * 2) Scan the top 1K of base RAM 631 * 3) Scan the 64K of bios 632 */ 633 if (smp_scan_config(0x0, 0x400) || 634 smp_scan_config(639 * 0x400, 0x400) || 635 smp_scan_config(0xF0000, 0x10000)) 636 return; 637 /* 638 * If it is an SMP machine we should know now, unless the 639 * configuration is in an EISA bus machine with an 640 * extended bios data area. 641 * 642 * there is a real-mode segmented pointer pointing to the 643 * 4K EBDA area at 0x40E, calculate and scan it here. 644 * 645 * NOTE! There are Linux loaders that will corrupt the EBDA 646 * area, and as such this kind of SMP config may be less 647 * trustworthy, simply because the SMP table may have been 648 * stomped on during early boot. These loaders are buggy and 649 * should be fixed. 650 * 651 * MP1.4 SPEC states to only scan first 1K of 4K EBDA. 652 */ 653 654 address = get_bios_ebda(); 655 if (address) 656 smp_scan_config(address, 0x400); 657 } 658 659 #ifdef CONFIG_X86_IO_APIC 660 static u8 __initdata irq_used[MAX_IRQ_SOURCES]; 661 662 static int __init get_MP_intsrc_index(struct mpc_intsrc *m) 663 { 664 int i; 665 666 if (m->irqtype != mp_INT) 667 return 0; 668 669 if (m->irqflag != (MP_IRQTRIG_LEVEL | MP_IRQPOL_ACTIVE_LOW)) 670 return 0; 671 672 /* not legacy */ 673 674 for (i = 0; i < mp_irq_entries; i++) { 675 if (mp_irqs[i].irqtype != mp_INT) 676 continue; 677 678 if (mp_irqs[i].irqflag != (MP_IRQTRIG_LEVEL | 679 MP_IRQPOL_ACTIVE_LOW)) 680 continue; 681 682 if (mp_irqs[i].srcbus != m->srcbus) 683 continue; 684 if (mp_irqs[i].srcbusirq != m->srcbusirq) 685 continue; 686 if (irq_used[i]) { 687 /* already claimed */ 688 return -2; 689 } 690 irq_used[i] = 1; 691 return i; 692 } 693 694 /* not found */ 695 return -1; 696 } 697 698 #define SPARE_SLOT_NUM 20 699 700 static struct mpc_intsrc __initdata *m_spare[SPARE_SLOT_NUM]; 701 702 static void __init check_irq_src(struct mpc_intsrc *m, int *nr_m_spare) 703 { 704 int i; 705 706 apic_printk(APIC_VERBOSE, "OLD "); 707 print_mp_irq_info(m); 708 709 i = get_MP_intsrc_index(m); 710 if (i > 0) { 711 memcpy(m, &mp_irqs[i], sizeof(*m)); 712 apic_printk(APIC_VERBOSE, "NEW "); 713 print_mp_irq_info(&mp_irqs[i]); 714 return; 715 } 716 if (!i) { 717 /* legacy, do nothing */ 718 return; 719 } 720 if (*nr_m_spare < SPARE_SLOT_NUM) { 721 /* 722 * not found (-1), or duplicated (-2) are invalid entries, 723 * we need to use the slot later 724 */ 725 m_spare[*nr_m_spare] = m; 726 *nr_m_spare += 1; 727 } 728 } 729 730 static int __init 731 check_slot(unsigned long mpc_new_phys, unsigned long mpc_new_length, int count) 732 { 733 if (!mpc_new_phys || count <= mpc_new_length) { 734 WARN(1, "update_mptable: No spare slots (length: %x)\n", count); 735 return -1; 736 } 737 738 return 0; 739 } 740 #else /* CONFIG_X86_IO_APIC */ 741 static 742 inline void __init check_irq_src(struct mpc_intsrc *m, int *nr_m_spare) {} 743 #endif /* CONFIG_X86_IO_APIC */ 744 745 static int __init replace_intsrc_all(struct mpc_table *mpc, 746 unsigned long mpc_new_phys, 747 unsigned long mpc_new_length) 748 { 749 #ifdef CONFIG_X86_IO_APIC 750 int i; 751 #endif 752 int count = sizeof(*mpc); 753 int nr_m_spare = 0; 754 unsigned char *mpt = ((unsigned char *)mpc) + count; 755 756 pr_info("mpc_length %x\n", mpc->length); 757 while (count < mpc->length) { 758 switch (*mpt) { 759 case MP_PROCESSOR: 760 skip_entry(&mpt, &count, sizeof(struct mpc_cpu)); 761 break; 762 case MP_BUS: 763 skip_entry(&mpt, &count, sizeof(struct mpc_bus)); 764 break; 765 case MP_IOAPIC: 766 skip_entry(&mpt, &count, sizeof(struct mpc_ioapic)); 767 break; 768 case MP_INTSRC: 769 check_irq_src((struct mpc_intsrc *)mpt, &nr_m_spare); 770 skip_entry(&mpt, &count, sizeof(struct mpc_intsrc)); 771 break; 772 case MP_LINTSRC: 773 skip_entry(&mpt, &count, sizeof(struct mpc_lintsrc)); 774 break; 775 default: 776 /* wrong mptable */ 777 smp_dump_mptable(mpc, mpt); 778 goto out; 779 } 780 } 781 782 #ifdef CONFIG_X86_IO_APIC 783 for (i = 0; i < mp_irq_entries; i++) { 784 if (irq_used[i]) 785 continue; 786 787 if (mp_irqs[i].irqtype != mp_INT) 788 continue; 789 790 if (mp_irqs[i].irqflag != (MP_IRQTRIG_LEVEL | 791 MP_IRQPOL_ACTIVE_LOW)) 792 continue; 793 794 if (nr_m_spare > 0) { 795 apic_printk(APIC_VERBOSE, "*NEW* found\n"); 796 nr_m_spare--; 797 memcpy(m_spare[nr_m_spare], &mp_irqs[i], sizeof(mp_irqs[i])); 798 m_spare[nr_m_spare] = NULL; 799 } else { 800 struct mpc_intsrc *m = (struct mpc_intsrc *)mpt; 801 count += sizeof(struct mpc_intsrc); 802 if (check_slot(mpc_new_phys, mpc_new_length, count) < 0) 803 goto out; 804 memcpy(m, &mp_irqs[i], sizeof(*m)); 805 mpc->length = count; 806 mpt += sizeof(struct mpc_intsrc); 807 } 808 print_mp_irq_info(&mp_irqs[i]); 809 } 810 #endif 811 out: 812 /* update checksum */ 813 mpc->checksum = 0; 814 mpc->checksum -= mpf_checksum((unsigned char *)mpc, mpc->length); 815 816 return 0; 817 } 818 819 int enable_update_mptable; 820 821 static int __init update_mptable_setup(char *str) 822 { 823 enable_update_mptable = 1; 824 #ifdef CONFIG_PCI 825 pci_routeirq = 1; 826 #endif 827 return 0; 828 } 829 early_param("update_mptable", update_mptable_setup); 830 831 static unsigned long __initdata mpc_new_phys; 832 static unsigned long mpc_new_length __initdata = 4096; 833 834 /* alloc_mptable or alloc_mptable=4k */ 835 static int __initdata alloc_mptable; 836 static int __init parse_alloc_mptable_opt(char *p) 837 { 838 enable_update_mptable = 1; 839 #ifdef CONFIG_PCI 840 pci_routeirq = 1; 841 #endif 842 alloc_mptable = 1; 843 if (!p) 844 return 0; 845 mpc_new_length = memparse(p, &p); 846 return 0; 847 } 848 early_param("alloc_mptable", parse_alloc_mptable_opt); 849 850 void __init e820__memblock_alloc_reserved_mpc_new(void) 851 { 852 if (enable_update_mptable && alloc_mptable) 853 mpc_new_phys = e820__memblock_alloc_reserved(mpc_new_length, 4); 854 } 855 856 static int __init update_mp_table(void) 857 { 858 char str[16]; 859 char oem[10]; 860 struct mpf_intel *mpf; 861 struct mpc_table *mpc, *mpc_new; 862 unsigned long size; 863 864 if (!enable_update_mptable) 865 return 0; 866 867 if (!mpf_found) 868 return 0; 869 870 mpf = early_memremap(mpf_base, sizeof(*mpf)); 871 if (!mpf) { 872 pr_err("MPTABLE: mpf early_memremap() failed\n"); 873 return 0; 874 } 875 876 /* 877 * Now see if we need to go further. 878 */ 879 if (mpf->feature1) 880 goto do_unmap_mpf; 881 882 if (!mpf->physptr) 883 goto do_unmap_mpf; 884 885 size = get_mpc_size(mpf->physptr); 886 mpc = early_memremap(mpf->physptr, size); 887 if (!mpc) { 888 pr_err("MPTABLE: mpc early_memremap() failed\n"); 889 goto do_unmap_mpf; 890 } 891 892 if (!smp_check_mpc(mpc, oem, str)) 893 goto do_unmap_mpc; 894 895 pr_info("mpf: %llx\n", (u64)mpf_base); 896 pr_info("physptr: %x\n", mpf->physptr); 897 898 if (mpc_new_phys && mpc->length > mpc_new_length) { 899 mpc_new_phys = 0; 900 pr_info("mpc_new_length is %ld, please use alloc_mptable=8k\n", 901 mpc_new_length); 902 } 903 904 if (!mpc_new_phys) { 905 unsigned char old, new; 906 /* check if we can change the position */ 907 mpc->checksum = 0; 908 old = mpf_checksum((unsigned char *)mpc, mpc->length); 909 mpc->checksum = 0xff; 910 new = mpf_checksum((unsigned char *)mpc, mpc->length); 911 if (old == new) { 912 pr_info("mpc is readonly, please try alloc_mptable instead\n"); 913 goto do_unmap_mpc; 914 } 915 pr_info("use in-position replacing\n"); 916 } else { 917 mpc_new = early_memremap(mpc_new_phys, mpc_new_length); 918 if (!mpc_new) { 919 pr_err("MPTABLE: new mpc early_memremap() failed\n"); 920 goto do_unmap_mpc; 921 } 922 mpf->physptr = mpc_new_phys; 923 memcpy(mpc_new, mpc, mpc->length); 924 early_memunmap(mpc, size); 925 mpc = mpc_new; 926 size = mpc_new_length; 927 /* check if we can modify that */ 928 if (mpc_new_phys - mpf->physptr) { 929 struct mpf_intel *mpf_new; 930 /* steal 16 bytes from [0, 1k) */ 931 mpf_new = early_memremap(0x400 - 16, sizeof(*mpf_new)); 932 if (!mpf_new) { 933 pr_err("MPTABLE: new mpf early_memremap() failed\n"); 934 goto do_unmap_mpc; 935 } 936 pr_info("mpf new: %x\n", 0x400 - 16); 937 memcpy(mpf_new, mpf, 16); 938 early_memunmap(mpf, sizeof(*mpf)); 939 mpf = mpf_new; 940 mpf->physptr = mpc_new_phys; 941 } 942 mpf->checksum = 0; 943 mpf->checksum -= mpf_checksum((unsigned char *)mpf, 16); 944 pr_info("physptr new: %x\n", mpf->physptr); 945 } 946 947 /* 948 * only replace the one with mp_INT and 949 * MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 950 * already in mp_irqs , stored by ... and mp_config_acpi_gsi, 951 * may need pci=routeirq for all coverage 952 */ 953 replace_intsrc_all(mpc, mpc_new_phys, mpc_new_length); 954 955 do_unmap_mpc: 956 early_memunmap(mpc, size); 957 958 do_unmap_mpf: 959 early_memunmap(mpf, sizeof(*mpf)); 960 961 return 0; 962 } 963 964 late_initcall(update_mp_table); 965