1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Intel Multiprocessor Specification 1.1 and 1.4 4 * compliant MP-table parsing routines. 5 * 6 * (c) 1995 Alan Cox, Building #3 <alan@lxorguk.ukuu.org.uk> 7 * (c) 1998, 1999, 2000, 2009 Ingo Molnar <mingo@redhat.com> 8 * (c) 2008 Alexey Starikovskiy <astarikovskiy@suse.de> 9 */ 10 11 #include <linux/mm.h> 12 #include <linux/init.h> 13 #include <linux/delay.h> 14 #include <linux/bootmem.h> 15 #include <linux/memblock.h> 16 #include <linux/kernel_stat.h> 17 #include <linux/mc146818rtc.h> 18 #include <linux/bitops.h> 19 #include <linux/acpi.h> 20 #include <linux/smp.h> 21 #include <linux/pci.h> 22 23 #include <asm/irqdomain.h> 24 #include <asm/mtrr.h> 25 #include <asm/mpspec.h> 26 #include <asm/pgalloc.h> 27 #include <asm/io_apic.h> 28 #include <asm/proto.h> 29 #include <asm/bios_ebda.h> 30 #include <asm/e820/api.h> 31 #include <asm/setup.h> 32 #include <asm/smp.h> 33 34 #include <asm/apic.h> 35 /* 36 * Checksum an MP configuration block. 37 */ 38 39 static int __init mpf_checksum(unsigned char *mp, int len) 40 { 41 int sum = 0; 42 43 while (len--) 44 sum += *mp++; 45 46 return sum & 0xFF; 47 } 48 49 int __init default_mpc_apic_id(struct mpc_cpu *m) 50 { 51 return m->apicid; 52 } 53 54 static void __init MP_processor_info(struct mpc_cpu *m) 55 { 56 int apicid; 57 char *bootup_cpu = ""; 58 59 if (!(m->cpuflag & CPU_ENABLED)) { 60 disabled_cpus++; 61 return; 62 } 63 64 apicid = x86_init.mpparse.mpc_apic_id(m); 65 66 if (m->cpuflag & CPU_BOOTPROCESSOR) { 67 bootup_cpu = " (Bootup-CPU)"; 68 boot_cpu_physical_apicid = m->apicid; 69 } 70 71 pr_info("Processor #%d%s\n", m->apicid, bootup_cpu); 72 generic_processor_info(apicid, m->apicver); 73 } 74 75 #ifdef CONFIG_X86_IO_APIC 76 void __init default_mpc_oem_bus_info(struct mpc_bus *m, char *str) 77 { 78 memcpy(str, m->bustype, 6); 79 str[6] = 0; 80 apic_printk(APIC_VERBOSE, "Bus #%d is %s\n", m->busid, str); 81 } 82 83 static void __init MP_bus_info(struct mpc_bus *m) 84 { 85 char str[7]; 86 87 x86_init.mpparse.mpc_oem_bus_info(m, str); 88 89 #if MAX_MP_BUSSES < 256 90 if (m->busid >= MAX_MP_BUSSES) { 91 pr_warn("MP table busid value (%d) for bustype %s is too large, max. supported is %d\n", 92 m->busid, str, MAX_MP_BUSSES - 1); 93 return; 94 } 95 #endif 96 97 set_bit(m->busid, mp_bus_not_pci); 98 if (strncmp(str, BUSTYPE_ISA, sizeof(BUSTYPE_ISA) - 1) == 0) { 99 #ifdef CONFIG_EISA 100 mp_bus_id_to_type[m->busid] = MP_BUS_ISA; 101 #endif 102 } else if (strncmp(str, BUSTYPE_PCI, sizeof(BUSTYPE_PCI) - 1) == 0) { 103 if (x86_init.mpparse.mpc_oem_pci_bus) 104 x86_init.mpparse.mpc_oem_pci_bus(m); 105 106 clear_bit(m->busid, mp_bus_not_pci); 107 #ifdef CONFIG_EISA 108 mp_bus_id_to_type[m->busid] = MP_BUS_PCI; 109 } else if (strncmp(str, BUSTYPE_EISA, sizeof(BUSTYPE_EISA) - 1) == 0) { 110 mp_bus_id_to_type[m->busid] = MP_BUS_EISA; 111 #endif 112 } else 113 pr_warn("Unknown bustype %s - ignoring\n", str); 114 } 115 116 static void __init MP_ioapic_info(struct mpc_ioapic *m) 117 { 118 struct ioapic_domain_cfg cfg = { 119 .type = IOAPIC_DOMAIN_LEGACY, 120 .ops = &mp_ioapic_irqdomain_ops, 121 }; 122 123 if (m->flags & MPC_APIC_USABLE) 124 mp_register_ioapic(m->apicid, m->apicaddr, gsi_top, &cfg); 125 } 126 127 static void __init print_mp_irq_info(struct mpc_intsrc *mp_irq) 128 { 129 apic_printk(APIC_VERBOSE, 130 "Int: type %d, pol %d, trig %d, bus %02x, IRQ %02x, APIC ID %x, APIC INT %02x\n", 131 mp_irq->irqtype, mp_irq->irqflag & 3, 132 (mp_irq->irqflag >> 2) & 3, mp_irq->srcbus, 133 mp_irq->srcbusirq, mp_irq->dstapic, mp_irq->dstirq); 134 } 135 136 #else /* CONFIG_X86_IO_APIC */ 137 static inline void __init MP_bus_info(struct mpc_bus *m) {} 138 static inline void __init MP_ioapic_info(struct mpc_ioapic *m) {} 139 #endif /* CONFIG_X86_IO_APIC */ 140 141 static void __init MP_lintsrc_info(struct mpc_lintsrc *m) 142 { 143 apic_printk(APIC_VERBOSE, 144 "Lint: type %d, pol %d, trig %d, bus %02x, IRQ %02x, APIC ID %x, APIC LINT %02x\n", 145 m->irqtype, m->irqflag & 3, (m->irqflag >> 2) & 3, m->srcbusid, 146 m->srcbusirq, m->destapic, m->destapiclint); 147 } 148 149 /* 150 * Read/parse the MPC 151 */ 152 static int __init smp_check_mpc(struct mpc_table *mpc, char *oem, char *str) 153 { 154 155 if (memcmp(mpc->signature, MPC_SIGNATURE, 4)) { 156 pr_err("MPTABLE: bad signature [%c%c%c%c]!\n", 157 mpc->signature[0], mpc->signature[1], 158 mpc->signature[2], mpc->signature[3]); 159 return 0; 160 } 161 if (mpf_checksum((unsigned char *)mpc, mpc->length)) { 162 pr_err("MPTABLE: checksum error!\n"); 163 return 0; 164 } 165 if (mpc->spec != 0x01 && mpc->spec != 0x04) { 166 pr_err("MPTABLE: bad table version (%d)!!\n", mpc->spec); 167 return 0; 168 } 169 if (!mpc->lapic) { 170 pr_err("MPTABLE: null local APIC address!\n"); 171 return 0; 172 } 173 memcpy(oem, mpc->oem, 8); 174 oem[8] = 0; 175 pr_info("MPTABLE: OEM ID: %s\n", oem); 176 177 memcpy(str, mpc->productid, 12); 178 str[12] = 0; 179 180 pr_info("MPTABLE: Product ID: %s\n", str); 181 182 pr_info("MPTABLE: APIC at: 0x%X\n", mpc->lapic); 183 184 return 1; 185 } 186 187 static void skip_entry(unsigned char **ptr, int *count, int size) 188 { 189 *ptr += size; 190 *count += size; 191 } 192 193 static void __init smp_dump_mptable(struct mpc_table *mpc, unsigned char *mpt) 194 { 195 pr_err("Your mptable is wrong, contact your HW vendor!\n"); 196 pr_cont("type %x\n", *mpt); 197 print_hex_dump(KERN_ERR, " ", DUMP_PREFIX_ADDRESS, 16, 198 1, mpc, mpc->length, 1); 199 } 200 201 void __init default_smp_read_mpc_oem(struct mpc_table *mpc) { } 202 203 static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early) 204 { 205 char str[16]; 206 char oem[10]; 207 208 int count = sizeof(*mpc); 209 unsigned char *mpt = ((unsigned char *)mpc) + count; 210 211 if (!smp_check_mpc(mpc, oem, str)) 212 return 0; 213 214 /* Initialize the lapic mapping */ 215 if (!acpi_lapic) 216 register_lapic_address(mpc->lapic); 217 218 if (early) 219 return 1; 220 221 if (mpc->oemptr) 222 x86_init.mpparse.smp_read_mpc_oem(mpc); 223 224 /* 225 * Now process the configuration blocks. 226 */ 227 x86_init.mpparse.mpc_record(0); 228 229 while (count < mpc->length) { 230 switch (*mpt) { 231 case MP_PROCESSOR: 232 /* ACPI may have already provided this data */ 233 if (!acpi_lapic) 234 MP_processor_info((struct mpc_cpu *)mpt); 235 skip_entry(&mpt, &count, sizeof(struct mpc_cpu)); 236 break; 237 case MP_BUS: 238 MP_bus_info((struct mpc_bus *)mpt); 239 skip_entry(&mpt, &count, sizeof(struct mpc_bus)); 240 break; 241 case MP_IOAPIC: 242 MP_ioapic_info((struct mpc_ioapic *)mpt); 243 skip_entry(&mpt, &count, sizeof(struct mpc_ioapic)); 244 break; 245 case MP_INTSRC: 246 mp_save_irq((struct mpc_intsrc *)mpt); 247 skip_entry(&mpt, &count, sizeof(struct mpc_intsrc)); 248 break; 249 case MP_LINTSRC: 250 MP_lintsrc_info((struct mpc_lintsrc *)mpt); 251 skip_entry(&mpt, &count, sizeof(struct mpc_lintsrc)); 252 break; 253 default: 254 /* wrong mptable */ 255 smp_dump_mptable(mpc, mpt); 256 count = mpc->length; 257 break; 258 } 259 x86_init.mpparse.mpc_record(1); 260 } 261 262 if (!num_processors) 263 pr_err("MPTABLE: no processors registered!\n"); 264 return num_processors; 265 } 266 267 #ifdef CONFIG_X86_IO_APIC 268 269 static int __init ELCR_trigger(unsigned int irq) 270 { 271 unsigned int port; 272 273 port = 0x4d0 + (irq >> 3); 274 return (inb(port) >> (irq & 7)) & 1; 275 } 276 277 static void __init construct_default_ioirq_mptable(int mpc_default_type) 278 { 279 struct mpc_intsrc intsrc; 280 int i; 281 int ELCR_fallback = 0; 282 283 intsrc.type = MP_INTSRC; 284 intsrc.irqflag = 0; /* conforming */ 285 intsrc.srcbus = 0; 286 intsrc.dstapic = mpc_ioapic_id(0); 287 288 intsrc.irqtype = mp_INT; 289 290 /* 291 * If true, we have an ISA/PCI system with no IRQ entries 292 * in the MP table. To prevent the PCI interrupts from being set up 293 * incorrectly, we try to use the ELCR. The sanity check to see if 294 * there is good ELCR data is very simple - IRQ0, 1, 2 and 13 can 295 * never be level sensitive, so we simply see if the ELCR agrees. 296 * If it does, we assume it's valid. 297 */ 298 if (mpc_default_type == 5) { 299 pr_info("ISA/PCI bus type with no IRQ information... falling back to ELCR\n"); 300 301 if (ELCR_trigger(0) || ELCR_trigger(1) || ELCR_trigger(2) || 302 ELCR_trigger(13)) 303 pr_err("ELCR contains invalid data... not using ELCR\n"); 304 else { 305 pr_info("Using ELCR to identify PCI interrupts\n"); 306 ELCR_fallback = 1; 307 } 308 } 309 310 for (i = 0; i < 16; i++) { 311 switch (mpc_default_type) { 312 case 2: 313 if (i == 0 || i == 13) 314 continue; /* IRQ0 & IRQ13 not connected */ 315 /* fall through */ 316 default: 317 if (i == 2) 318 continue; /* IRQ2 is never connected */ 319 } 320 321 if (ELCR_fallback) { 322 /* 323 * If the ELCR indicates a level-sensitive interrupt, we 324 * copy that information over to the MP table in the 325 * irqflag field (level sensitive, active high polarity). 326 */ 327 if (ELCR_trigger(i)) 328 intsrc.irqflag = 13; 329 else 330 intsrc.irqflag = 0; 331 } 332 333 intsrc.srcbusirq = i; 334 intsrc.dstirq = i ? i : 2; /* IRQ0 to INTIN2 */ 335 mp_save_irq(&intsrc); 336 } 337 338 intsrc.irqtype = mp_ExtINT; 339 intsrc.srcbusirq = 0; 340 intsrc.dstirq = 0; /* 8259A to INTIN0 */ 341 mp_save_irq(&intsrc); 342 } 343 344 345 static void __init construct_ioapic_table(int mpc_default_type) 346 { 347 struct mpc_ioapic ioapic; 348 struct mpc_bus bus; 349 350 bus.type = MP_BUS; 351 bus.busid = 0; 352 switch (mpc_default_type) { 353 default: 354 pr_err("???\nUnknown standard configuration %d\n", 355 mpc_default_type); 356 /* fall through */ 357 case 1: 358 case 5: 359 memcpy(bus.bustype, "ISA ", 6); 360 break; 361 case 2: 362 case 6: 363 case 3: 364 memcpy(bus.bustype, "EISA ", 6); 365 break; 366 } 367 MP_bus_info(&bus); 368 if (mpc_default_type > 4) { 369 bus.busid = 1; 370 memcpy(bus.bustype, "PCI ", 6); 371 MP_bus_info(&bus); 372 } 373 374 ioapic.type = MP_IOAPIC; 375 ioapic.apicid = 2; 376 ioapic.apicver = mpc_default_type > 4 ? 0x10 : 0x01; 377 ioapic.flags = MPC_APIC_USABLE; 378 ioapic.apicaddr = IO_APIC_DEFAULT_PHYS_BASE; 379 MP_ioapic_info(&ioapic); 380 381 /* 382 * We set up most of the low 16 IO-APIC pins according to MPS rules. 383 */ 384 construct_default_ioirq_mptable(mpc_default_type); 385 } 386 #else 387 static inline void __init construct_ioapic_table(int mpc_default_type) { } 388 #endif 389 390 static inline void __init construct_default_ISA_mptable(int mpc_default_type) 391 { 392 struct mpc_cpu processor; 393 struct mpc_lintsrc lintsrc; 394 int linttypes[2] = { mp_ExtINT, mp_NMI }; 395 int i; 396 397 /* 398 * local APIC has default address 399 */ 400 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE; 401 402 /* 403 * 2 CPUs, numbered 0 & 1. 404 */ 405 processor.type = MP_PROCESSOR; 406 /* Either an integrated APIC or a discrete 82489DX. */ 407 processor.apicver = mpc_default_type > 4 ? 0x10 : 0x01; 408 processor.cpuflag = CPU_ENABLED; 409 processor.cpufeature = (boot_cpu_data.x86 << 8) | 410 (boot_cpu_data.x86_model << 4) | boot_cpu_data.x86_mask; 411 processor.featureflag = boot_cpu_data.x86_capability[CPUID_1_EDX]; 412 processor.reserved[0] = 0; 413 processor.reserved[1] = 0; 414 for (i = 0; i < 2; i++) { 415 processor.apicid = i; 416 MP_processor_info(&processor); 417 } 418 419 construct_ioapic_table(mpc_default_type); 420 421 lintsrc.type = MP_LINTSRC; 422 lintsrc.irqflag = 0; /* conforming */ 423 lintsrc.srcbusid = 0; 424 lintsrc.srcbusirq = 0; 425 lintsrc.destapic = MP_APIC_ALL; 426 for (i = 0; i < 2; i++) { 427 lintsrc.irqtype = linttypes[i]; 428 lintsrc.destapiclint = i; 429 MP_lintsrc_info(&lintsrc); 430 } 431 } 432 433 static unsigned long mpf_base; 434 static bool mpf_found; 435 436 static unsigned long __init get_mpc_size(unsigned long physptr) 437 { 438 struct mpc_table *mpc; 439 unsigned long size; 440 441 mpc = early_memremap(physptr, PAGE_SIZE); 442 size = mpc->length; 443 early_memunmap(mpc, PAGE_SIZE); 444 apic_printk(APIC_VERBOSE, " mpc: %lx-%lx\n", physptr, physptr + size); 445 446 return size; 447 } 448 449 static int __init check_physptr(struct mpf_intel *mpf, unsigned int early) 450 { 451 struct mpc_table *mpc; 452 unsigned long size; 453 454 size = get_mpc_size(mpf->physptr); 455 mpc = early_memremap(mpf->physptr, size); 456 457 /* 458 * Read the physical hardware table. Anything here will 459 * override the defaults. 460 */ 461 if (!smp_read_mpc(mpc, early)) { 462 #ifdef CONFIG_X86_LOCAL_APIC 463 smp_found_config = 0; 464 #endif 465 pr_err("BIOS bug, MP table errors detected!...\n"); 466 pr_cont("... disabling SMP support. (tell your hw vendor)\n"); 467 early_memunmap(mpc, size); 468 return -1; 469 } 470 early_memunmap(mpc, size); 471 472 if (early) 473 return -1; 474 475 #ifdef CONFIG_X86_IO_APIC 476 /* 477 * If there are no explicit MP IRQ entries, then we are 478 * broken. We set up most of the low 16 IO-APIC pins to 479 * ISA defaults and hope it will work. 480 */ 481 if (!mp_irq_entries) { 482 struct mpc_bus bus; 483 484 pr_err("BIOS bug, no explicit IRQ entries, using default mptable. (tell your hw vendor)\n"); 485 486 bus.type = MP_BUS; 487 bus.busid = 0; 488 memcpy(bus.bustype, "ISA ", 6); 489 MP_bus_info(&bus); 490 491 construct_default_ioirq_mptable(0); 492 } 493 #endif 494 495 return 0; 496 } 497 498 /* 499 * Scan the memory blocks for an SMP configuration block. 500 */ 501 void __init default_get_smp_config(unsigned int early) 502 { 503 struct mpf_intel *mpf; 504 505 if (!smp_found_config) 506 return; 507 508 if (!mpf_found) 509 return; 510 511 if (acpi_lapic && early) 512 return; 513 514 /* 515 * MPS doesn't support hyperthreading, aka only have 516 * thread 0 apic id in MPS table 517 */ 518 if (acpi_lapic && acpi_ioapic) 519 return; 520 521 mpf = early_memremap(mpf_base, sizeof(*mpf)); 522 if (!mpf) { 523 pr_err("MPTABLE: error mapping MP table\n"); 524 return; 525 } 526 527 pr_info("Intel MultiProcessor Specification v1.%d\n", 528 mpf->specification); 529 #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32) 530 if (mpf->feature2 & (1 << 7)) { 531 pr_info(" IMCR and PIC compatibility mode.\n"); 532 pic_mode = 1; 533 } else { 534 pr_info(" Virtual Wire compatibility mode.\n"); 535 pic_mode = 0; 536 } 537 #endif 538 /* 539 * Now see if we need to read further. 540 */ 541 if (mpf->feature1) { 542 if (early) { 543 /* 544 * local APIC has default address 545 */ 546 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE; 547 return; 548 } 549 550 pr_info("Default MP configuration #%d\n", mpf->feature1); 551 construct_default_ISA_mptable(mpf->feature1); 552 553 } else if (mpf->physptr) { 554 if (check_physptr(mpf, early)) { 555 early_memunmap(mpf, sizeof(*mpf)); 556 return; 557 } 558 } else 559 BUG(); 560 561 if (!early) 562 pr_info("Processors: %d\n", num_processors); 563 /* 564 * Only use the first configuration found. 565 */ 566 567 early_memunmap(mpf, sizeof(*mpf)); 568 } 569 570 static void __init smp_reserve_memory(struct mpf_intel *mpf) 571 { 572 memblock_reserve(mpf->physptr, get_mpc_size(mpf->physptr)); 573 } 574 575 static int __init smp_scan_config(unsigned long base, unsigned long length) 576 { 577 unsigned int *bp; 578 struct mpf_intel *mpf; 579 int ret = 0; 580 581 apic_printk(APIC_VERBOSE, "Scan for SMP in [mem %#010lx-%#010lx]\n", 582 base, base + length - 1); 583 BUILD_BUG_ON(sizeof(*mpf) != 16); 584 585 while (length > 0) { 586 bp = early_memremap(base, length); 587 mpf = (struct mpf_intel *)bp; 588 if ((*bp == SMP_MAGIC_IDENT) && 589 (mpf->length == 1) && 590 !mpf_checksum((unsigned char *)bp, 16) && 591 ((mpf->specification == 1) 592 || (mpf->specification == 4))) { 593 #ifdef CONFIG_X86_LOCAL_APIC 594 smp_found_config = 1; 595 #endif 596 mpf_base = base; 597 mpf_found = true; 598 599 pr_info("found SMP MP-table at [mem %#010lx-%#010lx] mapped at [%p]\n", 600 base, base + sizeof(*mpf) - 1, mpf); 601 602 memblock_reserve(base, sizeof(*mpf)); 603 if (mpf->physptr) 604 smp_reserve_memory(mpf); 605 606 ret = 1; 607 } 608 early_memunmap(bp, length); 609 610 if (ret) 611 break; 612 613 base += 16; 614 length -= 16; 615 } 616 return ret; 617 } 618 619 void __init default_find_smp_config(void) 620 { 621 unsigned int address; 622 623 /* 624 * FIXME: Linux assumes you have 640K of base ram.. 625 * this continues the error... 626 * 627 * 1) Scan the bottom 1K for a signature 628 * 2) Scan the top 1K of base RAM 629 * 3) Scan the 64K of bios 630 */ 631 if (smp_scan_config(0x0, 0x400) || 632 smp_scan_config(639 * 0x400, 0x400) || 633 smp_scan_config(0xF0000, 0x10000)) 634 return; 635 /* 636 * If it is an SMP machine we should know now, unless the 637 * configuration is in an EISA bus machine with an 638 * extended bios data area. 639 * 640 * there is a real-mode segmented pointer pointing to the 641 * 4K EBDA area at 0x40E, calculate and scan it here. 642 * 643 * NOTE! There are Linux loaders that will corrupt the EBDA 644 * area, and as such this kind of SMP config may be less 645 * trustworthy, simply because the SMP table may have been 646 * stomped on during early boot. These loaders are buggy and 647 * should be fixed. 648 * 649 * MP1.4 SPEC states to only scan first 1K of 4K EBDA. 650 */ 651 652 address = get_bios_ebda(); 653 if (address) 654 smp_scan_config(address, 0x400); 655 } 656 657 #ifdef CONFIG_X86_IO_APIC 658 static u8 __initdata irq_used[MAX_IRQ_SOURCES]; 659 660 static int __init get_MP_intsrc_index(struct mpc_intsrc *m) 661 { 662 int i; 663 664 if (m->irqtype != mp_INT) 665 return 0; 666 667 if (m->irqflag != 0x0f) 668 return 0; 669 670 /* not legacy */ 671 672 for (i = 0; i < mp_irq_entries; i++) { 673 if (mp_irqs[i].irqtype != mp_INT) 674 continue; 675 676 if (mp_irqs[i].irqflag != 0x0f) 677 continue; 678 679 if (mp_irqs[i].srcbus != m->srcbus) 680 continue; 681 if (mp_irqs[i].srcbusirq != m->srcbusirq) 682 continue; 683 if (irq_used[i]) { 684 /* already claimed */ 685 return -2; 686 } 687 irq_used[i] = 1; 688 return i; 689 } 690 691 /* not found */ 692 return -1; 693 } 694 695 #define SPARE_SLOT_NUM 20 696 697 static struct mpc_intsrc __initdata *m_spare[SPARE_SLOT_NUM]; 698 699 static void __init check_irq_src(struct mpc_intsrc *m, int *nr_m_spare) 700 { 701 int i; 702 703 apic_printk(APIC_VERBOSE, "OLD "); 704 print_mp_irq_info(m); 705 706 i = get_MP_intsrc_index(m); 707 if (i > 0) { 708 memcpy(m, &mp_irqs[i], sizeof(*m)); 709 apic_printk(APIC_VERBOSE, "NEW "); 710 print_mp_irq_info(&mp_irqs[i]); 711 return; 712 } 713 if (!i) { 714 /* legacy, do nothing */ 715 return; 716 } 717 if (*nr_m_spare < SPARE_SLOT_NUM) { 718 /* 719 * not found (-1), or duplicated (-2) are invalid entries, 720 * we need to use the slot later 721 */ 722 m_spare[*nr_m_spare] = m; 723 *nr_m_spare += 1; 724 } 725 } 726 727 static int __init 728 check_slot(unsigned long mpc_new_phys, unsigned long mpc_new_length, int count) 729 { 730 if (!mpc_new_phys || count <= mpc_new_length) { 731 WARN(1, "update_mptable: No spare slots (length: %x)\n", count); 732 return -1; 733 } 734 735 return 0; 736 } 737 #else /* CONFIG_X86_IO_APIC */ 738 static 739 inline void __init check_irq_src(struct mpc_intsrc *m, int *nr_m_spare) {} 740 #endif /* CONFIG_X86_IO_APIC */ 741 742 static int __init replace_intsrc_all(struct mpc_table *mpc, 743 unsigned long mpc_new_phys, 744 unsigned long mpc_new_length) 745 { 746 #ifdef CONFIG_X86_IO_APIC 747 int i; 748 #endif 749 int count = sizeof(*mpc); 750 int nr_m_spare = 0; 751 unsigned char *mpt = ((unsigned char *)mpc) + count; 752 753 pr_info("mpc_length %x\n", mpc->length); 754 while (count < mpc->length) { 755 switch (*mpt) { 756 case MP_PROCESSOR: 757 skip_entry(&mpt, &count, sizeof(struct mpc_cpu)); 758 break; 759 case MP_BUS: 760 skip_entry(&mpt, &count, sizeof(struct mpc_bus)); 761 break; 762 case MP_IOAPIC: 763 skip_entry(&mpt, &count, sizeof(struct mpc_ioapic)); 764 break; 765 case MP_INTSRC: 766 check_irq_src((struct mpc_intsrc *)mpt, &nr_m_spare); 767 skip_entry(&mpt, &count, sizeof(struct mpc_intsrc)); 768 break; 769 case MP_LINTSRC: 770 skip_entry(&mpt, &count, sizeof(struct mpc_lintsrc)); 771 break; 772 default: 773 /* wrong mptable */ 774 smp_dump_mptable(mpc, mpt); 775 goto out; 776 } 777 } 778 779 #ifdef CONFIG_X86_IO_APIC 780 for (i = 0; i < mp_irq_entries; i++) { 781 if (irq_used[i]) 782 continue; 783 784 if (mp_irqs[i].irqtype != mp_INT) 785 continue; 786 787 if (mp_irqs[i].irqflag != 0x0f) 788 continue; 789 790 if (nr_m_spare > 0) { 791 apic_printk(APIC_VERBOSE, "*NEW* found\n"); 792 nr_m_spare--; 793 memcpy(m_spare[nr_m_spare], &mp_irqs[i], sizeof(mp_irqs[i])); 794 m_spare[nr_m_spare] = NULL; 795 } else { 796 struct mpc_intsrc *m = (struct mpc_intsrc *)mpt; 797 count += sizeof(struct mpc_intsrc); 798 if (check_slot(mpc_new_phys, mpc_new_length, count) < 0) 799 goto out; 800 memcpy(m, &mp_irqs[i], sizeof(*m)); 801 mpc->length = count; 802 mpt += sizeof(struct mpc_intsrc); 803 } 804 print_mp_irq_info(&mp_irqs[i]); 805 } 806 #endif 807 out: 808 /* update checksum */ 809 mpc->checksum = 0; 810 mpc->checksum -= mpf_checksum((unsigned char *)mpc, mpc->length); 811 812 return 0; 813 } 814 815 int enable_update_mptable; 816 817 static int __init update_mptable_setup(char *str) 818 { 819 enable_update_mptable = 1; 820 #ifdef CONFIG_PCI 821 pci_routeirq = 1; 822 #endif 823 return 0; 824 } 825 early_param("update_mptable", update_mptable_setup); 826 827 static unsigned long __initdata mpc_new_phys; 828 static unsigned long mpc_new_length __initdata = 4096; 829 830 /* alloc_mptable or alloc_mptable=4k */ 831 static int __initdata alloc_mptable; 832 static int __init parse_alloc_mptable_opt(char *p) 833 { 834 enable_update_mptable = 1; 835 #ifdef CONFIG_PCI 836 pci_routeirq = 1; 837 #endif 838 alloc_mptable = 1; 839 if (!p) 840 return 0; 841 mpc_new_length = memparse(p, &p); 842 return 0; 843 } 844 early_param("alloc_mptable", parse_alloc_mptable_opt); 845 846 void __init e820__memblock_alloc_reserved_mpc_new(void) 847 { 848 if (enable_update_mptable && alloc_mptable) 849 mpc_new_phys = e820__memblock_alloc_reserved(mpc_new_length, 4); 850 } 851 852 static int __init update_mp_table(void) 853 { 854 char str[16]; 855 char oem[10]; 856 struct mpf_intel *mpf; 857 struct mpc_table *mpc, *mpc_new; 858 unsigned long size; 859 860 if (!enable_update_mptable) 861 return 0; 862 863 if (!mpf_found) 864 return 0; 865 866 mpf = early_memremap(mpf_base, sizeof(*mpf)); 867 if (!mpf) { 868 pr_err("MPTABLE: mpf early_memremap() failed\n"); 869 return 0; 870 } 871 872 /* 873 * Now see if we need to go further. 874 */ 875 if (mpf->feature1) 876 goto do_unmap_mpf; 877 878 if (!mpf->physptr) 879 goto do_unmap_mpf; 880 881 size = get_mpc_size(mpf->physptr); 882 mpc = early_memremap(mpf->physptr, size); 883 if (!mpc) { 884 pr_err("MPTABLE: mpc early_memremap() failed\n"); 885 goto do_unmap_mpf; 886 } 887 888 if (!smp_check_mpc(mpc, oem, str)) 889 goto do_unmap_mpc; 890 891 pr_info("mpf: %llx\n", (u64)mpf_base); 892 pr_info("physptr: %x\n", mpf->physptr); 893 894 if (mpc_new_phys && mpc->length > mpc_new_length) { 895 mpc_new_phys = 0; 896 pr_info("mpc_new_length is %ld, please use alloc_mptable=8k\n", 897 mpc_new_length); 898 } 899 900 if (!mpc_new_phys) { 901 unsigned char old, new; 902 /* check if we can change the position */ 903 mpc->checksum = 0; 904 old = mpf_checksum((unsigned char *)mpc, mpc->length); 905 mpc->checksum = 0xff; 906 new = mpf_checksum((unsigned char *)mpc, mpc->length); 907 if (old == new) { 908 pr_info("mpc is readonly, please try alloc_mptable instead\n"); 909 goto do_unmap_mpc; 910 } 911 pr_info("use in-position replacing\n"); 912 } else { 913 mpc_new = early_memremap(mpc_new_phys, mpc_new_length); 914 if (!mpc_new) { 915 pr_err("MPTABLE: new mpc early_memremap() failed\n"); 916 goto do_unmap_mpc; 917 } 918 mpf->physptr = mpc_new_phys; 919 memcpy(mpc_new, mpc, mpc->length); 920 early_memunmap(mpc, size); 921 mpc = mpc_new; 922 size = mpc_new_length; 923 /* check if we can modify that */ 924 if (mpc_new_phys - mpf->physptr) { 925 struct mpf_intel *mpf_new; 926 /* steal 16 bytes from [0, 1k) */ 927 mpf_new = early_memremap(0x400 - 16, sizeof(*mpf_new)); 928 if (!mpf_new) { 929 pr_err("MPTABLE: new mpf early_memremap() failed\n"); 930 goto do_unmap_mpc; 931 } 932 pr_info("mpf new: %x\n", 0x400 - 16); 933 memcpy(mpf_new, mpf, 16); 934 early_memunmap(mpf, sizeof(*mpf)); 935 mpf = mpf_new; 936 mpf->physptr = mpc_new_phys; 937 } 938 mpf->checksum = 0; 939 mpf->checksum -= mpf_checksum((unsigned char *)mpf, 16); 940 pr_info("physptr new: %x\n", mpf->physptr); 941 } 942 943 /* 944 * only replace the one with mp_INT and 945 * MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 946 * already in mp_irqs , stored by ... and mp_config_acpi_gsi, 947 * may need pci=routeirq for all coverage 948 */ 949 replace_intsrc_all(mpc, mpc_new_phys, mpc_new_length); 950 951 do_unmap_mpc: 952 early_memunmap(mpc, size); 953 954 do_unmap_mpf: 955 early_memunmap(mpf, sizeof(*mpf)); 956 957 return 0; 958 } 959 960 late_initcall(update_mp_table); 961