1 /* 2 * Intel Multiprocessor Specification 1.1 and 1.4 3 * compliant MP-table parsing routines. 4 * 5 * (c) 1995 Alan Cox, Building #3 <alan@lxorguk.ukuu.org.uk> 6 * (c) 1998, 1999, 2000, 2009 Ingo Molnar <mingo@redhat.com> 7 * (c) 2008 Alexey Starikovskiy <astarikovskiy@suse.de> 8 */ 9 10 #include <linux/mm.h> 11 #include <linux/init.h> 12 #include <linux/delay.h> 13 #include <linux/bootmem.h> 14 #include <linux/kernel_stat.h> 15 #include <linux/mc146818rtc.h> 16 #include <linux/bitops.h> 17 #include <linux/acpi.h> 18 #include <linux/module.h> 19 #include <linux/smp.h> 20 21 #include <asm/mtrr.h> 22 #include <asm/mpspec.h> 23 #include <asm/pgalloc.h> 24 #include <asm/io_apic.h> 25 #include <asm/proto.h> 26 #include <asm/bios_ebda.h> 27 #include <asm/e820.h> 28 #include <asm/trampoline.h> 29 #include <asm/setup.h> 30 #include <asm/smp.h> 31 32 #include <asm/apic.h> 33 /* 34 * Checksum an MP configuration block. 35 */ 36 37 static int __init mpf_checksum(unsigned char *mp, int len) 38 { 39 int sum = 0; 40 41 while (len--) 42 sum += *mp++; 43 44 return sum & 0xFF; 45 } 46 47 static void __init MP_processor_info(struct mpc_cpu *m) 48 { 49 int apicid; 50 char *bootup_cpu = ""; 51 52 if (!(m->cpuflag & CPU_ENABLED)) { 53 disabled_cpus++; 54 return; 55 } 56 57 if (x86_quirks->mpc_apic_id) 58 apicid = x86_quirks->mpc_apic_id(m); 59 else 60 apicid = m->apicid; 61 62 if (m->cpuflag & CPU_BOOTPROCESSOR) { 63 bootup_cpu = " (Bootup-CPU)"; 64 boot_cpu_physical_apicid = m->apicid; 65 } 66 67 printk(KERN_INFO "Processor #%d%s\n", m->apicid, bootup_cpu); 68 generic_processor_info(apicid, m->apicver); 69 } 70 71 #ifdef CONFIG_X86_IO_APIC 72 static void __init MP_bus_info(struct mpc_bus *m) 73 { 74 char str[7]; 75 memcpy(str, m->bustype, 6); 76 str[6] = 0; 77 78 if (x86_quirks->mpc_oem_bus_info) 79 x86_quirks->mpc_oem_bus_info(m, str); 80 else 81 apic_printk(APIC_VERBOSE, "Bus #%d is %s\n", m->busid, str); 82 83 #if MAX_MP_BUSSES < 256 84 if (m->busid >= MAX_MP_BUSSES) { 85 printk(KERN_WARNING "MP table busid value (%d) for bustype %s " 86 " is too large, max. supported is %d\n", 87 m->busid, str, MAX_MP_BUSSES - 1); 88 return; 89 } 90 #endif 91 92 if (strncmp(str, BUSTYPE_ISA, sizeof(BUSTYPE_ISA) - 1) == 0) { 93 set_bit(m->busid, mp_bus_not_pci); 94 #if defined(CONFIG_EISA) || defined(CONFIG_MCA) 95 mp_bus_id_to_type[m->busid] = MP_BUS_ISA; 96 #endif 97 } else if (strncmp(str, BUSTYPE_PCI, sizeof(BUSTYPE_PCI) - 1) == 0) { 98 if (x86_quirks->mpc_oem_pci_bus) 99 x86_quirks->mpc_oem_pci_bus(m); 100 101 clear_bit(m->busid, mp_bus_not_pci); 102 #if defined(CONFIG_EISA) || defined(CONFIG_MCA) 103 mp_bus_id_to_type[m->busid] = MP_BUS_PCI; 104 } else if (strncmp(str, BUSTYPE_EISA, sizeof(BUSTYPE_EISA) - 1) == 0) { 105 mp_bus_id_to_type[m->busid] = MP_BUS_EISA; 106 } else if (strncmp(str, BUSTYPE_MCA, sizeof(BUSTYPE_MCA) - 1) == 0) { 107 mp_bus_id_to_type[m->busid] = MP_BUS_MCA; 108 #endif 109 } else 110 printk(KERN_WARNING "Unknown bustype %s - ignoring\n", str); 111 } 112 113 static int bad_ioapic(unsigned long address) 114 { 115 if (nr_ioapics >= MAX_IO_APICS) { 116 printk(KERN_ERR "ERROR: Max # of I/O APICs (%d) exceeded " 117 "(found %d)\n", MAX_IO_APICS, nr_ioapics); 118 panic("Recompile kernel with bigger MAX_IO_APICS!\n"); 119 } 120 if (!address) { 121 printk(KERN_ERR "WARNING: Bogus (zero) I/O APIC address" 122 " found in table, skipping!\n"); 123 return 1; 124 } 125 return 0; 126 } 127 128 static void __init MP_ioapic_info(struct mpc_ioapic *m) 129 { 130 if (!(m->flags & MPC_APIC_USABLE)) 131 return; 132 133 printk(KERN_INFO "I/O APIC #%d Version %d at 0x%X.\n", 134 m->apicid, m->apicver, m->apicaddr); 135 136 if (bad_ioapic(m->apicaddr)) 137 return; 138 139 mp_ioapics[nr_ioapics].apicaddr = m->apicaddr; 140 mp_ioapics[nr_ioapics].apicid = m->apicid; 141 mp_ioapics[nr_ioapics].type = m->type; 142 mp_ioapics[nr_ioapics].apicver = m->apicver; 143 mp_ioapics[nr_ioapics].flags = m->flags; 144 nr_ioapics++; 145 } 146 147 static void print_MP_intsrc_info(struct mpc_intsrc *m) 148 { 149 apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x," 150 " IRQ %02x, APIC ID %x, APIC INT %02x\n", 151 m->irqtype, m->irqflag & 3, (m->irqflag >> 2) & 3, m->srcbus, 152 m->srcbusirq, m->dstapic, m->dstirq); 153 } 154 155 static void __init print_mp_irq_info(struct mpc_intsrc *mp_irq) 156 { 157 apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x," 158 " IRQ %02x, APIC ID %x, APIC INT %02x\n", 159 mp_irq->irqtype, mp_irq->irqflag & 3, 160 (mp_irq->irqflag >> 2) & 3, mp_irq->srcbus, 161 mp_irq->srcbusirq, mp_irq->dstapic, mp_irq->dstirq); 162 } 163 164 static void __init assign_to_mp_irq(struct mpc_intsrc *m, 165 struct mpc_intsrc *mp_irq) 166 { 167 mp_irq->dstapic = m->dstapic; 168 mp_irq->type = m->type; 169 mp_irq->irqtype = m->irqtype; 170 mp_irq->irqflag = m->irqflag; 171 mp_irq->srcbus = m->srcbus; 172 mp_irq->srcbusirq = m->srcbusirq; 173 mp_irq->dstirq = m->dstirq; 174 } 175 176 static void __init assign_to_mpc_intsrc(struct mpc_intsrc *mp_irq, 177 struct mpc_intsrc *m) 178 { 179 m->dstapic = mp_irq->dstapic; 180 m->type = mp_irq->type; 181 m->irqtype = mp_irq->irqtype; 182 m->irqflag = mp_irq->irqflag; 183 m->srcbus = mp_irq->srcbus; 184 m->srcbusirq = mp_irq->srcbusirq; 185 m->dstirq = mp_irq->dstirq; 186 } 187 188 static int __init mp_irq_mpc_intsrc_cmp(struct mpc_intsrc *mp_irq, 189 struct mpc_intsrc *m) 190 { 191 if (mp_irq->dstapic != m->dstapic) 192 return 1; 193 if (mp_irq->type != m->type) 194 return 2; 195 if (mp_irq->irqtype != m->irqtype) 196 return 3; 197 if (mp_irq->irqflag != m->irqflag) 198 return 4; 199 if (mp_irq->srcbus != m->srcbus) 200 return 5; 201 if (mp_irq->srcbusirq != m->srcbusirq) 202 return 6; 203 if (mp_irq->dstirq != m->dstirq) 204 return 7; 205 206 return 0; 207 } 208 209 static void __init MP_intsrc_info(struct mpc_intsrc *m) 210 { 211 int i; 212 213 print_MP_intsrc_info(m); 214 215 for (i = 0; i < mp_irq_entries; i++) { 216 if (!mp_irq_mpc_intsrc_cmp(&mp_irqs[i], m)) 217 return; 218 } 219 220 assign_to_mp_irq(m, &mp_irqs[mp_irq_entries]); 221 if (++mp_irq_entries == MAX_IRQ_SOURCES) 222 panic("Max # of irq sources exceeded!!\n"); 223 } 224 #else /* CONFIG_X86_IO_APIC */ 225 static inline void __init MP_bus_info(struct mpc_bus *m) {} 226 static inline void __init MP_ioapic_info(struct mpc_ioapic *m) {} 227 static inline void __init MP_intsrc_info(struct mpc_intsrc *m) {} 228 #endif /* CONFIG_X86_IO_APIC */ 229 230 231 static void __init MP_lintsrc_info(struct mpc_lintsrc *m) 232 { 233 apic_printk(APIC_VERBOSE, "Lint: type %d, pol %d, trig %d, bus %02x," 234 " IRQ %02x, APIC ID %x, APIC LINT %02x\n", 235 m->irqtype, m->irqflag & 3, (m->irqflag >> 2) & 3, m->srcbusid, 236 m->srcbusirq, m->destapic, m->destapiclint); 237 } 238 239 /* 240 * Read/parse the MPC 241 */ 242 243 static int __init smp_check_mpc(struct mpc_table *mpc, char *oem, char *str) 244 { 245 246 if (memcmp(mpc->signature, MPC_SIGNATURE, 4)) { 247 printk(KERN_ERR "MPTABLE: bad signature [%c%c%c%c]!\n", 248 mpc->signature[0], mpc->signature[1], 249 mpc->signature[2], mpc->signature[3]); 250 return 0; 251 } 252 if (mpf_checksum((unsigned char *)mpc, mpc->length)) { 253 printk(KERN_ERR "MPTABLE: checksum error!\n"); 254 return 0; 255 } 256 if (mpc->spec != 0x01 && mpc->spec != 0x04) { 257 printk(KERN_ERR "MPTABLE: bad table version (%d)!!\n", 258 mpc->spec); 259 return 0; 260 } 261 if (!mpc->lapic) { 262 printk(KERN_ERR "MPTABLE: null local APIC address!\n"); 263 return 0; 264 } 265 memcpy(oem, mpc->oem, 8); 266 oem[8] = 0; 267 printk(KERN_INFO "MPTABLE: OEM ID: %s\n", oem); 268 269 memcpy(str, mpc->productid, 12); 270 str[12] = 0; 271 272 printk(KERN_INFO "MPTABLE: Product ID: %s\n", str); 273 274 printk(KERN_INFO "MPTABLE: APIC at: 0x%X\n", mpc->lapic); 275 276 return 1; 277 } 278 279 static void skip_entry(unsigned char **ptr, int *count, int size) 280 { 281 *ptr += size; 282 *count += size; 283 } 284 285 static void __init smp_dump_mptable(struct mpc_table *mpc, unsigned char *mpt) 286 { 287 printk(KERN_ERR "Your mptable is wrong, contact your HW vendor!\n" 288 "type %x\n", *mpt); 289 print_hex_dump(KERN_ERR, " ", DUMP_PREFIX_ADDRESS, 16, 290 1, mpc, mpc->length, 1); 291 } 292 293 static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early) 294 { 295 char str[16]; 296 char oem[10]; 297 298 int count = sizeof(*mpc); 299 unsigned char *mpt = ((unsigned char *)mpc) + count; 300 301 if (!smp_check_mpc(mpc, oem, str)) 302 return 0; 303 304 #ifdef CONFIG_X86_32 305 generic_mps_oem_check(mpc, oem, str); 306 #endif 307 /* save the local APIC address, it might be non-default */ 308 if (!acpi_lapic) 309 mp_lapic_addr = mpc->lapic; 310 311 if (early) 312 return 1; 313 314 if (mpc->oemptr && x86_quirks->smp_read_mpc_oem) { 315 struct mpc_oemtable *oem_table = (void *)(long)mpc->oemptr; 316 x86_quirks->smp_read_mpc_oem(oem_table, mpc->oemsize); 317 } 318 319 /* 320 * Now process the configuration blocks. 321 */ 322 if (x86_quirks->mpc_record) 323 *x86_quirks->mpc_record = 0; 324 325 while (count < mpc->length) { 326 switch (*mpt) { 327 case MP_PROCESSOR: 328 /* ACPI may have already provided this data */ 329 if (!acpi_lapic) 330 MP_processor_info((struct mpc_cpu *)mpt); 331 skip_entry(&mpt, &count, sizeof(struct mpc_cpu)); 332 break; 333 case MP_BUS: 334 MP_bus_info((struct mpc_bus *)mpt); 335 skip_entry(&mpt, &count, sizeof(struct mpc_bus)); 336 break; 337 case MP_IOAPIC: 338 MP_ioapic_info((struct mpc_ioapic *)mpt); 339 skip_entry(&mpt, &count, sizeof(struct mpc_ioapic)); 340 break; 341 case MP_INTSRC: 342 MP_intsrc_info((struct mpc_intsrc *)mpt); 343 skip_entry(&mpt, &count, sizeof(struct mpc_intsrc)); 344 break; 345 case MP_LINTSRC: 346 MP_lintsrc_info((struct mpc_lintsrc *)mpt); 347 skip_entry(&mpt, &count, sizeof(struct mpc_lintsrc)); 348 break; 349 default: 350 /* wrong mptable */ 351 smp_dump_mptable(mpc, mpt); 352 count = mpc->length; 353 break; 354 } 355 if (x86_quirks->mpc_record) 356 (*x86_quirks->mpc_record)++; 357 } 358 359 #ifdef CONFIG_X86_BIGSMP 360 generic_bigsmp_probe(); 361 #endif 362 363 if (apic->setup_apic_routing) 364 apic->setup_apic_routing(); 365 366 if (!num_processors) 367 printk(KERN_ERR "MPTABLE: no processors registered!\n"); 368 return num_processors; 369 } 370 371 #ifdef CONFIG_X86_IO_APIC 372 373 static int __init ELCR_trigger(unsigned int irq) 374 { 375 unsigned int port; 376 377 port = 0x4d0 + (irq >> 3); 378 return (inb(port) >> (irq & 7)) & 1; 379 } 380 381 static void __init construct_default_ioirq_mptable(int mpc_default_type) 382 { 383 struct mpc_intsrc intsrc; 384 int i; 385 int ELCR_fallback = 0; 386 387 intsrc.type = MP_INTSRC; 388 intsrc.irqflag = 0; /* conforming */ 389 intsrc.srcbus = 0; 390 intsrc.dstapic = mp_ioapics[0].apicid; 391 392 intsrc.irqtype = mp_INT; 393 394 /* 395 * If true, we have an ISA/PCI system with no IRQ entries 396 * in the MP table. To prevent the PCI interrupts from being set up 397 * incorrectly, we try to use the ELCR. The sanity check to see if 398 * there is good ELCR data is very simple - IRQ0, 1, 2 and 13 can 399 * never be level sensitive, so we simply see if the ELCR agrees. 400 * If it does, we assume it's valid. 401 */ 402 if (mpc_default_type == 5) { 403 printk(KERN_INFO "ISA/PCI bus type with no IRQ information... " 404 "falling back to ELCR\n"); 405 406 if (ELCR_trigger(0) || ELCR_trigger(1) || ELCR_trigger(2) || 407 ELCR_trigger(13)) 408 printk(KERN_ERR "ELCR contains invalid data... " 409 "not using ELCR\n"); 410 else { 411 printk(KERN_INFO 412 "Using ELCR to identify PCI interrupts\n"); 413 ELCR_fallback = 1; 414 } 415 } 416 417 for (i = 0; i < 16; i++) { 418 switch (mpc_default_type) { 419 case 2: 420 if (i == 0 || i == 13) 421 continue; /* IRQ0 & IRQ13 not connected */ 422 /* fall through */ 423 default: 424 if (i == 2) 425 continue; /* IRQ2 is never connected */ 426 } 427 428 if (ELCR_fallback) { 429 /* 430 * If the ELCR indicates a level-sensitive interrupt, we 431 * copy that information over to the MP table in the 432 * irqflag field (level sensitive, active high polarity). 433 */ 434 if (ELCR_trigger(i)) 435 intsrc.irqflag = 13; 436 else 437 intsrc.irqflag = 0; 438 } 439 440 intsrc.srcbusirq = i; 441 intsrc.dstirq = i ? i : 2; /* IRQ0 to INTIN2 */ 442 MP_intsrc_info(&intsrc); 443 } 444 445 intsrc.irqtype = mp_ExtINT; 446 intsrc.srcbusirq = 0; 447 intsrc.dstirq = 0; /* 8259A to INTIN0 */ 448 MP_intsrc_info(&intsrc); 449 } 450 451 452 static void __init construct_ioapic_table(int mpc_default_type) 453 { 454 struct mpc_ioapic ioapic; 455 struct mpc_bus bus; 456 457 bus.type = MP_BUS; 458 bus.busid = 0; 459 switch (mpc_default_type) { 460 default: 461 printk(KERN_ERR "???\nUnknown standard configuration %d\n", 462 mpc_default_type); 463 /* fall through */ 464 case 1: 465 case 5: 466 memcpy(bus.bustype, "ISA ", 6); 467 break; 468 case 2: 469 case 6: 470 case 3: 471 memcpy(bus.bustype, "EISA ", 6); 472 break; 473 case 4: 474 case 7: 475 memcpy(bus.bustype, "MCA ", 6); 476 } 477 MP_bus_info(&bus); 478 if (mpc_default_type > 4) { 479 bus.busid = 1; 480 memcpy(bus.bustype, "PCI ", 6); 481 MP_bus_info(&bus); 482 } 483 484 ioapic.type = MP_IOAPIC; 485 ioapic.apicid = 2; 486 ioapic.apicver = mpc_default_type > 4 ? 0x10 : 0x01; 487 ioapic.flags = MPC_APIC_USABLE; 488 ioapic.apicaddr = 0xFEC00000; 489 MP_ioapic_info(&ioapic); 490 491 /* 492 * We set up most of the low 16 IO-APIC pins according to MPS rules. 493 */ 494 construct_default_ioirq_mptable(mpc_default_type); 495 } 496 #else 497 static inline void __init construct_ioapic_table(int mpc_default_type) { } 498 #endif 499 500 static inline void __init construct_default_ISA_mptable(int mpc_default_type) 501 { 502 struct mpc_cpu processor; 503 struct mpc_lintsrc lintsrc; 504 int linttypes[2] = { mp_ExtINT, mp_NMI }; 505 int i; 506 507 /* 508 * local APIC has default address 509 */ 510 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE; 511 512 /* 513 * 2 CPUs, numbered 0 & 1. 514 */ 515 processor.type = MP_PROCESSOR; 516 /* Either an integrated APIC or a discrete 82489DX. */ 517 processor.apicver = mpc_default_type > 4 ? 0x10 : 0x01; 518 processor.cpuflag = CPU_ENABLED; 519 processor.cpufeature = (boot_cpu_data.x86 << 8) | 520 (boot_cpu_data.x86_model << 4) | boot_cpu_data.x86_mask; 521 processor.featureflag = boot_cpu_data.x86_capability[0]; 522 processor.reserved[0] = 0; 523 processor.reserved[1] = 0; 524 for (i = 0; i < 2; i++) { 525 processor.apicid = i; 526 MP_processor_info(&processor); 527 } 528 529 construct_ioapic_table(mpc_default_type); 530 531 lintsrc.type = MP_LINTSRC; 532 lintsrc.irqflag = 0; /* conforming */ 533 lintsrc.srcbusid = 0; 534 lintsrc.srcbusirq = 0; 535 lintsrc.destapic = MP_APIC_ALL; 536 for (i = 0; i < 2; i++) { 537 lintsrc.irqtype = linttypes[i]; 538 lintsrc.destapiclint = i; 539 MP_lintsrc_info(&lintsrc); 540 } 541 } 542 543 static struct mpf_intel *mpf_found; 544 545 static unsigned long __init get_mpc_size(unsigned long physptr) 546 { 547 struct mpc_table *mpc; 548 unsigned long size; 549 550 mpc = early_ioremap(physptr, PAGE_SIZE); 551 size = mpc->length; 552 early_iounmap(mpc, PAGE_SIZE); 553 apic_printk(APIC_VERBOSE, " mpc: %lx-%lx\n", physptr, physptr + size); 554 555 return size; 556 } 557 558 static int __init check_physptr(struct mpf_intel *mpf, unsigned int early) 559 { 560 struct mpc_table *mpc; 561 unsigned long size; 562 563 size = get_mpc_size(mpf->physptr); 564 mpc = early_ioremap(mpf->physptr, size); 565 /* 566 * Read the physical hardware table. Anything here will 567 * override the defaults. 568 */ 569 if (!smp_read_mpc(mpc, early)) { 570 #ifdef CONFIG_X86_LOCAL_APIC 571 smp_found_config = 0; 572 #endif 573 printk(KERN_ERR "BIOS bug, MP table errors detected!...\n" 574 "... disabling SMP support. (tell your hw vendor)\n"); 575 early_iounmap(mpc, size); 576 return -1; 577 } 578 early_iounmap(mpc, size); 579 580 if (early) 581 return -1; 582 583 #ifdef CONFIG_X86_IO_APIC 584 /* 585 * If there are no explicit MP IRQ entries, then we are 586 * broken. We set up most of the low 16 IO-APIC pins to 587 * ISA defaults and hope it will work. 588 */ 589 if (!mp_irq_entries) { 590 struct mpc_bus bus; 591 592 printk(KERN_ERR "BIOS bug, no explicit IRQ entries, " 593 "using default mptable. (tell your hw vendor)\n"); 594 595 bus.type = MP_BUS; 596 bus.busid = 0; 597 memcpy(bus.bustype, "ISA ", 6); 598 MP_bus_info(&bus); 599 600 construct_default_ioirq_mptable(0); 601 } 602 #endif 603 604 return 0; 605 } 606 607 /* 608 * Scan the memory blocks for an SMP configuration block. 609 */ 610 static void __init __get_smp_config(unsigned int early) 611 { 612 struct mpf_intel *mpf = mpf_found; 613 614 if (!mpf) 615 return; 616 617 if (acpi_lapic && early) 618 return; 619 620 /* 621 * MPS doesn't support hyperthreading, aka only have 622 * thread 0 apic id in MPS table 623 */ 624 if (acpi_lapic && acpi_ioapic) 625 return; 626 627 if (x86_quirks->mach_get_smp_config) { 628 if (x86_quirks->mach_get_smp_config(early)) 629 return; 630 } 631 632 printk(KERN_INFO "Intel MultiProcessor Specification v1.%d\n", 633 mpf->specification); 634 #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32) 635 if (mpf->feature2 & (1 << 7)) { 636 printk(KERN_INFO " IMCR and PIC compatibility mode.\n"); 637 pic_mode = 1; 638 } else { 639 printk(KERN_INFO " Virtual Wire compatibility mode.\n"); 640 pic_mode = 0; 641 } 642 #endif 643 /* 644 * Now see if we need to read further. 645 */ 646 if (mpf->feature1 != 0) { 647 if (early) { 648 /* 649 * local APIC has default address 650 */ 651 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE; 652 return; 653 } 654 655 printk(KERN_INFO "Default MP configuration #%d\n", 656 mpf->feature1); 657 construct_default_ISA_mptable(mpf->feature1); 658 659 } else if (mpf->physptr) { 660 if (check_physptr(mpf, early)) 661 return; 662 } else 663 BUG(); 664 665 if (!early) 666 printk(KERN_INFO "Processors: %d\n", num_processors); 667 /* 668 * Only use the first configuration found. 669 */ 670 } 671 672 void __init early_get_smp_config(void) 673 { 674 __get_smp_config(1); 675 } 676 677 void __init get_smp_config(void) 678 { 679 __get_smp_config(0); 680 } 681 682 static void __init smp_reserve_bootmem(struct mpf_intel *mpf) 683 { 684 unsigned long size = get_mpc_size(mpf->physptr); 685 #ifdef CONFIG_X86_32 686 /* 687 * We cannot access to MPC table to compute table size yet, 688 * as only few megabytes from the bottom is mapped now. 689 * PC-9800's MPC table places on the very last of physical 690 * memory; so that simply reserving PAGE_SIZE from mpf->physptr 691 * yields BUG() in reserve_bootmem. 692 * also need to make sure physptr is below than max_low_pfn 693 * we don't need reserve the area above max_low_pfn 694 */ 695 unsigned long end = max_low_pfn * PAGE_SIZE; 696 697 if (mpf->physptr < end) { 698 if (mpf->physptr + size > end) 699 size = end - mpf->physptr; 700 reserve_bootmem_generic(mpf->physptr, size, BOOTMEM_DEFAULT); 701 } 702 #else 703 reserve_bootmem_generic(mpf->physptr, size, BOOTMEM_DEFAULT); 704 #endif 705 } 706 707 static int __init smp_scan_config(unsigned long base, unsigned long length, 708 unsigned reserve) 709 { 710 unsigned int *bp = phys_to_virt(base); 711 struct mpf_intel *mpf; 712 713 apic_printk(APIC_VERBOSE, "Scan SMP from %p for %ld bytes.\n", 714 bp, length); 715 BUILD_BUG_ON(sizeof(*mpf) != 16); 716 717 while (length > 0) { 718 mpf = (struct mpf_intel *)bp; 719 if ((*bp == SMP_MAGIC_IDENT) && 720 (mpf->length == 1) && 721 !mpf_checksum((unsigned char *)bp, 16) && 722 ((mpf->specification == 1) 723 || (mpf->specification == 4))) { 724 #ifdef CONFIG_X86_LOCAL_APIC 725 smp_found_config = 1; 726 #endif 727 mpf_found = mpf; 728 729 printk(KERN_INFO "found SMP MP-table at [%p] %llx\n", 730 mpf, (u64)virt_to_phys(mpf)); 731 732 if (!reserve) 733 return 1; 734 reserve_bootmem_generic(virt_to_phys(mpf), sizeof(*mpf), 735 BOOTMEM_DEFAULT); 736 if (mpf->physptr) 737 smp_reserve_bootmem(mpf); 738 739 return 1; 740 } 741 bp += 4; 742 length -= 16; 743 } 744 return 0; 745 } 746 747 static void __init __find_smp_config(unsigned int reserve) 748 { 749 unsigned int address; 750 751 if (x86_quirks->mach_find_smp_config) { 752 if (x86_quirks->mach_find_smp_config(reserve)) 753 return; 754 } 755 /* 756 * FIXME: Linux assumes you have 640K of base ram.. 757 * this continues the error... 758 * 759 * 1) Scan the bottom 1K for a signature 760 * 2) Scan the top 1K of base RAM 761 * 3) Scan the 64K of bios 762 */ 763 if (smp_scan_config(0x0, 0x400, reserve) || 764 smp_scan_config(639 * 0x400, 0x400, reserve) || 765 smp_scan_config(0xF0000, 0x10000, reserve)) 766 return; 767 /* 768 * If it is an SMP machine we should know now, unless the 769 * configuration is in an EISA/MCA bus machine with an 770 * extended bios data area. 771 * 772 * there is a real-mode segmented pointer pointing to the 773 * 4K EBDA area at 0x40E, calculate and scan it here. 774 * 775 * NOTE! There are Linux loaders that will corrupt the EBDA 776 * area, and as such this kind of SMP config may be less 777 * trustworthy, simply because the SMP table may have been 778 * stomped on during early boot. These loaders are buggy and 779 * should be fixed. 780 * 781 * MP1.4 SPEC states to only scan first 1K of 4K EBDA. 782 */ 783 784 address = get_bios_ebda(); 785 if (address) 786 smp_scan_config(address, 0x400, reserve); 787 } 788 789 void __init early_find_smp_config(void) 790 { 791 __find_smp_config(0); 792 } 793 794 void __init find_smp_config(void) 795 { 796 __find_smp_config(1); 797 } 798 799 #ifdef CONFIG_X86_IO_APIC 800 static u8 __initdata irq_used[MAX_IRQ_SOURCES]; 801 802 static int __init get_MP_intsrc_index(struct mpc_intsrc *m) 803 { 804 int i; 805 806 if (m->irqtype != mp_INT) 807 return 0; 808 809 if (m->irqflag != 0x0f) 810 return 0; 811 812 /* not legacy */ 813 814 for (i = 0; i < mp_irq_entries; i++) { 815 if (mp_irqs[i].irqtype != mp_INT) 816 continue; 817 818 if (mp_irqs[i].irqflag != 0x0f) 819 continue; 820 821 if (mp_irqs[i].srcbus != m->srcbus) 822 continue; 823 if (mp_irqs[i].srcbusirq != m->srcbusirq) 824 continue; 825 if (irq_used[i]) { 826 /* already claimed */ 827 return -2; 828 } 829 irq_used[i] = 1; 830 return i; 831 } 832 833 /* not found */ 834 return -1; 835 } 836 837 #define SPARE_SLOT_NUM 20 838 839 static struct mpc_intsrc __initdata *m_spare[SPARE_SLOT_NUM]; 840 841 static void __init check_irq_src(struct mpc_intsrc *m, int *nr_m_spare) 842 { 843 int i; 844 845 apic_printk(APIC_VERBOSE, "OLD "); 846 print_MP_intsrc_info(m); 847 848 i = get_MP_intsrc_index(m); 849 if (i > 0) { 850 assign_to_mpc_intsrc(&mp_irqs[i], m); 851 apic_printk(APIC_VERBOSE, "NEW "); 852 print_mp_irq_info(&mp_irqs[i]); 853 return; 854 } 855 if (!i) { 856 /* legacy, do nothing */ 857 return; 858 } 859 if (*nr_m_spare < SPARE_SLOT_NUM) { 860 /* 861 * not found (-1), or duplicated (-2) are invalid entries, 862 * we need to use the slot later 863 */ 864 m_spare[*nr_m_spare] = m; 865 *nr_m_spare += 1; 866 } 867 } 868 #else /* CONFIG_X86_IO_APIC */ 869 static 870 inline void __init check_irq_src(struct mpc_intsrc *m, int *nr_m_spare) {} 871 #endif /* CONFIG_X86_IO_APIC */ 872 873 static int check_slot(unsigned long mpc_new_phys, unsigned long mpc_new_length, 874 int count) 875 { 876 if (!mpc_new_phys) { 877 pr_info("No spare slots, try to append...take your risk, " 878 "new mpc_length %x\n", count); 879 } else { 880 if (count <= mpc_new_length) 881 pr_info("No spare slots, try to append..., " 882 "new mpc_length %x\n", count); 883 else { 884 pr_err("mpc_new_length %lx is too small\n", 885 mpc_new_length); 886 return -1; 887 } 888 } 889 890 return 0; 891 } 892 893 static int __init replace_intsrc_all(struct mpc_table *mpc, 894 unsigned long mpc_new_phys, 895 unsigned long mpc_new_length) 896 { 897 #ifdef CONFIG_X86_IO_APIC 898 int i; 899 #endif 900 int count = sizeof(*mpc); 901 int nr_m_spare = 0; 902 unsigned char *mpt = ((unsigned char *)mpc) + count; 903 904 printk(KERN_INFO "mpc_length %x\n", mpc->length); 905 while (count < mpc->length) { 906 switch (*mpt) { 907 case MP_PROCESSOR: 908 skip_entry(&mpt, &count, sizeof(struct mpc_cpu)); 909 break; 910 case MP_BUS: 911 skip_entry(&mpt, &count, sizeof(struct mpc_bus)); 912 break; 913 case MP_IOAPIC: 914 skip_entry(&mpt, &count, sizeof(struct mpc_ioapic)); 915 break; 916 case MP_INTSRC: 917 check_irq_src((struct mpc_intsrc *)mpt, &nr_m_spare); 918 skip_entry(&mpt, &count, sizeof(struct mpc_intsrc)); 919 break; 920 case MP_LINTSRC: 921 skip_entry(&mpt, &count, sizeof(struct mpc_lintsrc)); 922 break; 923 default: 924 /* wrong mptable */ 925 smp_dump_mptable(mpc, mpt); 926 goto out; 927 } 928 } 929 930 #ifdef CONFIG_X86_IO_APIC 931 for (i = 0; i < mp_irq_entries; i++) { 932 if (irq_used[i]) 933 continue; 934 935 if (mp_irqs[i].irqtype != mp_INT) 936 continue; 937 938 if (mp_irqs[i].irqflag != 0x0f) 939 continue; 940 941 if (nr_m_spare > 0) { 942 apic_printk(APIC_VERBOSE, "*NEW* found\n"); 943 nr_m_spare--; 944 assign_to_mpc_intsrc(&mp_irqs[i], m_spare[nr_m_spare]); 945 m_spare[nr_m_spare] = NULL; 946 } else { 947 struct mpc_intsrc *m = (struct mpc_intsrc *)mpt; 948 count += sizeof(struct mpc_intsrc); 949 if (!check_slot(mpc_new_phys, mpc_new_length, count)) 950 goto out; 951 assign_to_mpc_intsrc(&mp_irqs[i], m); 952 mpc->length = count; 953 mpt += sizeof(struct mpc_intsrc); 954 } 955 print_mp_irq_info(&mp_irqs[i]); 956 } 957 #endif 958 out: 959 /* update checksum */ 960 mpc->checksum = 0; 961 mpc->checksum -= mpf_checksum((unsigned char *)mpc, mpc->length); 962 963 return 0; 964 } 965 966 static int __initdata enable_update_mptable; 967 968 static int __init update_mptable_setup(char *str) 969 { 970 enable_update_mptable = 1; 971 return 0; 972 } 973 early_param("update_mptable", update_mptable_setup); 974 975 static unsigned long __initdata mpc_new_phys; 976 static unsigned long mpc_new_length __initdata = 4096; 977 978 /* alloc_mptable or alloc_mptable=4k */ 979 static int __initdata alloc_mptable; 980 static int __init parse_alloc_mptable_opt(char *p) 981 { 982 enable_update_mptable = 1; 983 alloc_mptable = 1; 984 if (!p) 985 return 0; 986 mpc_new_length = memparse(p, &p); 987 return 0; 988 } 989 early_param("alloc_mptable", parse_alloc_mptable_opt); 990 991 void __init early_reserve_e820_mpc_new(void) 992 { 993 if (enable_update_mptable && alloc_mptable) { 994 u64 startt = 0; 995 #ifdef CONFIG_X86_TRAMPOLINE 996 startt = TRAMPOLINE_BASE; 997 #endif 998 mpc_new_phys = early_reserve_e820(startt, mpc_new_length, 4); 999 } 1000 } 1001 1002 static int __init update_mp_table(void) 1003 { 1004 char str[16]; 1005 char oem[10]; 1006 struct mpf_intel *mpf; 1007 struct mpc_table *mpc, *mpc_new; 1008 1009 if (!enable_update_mptable) 1010 return 0; 1011 1012 mpf = mpf_found; 1013 if (!mpf) 1014 return 0; 1015 1016 /* 1017 * Now see if we need to go further. 1018 */ 1019 if (mpf->feature1 != 0) 1020 return 0; 1021 1022 if (!mpf->physptr) 1023 return 0; 1024 1025 mpc = phys_to_virt(mpf->physptr); 1026 1027 if (!smp_check_mpc(mpc, oem, str)) 1028 return 0; 1029 1030 printk(KERN_INFO "mpf: %llx\n", (u64)virt_to_phys(mpf)); 1031 printk(KERN_INFO "physptr: %x\n", mpf->physptr); 1032 1033 if (mpc_new_phys && mpc->length > mpc_new_length) { 1034 mpc_new_phys = 0; 1035 printk(KERN_INFO "mpc_new_length is %ld, please use alloc_mptable=8k\n", 1036 mpc_new_length); 1037 } 1038 1039 if (!mpc_new_phys) { 1040 unsigned char old, new; 1041 /* check if we can change the postion */ 1042 mpc->checksum = 0; 1043 old = mpf_checksum((unsigned char *)mpc, mpc->length); 1044 mpc->checksum = 0xff; 1045 new = mpf_checksum((unsigned char *)mpc, mpc->length); 1046 if (old == new) { 1047 printk(KERN_INFO "mpc is readonly, please try alloc_mptable instead\n"); 1048 return 0; 1049 } 1050 printk(KERN_INFO "use in-positon replacing\n"); 1051 } else { 1052 mpf->physptr = mpc_new_phys; 1053 mpc_new = phys_to_virt(mpc_new_phys); 1054 memcpy(mpc_new, mpc, mpc->length); 1055 mpc = mpc_new; 1056 /* check if we can modify that */ 1057 if (mpc_new_phys - mpf->physptr) { 1058 struct mpf_intel *mpf_new; 1059 /* steal 16 bytes from [0, 1k) */ 1060 printk(KERN_INFO "mpf new: %x\n", 0x400 - 16); 1061 mpf_new = phys_to_virt(0x400 - 16); 1062 memcpy(mpf_new, mpf, 16); 1063 mpf = mpf_new; 1064 mpf->physptr = mpc_new_phys; 1065 } 1066 mpf->checksum = 0; 1067 mpf->checksum -= mpf_checksum((unsigned char *)mpf, 16); 1068 printk(KERN_INFO "physptr new: %x\n", mpf->physptr); 1069 } 1070 1071 /* 1072 * only replace the one with mp_INT and 1073 * MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 1074 * already in mp_irqs , stored by ... and mp_config_acpi_gsi, 1075 * may need pci=routeirq for all coverage 1076 */ 1077 replace_intsrc_all(mpc, mpc_new_phys, mpc_new_length); 1078 1079 return 0; 1080 } 1081 1082 late_initcall(update_mp_table); 1083