1 /* 2 * Intel Multiprocessor Specification 1.1 and 1.4 3 * compliant MP-table parsing routines. 4 * 5 * (c) 1995 Alan Cox, Building #3 <alan@lxorguk.ukuu.org.uk> 6 * (c) 1998, 1999, 2000, 2009 Ingo Molnar <mingo@redhat.com> 7 * (c) 2008 Alexey Starikovskiy <astarikovskiy@suse.de> 8 */ 9 10 #include <linux/mm.h> 11 #include <linux/init.h> 12 #include <linux/delay.h> 13 #include <linux/bootmem.h> 14 #include <linux/memblock.h> 15 #include <linux/kernel_stat.h> 16 #include <linux/mc146818rtc.h> 17 #include <linux/bitops.h> 18 #include <linux/acpi.h> 19 #include <linux/module.h> 20 #include <linux/smp.h> 21 #include <linux/pci.h> 22 23 #include <asm/mtrr.h> 24 #include <asm/mpspec.h> 25 #include <asm/pgalloc.h> 26 #include <asm/io_apic.h> 27 #include <asm/proto.h> 28 #include <asm/bios_ebda.h> 29 #include <asm/e820.h> 30 #include <asm/trampoline.h> 31 #include <asm/setup.h> 32 #include <asm/smp.h> 33 34 #include <asm/apic.h> 35 /* 36 * Checksum an MP configuration block. 37 */ 38 39 static int __init mpf_checksum(unsigned char *mp, int len) 40 { 41 int sum = 0; 42 43 while (len--) 44 sum += *mp++; 45 46 return sum & 0xFF; 47 } 48 49 int __init default_mpc_apic_id(struct mpc_cpu *m) 50 { 51 return m->apicid; 52 } 53 54 static void __init MP_processor_info(struct mpc_cpu *m) 55 { 56 int apicid; 57 char *bootup_cpu = ""; 58 59 if (!(m->cpuflag & CPU_ENABLED)) { 60 disabled_cpus++; 61 return; 62 } 63 64 apicid = x86_init.mpparse.mpc_apic_id(m); 65 66 if (m->cpuflag & CPU_BOOTPROCESSOR) { 67 bootup_cpu = " (Bootup-CPU)"; 68 boot_cpu_physical_apicid = m->apicid; 69 } 70 71 printk(KERN_INFO "Processor #%d%s\n", m->apicid, bootup_cpu); 72 generic_processor_info(apicid, m->apicver); 73 } 74 75 #ifdef CONFIG_X86_IO_APIC 76 void __init default_mpc_oem_bus_info(struct mpc_bus *m, char *str) 77 { 78 memcpy(str, m->bustype, 6); 79 str[6] = 0; 80 apic_printk(APIC_VERBOSE, "Bus #%d is %s\n", m->busid, str); 81 } 82 83 static void __init MP_bus_info(struct mpc_bus *m) 84 { 85 char str[7]; 86 87 x86_init.mpparse.mpc_oem_bus_info(m, str); 88 89 #if MAX_MP_BUSSES < 256 90 if (m->busid >= MAX_MP_BUSSES) { 91 printk(KERN_WARNING "MP table busid value (%d) for bustype %s " 92 " is too large, max. supported is %d\n", 93 m->busid, str, MAX_MP_BUSSES - 1); 94 return; 95 } 96 #endif 97 98 if (strncmp(str, BUSTYPE_ISA, sizeof(BUSTYPE_ISA) - 1) == 0) { 99 set_bit(m->busid, mp_bus_not_pci); 100 #if defined(CONFIG_EISA) || defined(CONFIG_MCA) 101 mp_bus_id_to_type[m->busid] = MP_BUS_ISA; 102 #endif 103 } else if (strncmp(str, BUSTYPE_PCI, sizeof(BUSTYPE_PCI) - 1) == 0) { 104 if (x86_init.mpparse.mpc_oem_pci_bus) 105 x86_init.mpparse.mpc_oem_pci_bus(m); 106 107 clear_bit(m->busid, mp_bus_not_pci); 108 #if defined(CONFIG_EISA) || defined(CONFIG_MCA) 109 mp_bus_id_to_type[m->busid] = MP_BUS_PCI; 110 } else if (strncmp(str, BUSTYPE_EISA, sizeof(BUSTYPE_EISA) - 1) == 0) { 111 mp_bus_id_to_type[m->busid] = MP_BUS_EISA; 112 } else if (strncmp(str, BUSTYPE_MCA, sizeof(BUSTYPE_MCA) - 1) == 0) { 113 mp_bus_id_to_type[m->busid] = MP_BUS_MCA; 114 #endif 115 } else 116 printk(KERN_WARNING "Unknown bustype %s - ignoring\n", str); 117 } 118 119 static void __init MP_ioapic_info(struct mpc_ioapic *m) 120 { 121 if (m->flags & MPC_APIC_USABLE) 122 mp_register_ioapic(m->apicid, m->apicaddr, gsi_top); 123 } 124 125 static void __init print_mp_irq_info(struct mpc_intsrc *mp_irq) 126 { 127 apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x," 128 " IRQ %02x, APIC ID %x, APIC INT %02x\n", 129 mp_irq->irqtype, mp_irq->irqflag & 3, 130 (mp_irq->irqflag >> 2) & 3, mp_irq->srcbus, 131 mp_irq->srcbusirq, mp_irq->dstapic, mp_irq->dstirq); 132 } 133 134 #else /* CONFIG_X86_IO_APIC */ 135 static inline void __init MP_bus_info(struct mpc_bus *m) {} 136 static inline void __init MP_ioapic_info(struct mpc_ioapic *m) {} 137 #endif /* CONFIG_X86_IO_APIC */ 138 139 static void __init MP_lintsrc_info(struct mpc_lintsrc *m) 140 { 141 apic_printk(APIC_VERBOSE, "Lint: type %d, pol %d, trig %d, bus %02x," 142 " IRQ %02x, APIC ID %x, APIC LINT %02x\n", 143 m->irqtype, m->irqflag & 3, (m->irqflag >> 2) & 3, m->srcbusid, 144 m->srcbusirq, m->destapic, m->destapiclint); 145 } 146 147 /* 148 * Read/parse the MPC 149 */ 150 static int __init smp_check_mpc(struct mpc_table *mpc, char *oem, char *str) 151 { 152 153 if (memcmp(mpc->signature, MPC_SIGNATURE, 4)) { 154 printk(KERN_ERR "MPTABLE: bad signature [%c%c%c%c]!\n", 155 mpc->signature[0], mpc->signature[1], 156 mpc->signature[2], mpc->signature[3]); 157 return 0; 158 } 159 if (mpf_checksum((unsigned char *)mpc, mpc->length)) { 160 printk(KERN_ERR "MPTABLE: checksum error!\n"); 161 return 0; 162 } 163 if (mpc->spec != 0x01 && mpc->spec != 0x04) { 164 printk(KERN_ERR "MPTABLE: bad table version (%d)!!\n", 165 mpc->spec); 166 return 0; 167 } 168 if (!mpc->lapic) { 169 printk(KERN_ERR "MPTABLE: null local APIC address!\n"); 170 return 0; 171 } 172 memcpy(oem, mpc->oem, 8); 173 oem[8] = 0; 174 printk(KERN_INFO "MPTABLE: OEM ID: %s\n", oem); 175 176 memcpy(str, mpc->productid, 12); 177 str[12] = 0; 178 179 printk(KERN_INFO "MPTABLE: Product ID: %s\n", str); 180 181 printk(KERN_INFO "MPTABLE: APIC at: 0x%X\n", mpc->lapic); 182 183 return 1; 184 } 185 186 static void skip_entry(unsigned char **ptr, int *count, int size) 187 { 188 *ptr += size; 189 *count += size; 190 } 191 192 static void __init smp_dump_mptable(struct mpc_table *mpc, unsigned char *mpt) 193 { 194 printk(KERN_ERR "Your mptable is wrong, contact your HW vendor!\n" 195 "type %x\n", *mpt); 196 print_hex_dump(KERN_ERR, " ", DUMP_PREFIX_ADDRESS, 16, 197 1, mpc, mpc->length, 1); 198 } 199 200 void __init default_smp_read_mpc_oem(struct mpc_table *mpc) { } 201 202 static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early) 203 { 204 char str[16]; 205 char oem[10]; 206 207 int count = sizeof(*mpc); 208 unsigned char *mpt = ((unsigned char *)mpc) + count; 209 210 if (!smp_check_mpc(mpc, oem, str)) 211 return 0; 212 213 #ifdef CONFIG_X86_32 214 generic_mps_oem_check(mpc, oem, str); 215 #endif 216 /* Initialize the lapic mapping */ 217 if (!acpi_lapic) 218 register_lapic_address(mpc->lapic); 219 220 if (early) 221 return 1; 222 223 if (mpc->oemptr) 224 x86_init.mpparse.smp_read_mpc_oem(mpc); 225 226 /* 227 * Now process the configuration blocks. 228 */ 229 x86_init.mpparse.mpc_record(0); 230 231 while (count < mpc->length) { 232 switch (*mpt) { 233 case MP_PROCESSOR: 234 /* ACPI may have already provided this data */ 235 if (!acpi_lapic) 236 MP_processor_info((struct mpc_cpu *)mpt); 237 skip_entry(&mpt, &count, sizeof(struct mpc_cpu)); 238 break; 239 case MP_BUS: 240 MP_bus_info((struct mpc_bus *)mpt); 241 skip_entry(&mpt, &count, sizeof(struct mpc_bus)); 242 break; 243 case MP_IOAPIC: 244 MP_ioapic_info((struct mpc_ioapic *)mpt); 245 skip_entry(&mpt, &count, sizeof(struct mpc_ioapic)); 246 break; 247 case MP_INTSRC: 248 mp_save_irq((struct mpc_intsrc *)mpt); 249 skip_entry(&mpt, &count, sizeof(struct mpc_intsrc)); 250 break; 251 case MP_LINTSRC: 252 MP_lintsrc_info((struct mpc_lintsrc *)mpt); 253 skip_entry(&mpt, &count, sizeof(struct mpc_lintsrc)); 254 break; 255 default: 256 /* wrong mptable */ 257 smp_dump_mptable(mpc, mpt); 258 count = mpc->length; 259 break; 260 } 261 x86_init.mpparse.mpc_record(1); 262 } 263 264 if (!num_processors) 265 printk(KERN_ERR "MPTABLE: no processors registered!\n"); 266 return num_processors; 267 } 268 269 #ifdef CONFIG_X86_IO_APIC 270 271 static int __init ELCR_trigger(unsigned int irq) 272 { 273 unsigned int port; 274 275 port = 0x4d0 + (irq >> 3); 276 return (inb(port) >> (irq & 7)) & 1; 277 } 278 279 static void __init construct_default_ioirq_mptable(int mpc_default_type) 280 { 281 struct mpc_intsrc intsrc; 282 int i; 283 int ELCR_fallback = 0; 284 285 intsrc.type = MP_INTSRC; 286 intsrc.irqflag = 0; /* conforming */ 287 intsrc.srcbus = 0; 288 intsrc.dstapic = mp_ioapics[0].apicid; 289 290 intsrc.irqtype = mp_INT; 291 292 /* 293 * If true, we have an ISA/PCI system with no IRQ entries 294 * in the MP table. To prevent the PCI interrupts from being set up 295 * incorrectly, we try to use the ELCR. The sanity check to see if 296 * there is good ELCR data is very simple - IRQ0, 1, 2 and 13 can 297 * never be level sensitive, so we simply see if the ELCR agrees. 298 * If it does, we assume it's valid. 299 */ 300 if (mpc_default_type == 5) { 301 printk(KERN_INFO "ISA/PCI bus type with no IRQ information... " 302 "falling back to ELCR\n"); 303 304 if (ELCR_trigger(0) || ELCR_trigger(1) || ELCR_trigger(2) || 305 ELCR_trigger(13)) 306 printk(KERN_ERR "ELCR contains invalid data... " 307 "not using ELCR\n"); 308 else { 309 printk(KERN_INFO 310 "Using ELCR to identify PCI interrupts\n"); 311 ELCR_fallback = 1; 312 } 313 } 314 315 for (i = 0; i < 16; i++) { 316 switch (mpc_default_type) { 317 case 2: 318 if (i == 0 || i == 13) 319 continue; /* IRQ0 & IRQ13 not connected */ 320 /* fall through */ 321 default: 322 if (i == 2) 323 continue; /* IRQ2 is never connected */ 324 } 325 326 if (ELCR_fallback) { 327 /* 328 * If the ELCR indicates a level-sensitive interrupt, we 329 * copy that information over to the MP table in the 330 * irqflag field (level sensitive, active high polarity). 331 */ 332 if (ELCR_trigger(i)) 333 intsrc.irqflag = 13; 334 else 335 intsrc.irqflag = 0; 336 } 337 338 intsrc.srcbusirq = i; 339 intsrc.dstirq = i ? i : 2; /* IRQ0 to INTIN2 */ 340 mp_save_irq(&intsrc); 341 } 342 343 intsrc.irqtype = mp_ExtINT; 344 intsrc.srcbusirq = 0; 345 intsrc.dstirq = 0; /* 8259A to INTIN0 */ 346 mp_save_irq(&intsrc); 347 } 348 349 350 static void __init construct_ioapic_table(int mpc_default_type) 351 { 352 struct mpc_ioapic ioapic; 353 struct mpc_bus bus; 354 355 bus.type = MP_BUS; 356 bus.busid = 0; 357 switch (mpc_default_type) { 358 default: 359 printk(KERN_ERR "???\nUnknown standard configuration %d\n", 360 mpc_default_type); 361 /* fall through */ 362 case 1: 363 case 5: 364 memcpy(bus.bustype, "ISA ", 6); 365 break; 366 case 2: 367 case 6: 368 case 3: 369 memcpy(bus.bustype, "EISA ", 6); 370 break; 371 case 4: 372 case 7: 373 memcpy(bus.bustype, "MCA ", 6); 374 } 375 MP_bus_info(&bus); 376 if (mpc_default_type > 4) { 377 bus.busid = 1; 378 memcpy(bus.bustype, "PCI ", 6); 379 MP_bus_info(&bus); 380 } 381 382 ioapic.type = MP_IOAPIC; 383 ioapic.apicid = 2; 384 ioapic.apicver = mpc_default_type > 4 ? 0x10 : 0x01; 385 ioapic.flags = MPC_APIC_USABLE; 386 ioapic.apicaddr = IO_APIC_DEFAULT_PHYS_BASE; 387 MP_ioapic_info(&ioapic); 388 389 /* 390 * We set up most of the low 16 IO-APIC pins according to MPS rules. 391 */ 392 construct_default_ioirq_mptable(mpc_default_type); 393 } 394 #else 395 static inline void __init construct_ioapic_table(int mpc_default_type) { } 396 #endif 397 398 static inline void __init construct_default_ISA_mptable(int mpc_default_type) 399 { 400 struct mpc_cpu processor; 401 struct mpc_lintsrc lintsrc; 402 int linttypes[2] = { mp_ExtINT, mp_NMI }; 403 int i; 404 405 /* 406 * local APIC has default address 407 */ 408 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE; 409 410 /* 411 * 2 CPUs, numbered 0 & 1. 412 */ 413 processor.type = MP_PROCESSOR; 414 /* Either an integrated APIC or a discrete 82489DX. */ 415 processor.apicver = mpc_default_type > 4 ? 0x10 : 0x01; 416 processor.cpuflag = CPU_ENABLED; 417 processor.cpufeature = (boot_cpu_data.x86 << 8) | 418 (boot_cpu_data.x86_model << 4) | boot_cpu_data.x86_mask; 419 processor.featureflag = boot_cpu_data.x86_capability[0]; 420 processor.reserved[0] = 0; 421 processor.reserved[1] = 0; 422 for (i = 0; i < 2; i++) { 423 processor.apicid = i; 424 MP_processor_info(&processor); 425 } 426 427 construct_ioapic_table(mpc_default_type); 428 429 lintsrc.type = MP_LINTSRC; 430 lintsrc.irqflag = 0; /* conforming */ 431 lintsrc.srcbusid = 0; 432 lintsrc.srcbusirq = 0; 433 lintsrc.destapic = MP_APIC_ALL; 434 for (i = 0; i < 2; i++) { 435 lintsrc.irqtype = linttypes[i]; 436 lintsrc.destapiclint = i; 437 MP_lintsrc_info(&lintsrc); 438 } 439 } 440 441 static struct mpf_intel *mpf_found; 442 443 static unsigned long __init get_mpc_size(unsigned long physptr) 444 { 445 struct mpc_table *mpc; 446 unsigned long size; 447 448 mpc = early_ioremap(physptr, PAGE_SIZE); 449 size = mpc->length; 450 early_iounmap(mpc, PAGE_SIZE); 451 apic_printk(APIC_VERBOSE, " mpc: %lx-%lx\n", physptr, physptr + size); 452 453 return size; 454 } 455 456 static int __init check_physptr(struct mpf_intel *mpf, unsigned int early) 457 { 458 struct mpc_table *mpc; 459 unsigned long size; 460 461 size = get_mpc_size(mpf->physptr); 462 mpc = early_ioremap(mpf->physptr, size); 463 /* 464 * Read the physical hardware table. Anything here will 465 * override the defaults. 466 */ 467 if (!smp_read_mpc(mpc, early)) { 468 #ifdef CONFIG_X86_LOCAL_APIC 469 smp_found_config = 0; 470 #endif 471 printk(KERN_ERR "BIOS bug, MP table errors detected!...\n" 472 "... disabling SMP support. (tell your hw vendor)\n"); 473 early_iounmap(mpc, size); 474 return -1; 475 } 476 early_iounmap(mpc, size); 477 478 if (early) 479 return -1; 480 481 #ifdef CONFIG_X86_IO_APIC 482 /* 483 * If there are no explicit MP IRQ entries, then we are 484 * broken. We set up most of the low 16 IO-APIC pins to 485 * ISA defaults and hope it will work. 486 */ 487 if (!mp_irq_entries) { 488 struct mpc_bus bus; 489 490 printk(KERN_ERR "BIOS bug, no explicit IRQ entries, " 491 "using default mptable. (tell your hw vendor)\n"); 492 493 bus.type = MP_BUS; 494 bus.busid = 0; 495 memcpy(bus.bustype, "ISA ", 6); 496 MP_bus_info(&bus); 497 498 construct_default_ioirq_mptable(0); 499 } 500 #endif 501 502 return 0; 503 } 504 505 /* 506 * Scan the memory blocks for an SMP configuration block. 507 */ 508 void __init default_get_smp_config(unsigned int early) 509 { 510 struct mpf_intel *mpf = mpf_found; 511 512 if (!mpf) 513 return; 514 515 if (acpi_lapic && early) 516 return; 517 518 /* 519 * MPS doesn't support hyperthreading, aka only have 520 * thread 0 apic id in MPS table 521 */ 522 if (acpi_lapic && acpi_ioapic) 523 return; 524 525 printk(KERN_INFO "Intel MultiProcessor Specification v1.%d\n", 526 mpf->specification); 527 #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32) 528 if (mpf->feature2 & (1 << 7)) { 529 printk(KERN_INFO " IMCR and PIC compatibility mode.\n"); 530 pic_mode = 1; 531 } else { 532 printk(KERN_INFO " Virtual Wire compatibility mode.\n"); 533 pic_mode = 0; 534 } 535 #endif 536 /* 537 * Now see if we need to read further. 538 */ 539 if (mpf->feature1 != 0) { 540 if (early) { 541 /* 542 * local APIC has default address 543 */ 544 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE; 545 return; 546 } 547 548 printk(KERN_INFO "Default MP configuration #%d\n", 549 mpf->feature1); 550 construct_default_ISA_mptable(mpf->feature1); 551 552 } else if (mpf->physptr) { 553 if (check_physptr(mpf, early)) 554 return; 555 } else 556 BUG(); 557 558 if (!early) 559 printk(KERN_INFO "Processors: %d\n", num_processors); 560 /* 561 * Only use the first configuration found. 562 */ 563 } 564 565 static void __init smp_reserve_memory(struct mpf_intel *mpf) 566 { 567 unsigned long size = get_mpc_size(mpf->physptr); 568 569 memblock_x86_reserve_range(mpf->physptr, mpf->physptr+size, "* MP-table mpc"); 570 } 571 572 static int __init smp_scan_config(unsigned long base, unsigned long length) 573 { 574 unsigned int *bp = phys_to_virt(base); 575 struct mpf_intel *mpf; 576 unsigned long mem; 577 578 apic_printk(APIC_VERBOSE, "Scan SMP from %p for %ld bytes.\n", 579 bp, length); 580 BUILD_BUG_ON(sizeof(*mpf) != 16); 581 582 while (length > 0) { 583 mpf = (struct mpf_intel *)bp; 584 if ((*bp == SMP_MAGIC_IDENT) && 585 (mpf->length == 1) && 586 !mpf_checksum((unsigned char *)bp, 16) && 587 ((mpf->specification == 1) 588 || (mpf->specification == 4))) { 589 #ifdef CONFIG_X86_LOCAL_APIC 590 smp_found_config = 1; 591 #endif 592 mpf_found = mpf; 593 594 printk(KERN_INFO "found SMP MP-table at [%p] %llx\n", 595 mpf, (u64)virt_to_phys(mpf)); 596 597 mem = virt_to_phys(mpf); 598 memblock_x86_reserve_range(mem, mem + sizeof(*mpf), "* MP-table mpf"); 599 if (mpf->physptr) 600 smp_reserve_memory(mpf); 601 602 return 1; 603 } 604 bp += 4; 605 length -= 16; 606 } 607 return 0; 608 } 609 610 void __init default_find_smp_config(void) 611 { 612 unsigned int address; 613 614 /* 615 * FIXME: Linux assumes you have 640K of base ram.. 616 * this continues the error... 617 * 618 * 1) Scan the bottom 1K for a signature 619 * 2) Scan the top 1K of base RAM 620 * 3) Scan the 64K of bios 621 */ 622 if (smp_scan_config(0x0, 0x400) || 623 smp_scan_config(639 * 0x400, 0x400) || 624 smp_scan_config(0xF0000, 0x10000)) 625 return; 626 /* 627 * If it is an SMP machine we should know now, unless the 628 * configuration is in an EISA/MCA bus machine with an 629 * extended bios data area. 630 * 631 * there is a real-mode segmented pointer pointing to the 632 * 4K EBDA area at 0x40E, calculate and scan it here. 633 * 634 * NOTE! There are Linux loaders that will corrupt the EBDA 635 * area, and as such this kind of SMP config may be less 636 * trustworthy, simply because the SMP table may have been 637 * stomped on during early boot. These loaders are buggy and 638 * should be fixed. 639 * 640 * MP1.4 SPEC states to only scan first 1K of 4K EBDA. 641 */ 642 643 address = get_bios_ebda(); 644 if (address) 645 smp_scan_config(address, 0x400); 646 } 647 648 #ifdef CONFIG_X86_IO_APIC 649 static u8 __initdata irq_used[MAX_IRQ_SOURCES]; 650 651 static int __init get_MP_intsrc_index(struct mpc_intsrc *m) 652 { 653 int i; 654 655 if (m->irqtype != mp_INT) 656 return 0; 657 658 if (m->irqflag != 0x0f) 659 return 0; 660 661 /* not legacy */ 662 663 for (i = 0; i < mp_irq_entries; i++) { 664 if (mp_irqs[i].irqtype != mp_INT) 665 continue; 666 667 if (mp_irqs[i].irqflag != 0x0f) 668 continue; 669 670 if (mp_irqs[i].srcbus != m->srcbus) 671 continue; 672 if (mp_irqs[i].srcbusirq != m->srcbusirq) 673 continue; 674 if (irq_used[i]) { 675 /* already claimed */ 676 return -2; 677 } 678 irq_used[i] = 1; 679 return i; 680 } 681 682 /* not found */ 683 return -1; 684 } 685 686 #define SPARE_SLOT_NUM 20 687 688 static struct mpc_intsrc __initdata *m_spare[SPARE_SLOT_NUM]; 689 690 static void __init check_irq_src(struct mpc_intsrc *m, int *nr_m_spare) 691 { 692 int i; 693 694 apic_printk(APIC_VERBOSE, "OLD "); 695 print_mp_irq_info(m); 696 697 i = get_MP_intsrc_index(m); 698 if (i > 0) { 699 memcpy(m, &mp_irqs[i], sizeof(*m)); 700 apic_printk(APIC_VERBOSE, "NEW "); 701 print_mp_irq_info(&mp_irqs[i]); 702 return; 703 } 704 if (!i) { 705 /* legacy, do nothing */ 706 return; 707 } 708 if (*nr_m_spare < SPARE_SLOT_NUM) { 709 /* 710 * not found (-1), or duplicated (-2) are invalid entries, 711 * we need to use the slot later 712 */ 713 m_spare[*nr_m_spare] = m; 714 *nr_m_spare += 1; 715 } 716 } 717 #else /* CONFIG_X86_IO_APIC */ 718 static 719 inline void __init check_irq_src(struct mpc_intsrc *m, int *nr_m_spare) {} 720 #endif /* CONFIG_X86_IO_APIC */ 721 722 static int 723 check_slot(unsigned long mpc_new_phys, unsigned long mpc_new_length, int count) 724 { 725 int ret = 0; 726 727 if (!mpc_new_phys || count <= mpc_new_length) { 728 WARN(1, "update_mptable: No spare slots (length: %x)\n", count); 729 return -1; 730 } 731 732 return ret; 733 } 734 735 static int __init replace_intsrc_all(struct mpc_table *mpc, 736 unsigned long mpc_new_phys, 737 unsigned long mpc_new_length) 738 { 739 #ifdef CONFIG_X86_IO_APIC 740 int i; 741 #endif 742 int count = sizeof(*mpc); 743 int nr_m_spare = 0; 744 unsigned char *mpt = ((unsigned char *)mpc) + count; 745 746 printk(KERN_INFO "mpc_length %x\n", mpc->length); 747 while (count < mpc->length) { 748 switch (*mpt) { 749 case MP_PROCESSOR: 750 skip_entry(&mpt, &count, sizeof(struct mpc_cpu)); 751 break; 752 case MP_BUS: 753 skip_entry(&mpt, &count, sizeof(struct mpc_bus)); 754 break; 755 case MP_IOAPIC: 756 skip_entry(&mpt, &count, sizeof(struct mpc_ioapic)); 757 break; 758 case MP_INTSRC: 759 check_irq_src((struct mpc_intsrc *)mpt, &nr_m_spare); 760 skip_entry(&mpt, &count, sizeof(struct mpc_intsrc)); 761 break; 762 case MP_LINTSRC: 763 skip_entry(&mpt, &count, sizeof(struct mpc_lintsrc)); 764 break; 765 default: 766 /* wrong mptable */ 767 smp_dump_mptable(mpc, mpt); 768 goto out; 769 } 770 } 771 772 #ifdef CONFIG_X86_IO_APIC 773 for (i = 0; i < mp_irq_entries; i++) { 774 if (irq_used[i]) 775 continue; 776 777 if (mp_irqs[i].irqtype != mp_INT) 778 continue; 779 780 if (mp_irqs[i].irqflag != 0x0f) 781 continue; 782 783 if (nr_m_spare > 0) { 784 apic_printk(APIC_VERBOSE, "*NEW* found\n"); 785 nr_m_spare--; 786 memcpy(m_spare[nr_m_spare], &mp_irqs[i], sizeof(mp_irqs[i])); 787 m_spare[nr_m_spare] = NULL; 788 } else { 789 struct mpc_intsrc *m = (struct mpc_intsrc *)mpt; 790 count += sizeof(struct mpc_intsrc); 791 if (check_slot(mpc_new_phys, mpc_new_length, count) < 0) 792 goto out; 793 memcpy(m, &mp_irqs[i], sizeof(*m)); 794 mpc->length = count; 795 mpt += sizeof(struct mpc_intsrc); 796 } 797 print_mp_irq_info(&mp_irqs[i]); 798 } 799 #endif 800 out: 801 /* update checksum */ 802 mpc->checksum = 0; 803 mpc->checksum -= mpf_checksum((unsigned char *)mpc, mpc->length); 804 805 return 0; 806 } 807 808 int enable_update_mptable; 809 810 static int __init update_mptable_setup(char *str) 811 { 812 enable_update_mptable = 1; 813 #ifdef CONFIG_PCI 814 pci_routeirq = 1; 815 #endif 816 return 0; 817 } 818 early_param("update_mptable", update_mptable_setup); 819 820 static unsigned long __initdata mpc_new_phys; 821 static unsigned long mpc_new_length __initdata = 4096; 822 823 /* alloc_mptable or alloc_mptable=4k */ 824 static int __initdata alloc_mptable; 825 static int __init parse_alloc_mptable_opt(char *p) 826 { 827 enable_update_mptable = 1; 828 #ifdef CONFIG_PCI 829 pci_routeirq = 1; 830 #endif 831 alloc_mptable = 1; 832 if (!p) 833 return 0; 834 mpc_new_length = memparse(p, &p); 835 return 0; 836 } 837 early_param("alloc_mptable", parse_alloc_mptable_opt); 838 839 void __init early_reserve_e820_mpc_new(void) 840 { 841 if (enable_update_mptable && alloc_mptable) { 842 u64 startt = 0; 843 mpc_new_phys = early_reserve_e820(startt, mpc_new_length, 4); 844 } 845 } 846 847 static int __init update_mp_table(void) 848 { 849 char str[16]; 850 char oem[10]; 851 struct mpf_intel *mpf; 852 struct mpc_table *mpc, *mpc_new; 853 854 if (!enable_update_mptable) 855 return 0; 856 857 mpf = mpf_found; 858 if (!mpf) 859 return 0; 860 861 /* 862 * Now see if we need to go further. 863 */ 864 if (mpf->feature1 != 0) 865 return 0; 866 867 if (!mpf->physptr) 868 return 0; 869 870 mpc = phys_to_virt(mpf->physptr); 871 872 if (!smp_check_mpc(mpc, oem, str)) 873 return 0; 874 875 printk(KERN_INFO "mpf: %llx\n", (u64)virt_to_phys(mpf)); 876 printk(KERN_INFO "physptr: %x\n", mpf->physptr); 877 878 if (mpc_new_phys && mpc->length > mpc_new_length) { 879 mpc_new_phys = 0; 880 printk(KERN_INFO "mpc_new_length is %ld, please use alloc_mptable=8k\n", 881 mpc_new_length); 882 } 883 884 if (!mpc_new_phys) { 885 unsigned char old, new; 886 /* check if we can change the position */ 887 mpc->checksum = 0; 888 old = mpf_checksum((unsigned char *)mpc, mpc->length); 889 mpc->checksum = 0xff; 890 new = mpf_checksum((unsigned char *)mpc, mpc->length); 891 if (old == new) { 892 printk(KERN_INFO "mpc is readonly, please try alloc_mptable instead\n"); 893 return 0; 894 } 895 printk(KERN_INFO "use in-position replacing\n"); 896 } else { 897 mpf->physptr = mpc_new_phys; 898 mpc_new = phys_to_virt(mpc_new_phys); 899 memcpy(mpc_new, mpc, mpc->length); 900 mpc = mpc_new; 901 /* check if we can modify that */ 902 if (mpc_new_phys - mpf->physptr) { 903 struct mpf_intel *mpf_new; 904 /* steal 16 bytes from [0, 1k) */ 905 printk(KERN_INFO "mpf new: %x\n", 0x400 - 16); 906 mpf_new = phys_to_virt(0x400 - 16); 907 memcpy(mpf_new, mpf, 16); 908 mpf = mpf_new; 909 mpf->physptr = mpc_new_phys; 910 } 911 mpf->checksum = 0; 912 mpf->checksum -= mpf_checksum((unsigned char *)mpf, 16); 913 printk(KERN_INFO "physptr new: %x\n", mpf->physptr); 914 } 915 916 /* 917 * only replace the one with mp_INT and 918 * MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 919 * already in mp_irqs , stored by ... and mp_config_acpi_gsi, 920 * may need pci=routeirq for all coverage 921 */ 922 replace_intsrc_all(mpc, mpc_new_phys, mpc_new_length); 923 924 return 0; 925 } 926 927 late_initcall(update_mp_table); 928