1 /* 2 * Intel Multiprocessor Specification 1.1 and 1.4 3 * compliant MP-table parsing routines. 4 * 5 * (c) 1995 Alan Cox, Building #3 <alan@lxorguk.ukuu.org.uk> 6 * (c) 1998, 1999, 2000, 2009 Ingo Molnar <mingo@redhat.com> 7 * (c) 2008 Alexey Starikovskiy <astarikovskiy@suse.de> 8 */ 9 10 #include <linux/mm.h> 11 #include <linux/init.h> 12 #include <linux/delay.h> 13 #include <linux/bootmem.h> 14 #include <linux/memblock.h> 15 #include <linux/kernel_stat.h> 16 #include <linux/mc146818rtc.h> 17 #include <linux/bitops.h> 18 #include <linux/acpi.h> 19 #include <linux/module.h> 20 #include <linux/smp.h> 21 #include <linux/pci.h> 22 23 #include <asm/mtrr.h> 24 #include <asm/mpspec.h> 25 #include <asm/pgalloc.h> 26 #include <asm/io_apic.h> 27 #include <asm/proto.h> 28 #include <asm/bios_ebda.h> 29 #include <asm/e820.h> 30 #include <asm/trampoline.h> 31 #include <asm/setup.h> 32 #include <asm/smp.h> 33 34 #include <asm/apic.h> 35 /* 36 * Checksum an MP configuration block. 37 */ 38 39 static int __init mpf_checksum(unsigned char *mp, int len) 40 { 41 int sum = 0; 42 43 while (len--) 44 sum += *mp++; 45 46 return sum & 0xFF; 47 } 48 49 int __init default_mpc_apic_id(struct mpc_cpu *m) 50 { 51 return m->apicid; 52 } 53 54 static void __init MP_processor_info(struct mpc_cpu *m) 55 { 56 int apicid; 57 char *bootup_cpu = ""; 58 59 if (!(m->cpuflag & CPU_ENABLED)) { 60 disabled_cpus++; 61 return; 62 } 63 64 apicid = x86_init.mpparse.mpc_apic_id(m); 65 66 if (m->cpuflag & CPU_BOOTPROCESSOR) { 67 bootup_cpu = " (Bootup-CPU)"; 68 boot_cpu_physical_apicid = m->apicid; 69 } 70 71 printk(KERN_INFO "Processor #%d%s\n", m->apicid, bootup_cpu); 72 generic_processor_info(apicid, m->apicver); 73 } 74 75 #ifdef CONFIG_X86_IO_APIC 76 void __init default_mpc_oem_bus_info(struct mpc_bus *m, char *str) 77 { 78 memcpy(str, m->bustype, 6); 79 str[6] = 0; 80 apic_printk(APIC_VERBOSE, "Bus #%d is %s\n", m->busid, str); 81 } 82 83 static void __init MP_bus_info(struct mpc_bus *m) 84 { 85 char str[7]; 86 87 x86_init.mpparse.mpc_oem_bus_info(m, str); 88 89 #if MAX_MP_BUSSES < 256 90 if (m->busid >= MAX_MP_BUSSES) { 91 printk(KERN_WARNING "MP table busid value (%d) for bustype %s " 92 " is too large, max. supported is %d\n", 93 m->busid, str, MAX_MP_BUSSES - 1); 94 return; 95 } 96 #endif 97 98 if (strncmp(str, BUSTYPE_ISA, sizeof(BUSTYPE_ISA) - 1) == 0) { 99 set_bit(m->busid, mp_bus_not_pci); 100 #if defined(CONFIG_EISA) || defined(CONFIG_MCA) 101 mp_bus_id_to_type[m->busid] = MP_BUS_ISA; 102 #endif 103 } else if (strncmp(str, BUSTYPE_PCI, sizeof(BUSTYPE_PCI) - 1) == 0) { 104 if (x86_init.mpparse.mpc_oem_pci_bus) 105 x86_init.mpparse.mpc_oem_pci_bus(m); 106 107 clear_bit(m->busid, mp_bus_not_pci); 108 #if defined(CONFIG_EISA) || defined(CONFIG_MCA) 109 mp_bus_id_to_type[m->busid] = MP_BUS_PCI; 110 } else if (strncmp(str, BUSTYPE_EISA, sizeof(BUSTYPE_EISA) - 1) == 0) { 111 mp_bus_id_to_type[m->busid] = MP_BUS_EISA; 112 } else if (strncmp(str, BUSTYPE_MCA, sizeof(BUSTYPE_MCA) - 1) == 0) { 113 mp_bus_id_to_type[m->busid] = MP_BUS_MCA; 114 #endif 115 } else 116 printk(KERN_WARNING "Unknown bustype %s - ignoring\n", str); 117 } 118 119 static void __init MP_ioapic_info(struct mpc_ioapic *m) 120 { 121 if (!(m->flags & MPC_APIC_USABLE)) 122 return; 123 124 printk(KERN_INFO "I/O APIC #%d Version %d at 0x%X.\n", 125 m->apicid, m->apicver, m->apicaddr); 126 127 mp_register_ioapic(m->apicid, m->apicaddr, gsi_top); 128 } 129 130 static void print_MP_intsrc_info(struct mpc_intsrc *m) 131 { 132 apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x," 133 " IRQ %02x, APIC ID %x, APIC INT %02x\n", 134 m->irqtype, m->irqflag & 3, (m->irqflag >> 2) & 3, m->srcbus, 135 m->srcbusirq, m->dstapic, m->dstirq); 136 } 137 138 static void __init print_mp_irq_info(struct mpc_intsrc *mp_irq) 139 { 140 apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x," 141 " IRQ %02x, APIC ID %x, APIC INT %02x\n", 142 mp_irq->irqtype, mp_irq->irqflag & 3, 143 (mp_irq->irqflag >> 2) & 3, mp_irq->srcbus, 144 mp_irq->srcbusirq, mp_irq->dstapic, mp_irq->dstirq); 145 } 146 147 static void __init assign_to_mp_irq(struct mpc_intsrc *m, 148 struct mpc_intsrc *mp_irq) 149 { 150 mp_irq->dstapic = m->dstapic; 151 mp_irq->type = m->type; 152 mp_irq->irqtype = m->irqtype; 153 mp_irq->irqflag = m->irqflag; 154 mp_irq->srcbus = m->srcbus; 155 mp_irq->srcbusirq = m->srcbusirq; 156 mp_irq->dstirq = m->dstirq; 157 } 158 159 static void __init assign_to_mpc_intsrc(struct mpc_intsrc *mp_irq, 160 struct mpc_intsrc *m) 161 { 162 m->dstapic = mp_irq->dstapic; 163 m->type = mp_irq->type; 164 m->irqtype = mp_irq->irqtype; 165 m->irqflag = mp_irq->irqflag; 166 m->srcbus = mp_irq->srcbus; 167 m->srcbusirq = mp_irq->srcbusirq; 168 m->dstirq = mp_irq->dstirq; 169 } 170 171 static int __init mp_irq_mpc_intsrc_cmp(struct mpc_intsrc *mp_irq, 172 struct mpc_intsrc *m) 173 { 174 if (mp_irq->dstapic != m->dstapic) 175 return 1; 176 if (mp_irq->type != m->type) 177 return 2; 178 if (mp_irq->irqtype != m->irqtype) 179 return 3; 180 if (mp_irq->irqflag != m->irqflag) 181 return 4; 182 if (mp_irq->srcbus != m->srcbus) 183 return 5; 184 if (mp_irq->srcbusirq != m->srcbusirq) 185 return 6; 186 if (mp_irq->dstirq != m->dstirq) 187 return 7; 188 189 return 0; 190 } 191 192 static void __init MP_intsrc_info(struct mpc_intsrc *m) 193 { 194 int i; 195 196 print_MP_intsrc_info(m); 197 198 for (i = 0; i < mp_irq_entries; i++) { 199 if (!mp_irq_mpc_intsrc_cmp(&mp_irqs[i], m)) 200 return; 201 } 202 203 assign_to_mp_irq(m, &mp_irqs[mp_irq_entries]); 204 if (++mp_irq_entries == MAX_IRQ_SOURCES) 205 panic("Max # of irq sources exceeded!!\n"); 206 } 207 #else /* CONFIG_X86_IO_APIC */ 208 static inline void __init MP_bus_info(struct mpc_bus *m) {} 209 static inline void __init MP_ioapic_info(struct mpc_ioapic *m) {} 210 static inline void __init MP_intsrc_info(struct mpc_intsrc *m) {} 211 #endif /* CONFIG_X86_IO_APIC */ 212 213 214 static void __init MP_lintsrc_info(struct mpc_lintsrc *m) 215 { 216 apic_printk(APIC_VERBOSE, "Lint: type %d, pol %d, trig %d, bus %02x," 217 " IRQ %02x, APIC ID %x, APIC LINT %02x\n", 218 m->irqtype, m->irqflag & 3, (m->irqflag >> 2) & 3, m->srcbusid, 219 m->srcbusirq, m->destapic, m->destapiclint); 220 } 221 222 /* 223 * Read/parse the MPC 224 */ 225 226 static int __init smp_check_mpc(struct mpc_table *mpc, char *oem, char *str) 227 { 228 229 if (memcmp(mpc->signature, MPC_SIGNATURE, 4)) { 230 printk(KERN_ERR "MPTABLE: bad signature [%c%c%c%c]!\n", 231 mpc->signature[0], mpc->signature[1], 232 mpc->signature[2], mpc->signature[3]); 233 return 0; 234 } 235 if (mpf_checksum((unsigned char *)mpc, mpc->length)) { 236 printk(KERN_ERR "MPTABLE: checksum error!\n"); 237 return 0; 238 } 239 if (mpc->spec != 0x01 && mpc->spec != 0x04) { 240 printk(KERN_ERR "MPTABLE: bad table version (%d)!!\n", 241 mpc->spec); 242 return 0; 243 } 244 if (!mpc->lapic) { 245 printk(KERN_ERR "MPTABLE: null local APIC address!\n"); 246 return 0; 247 } 248 memcpy(oem, mpc->oem, 8); 249 oem[8] = 0; 250 printk(KERN_INFO "MPTABLE: OEM ID: %s\n", oem); 251 252 memcpy(str, mpc->productid, 12); 253 str[12] = 0; 254 255 printk(KERN_INFO "MPTABLE: Product ID: %s\n", str); 256 257 printk(KERN_INFO "MPTABLE: APIC at: 0x%X\n", mpc->lapic); 258 259 return 1; 260 } 261 262 static void skip_entry(unsigned char **ptr, int *count, int size) 263 { 264 *ptr += size; 265 *count += size; 266 } 267 268 static void __init smp_dump_mptable(struct mpc_table *mpc, unsigned char *mpt) 269 { 270 printk(KERN_ERR "Your mptable is wrong, contact your HW vendor!\n" 271 "type %x\n", *mpt); 272 print_hex_dump(KERN_ERR, " ", DUMP_PREFIX_ADDRESS, 16, 273 1, mpc, mpc->length, 1); 274 } 275 276 void __init default_smp_read_mpc_oem(struct mpc_table *mpc) { } 277 278 static void __init smp_register_lapic_address(unsigned long address) 279 { 280 mp_lapic_addr = address; 281 282 set_fixmap_nocache(FIX_APIC_BASE, address); 283 if (boot_cpu_physical_apicid == -1U) { 284 boot_cpu_physical_apicid = read_apic_id(); 285 apic_version[boot_cpu_physical_apicid] = 286 GET_APIC_VERSION(apic_read(APIC_LVR)); 287 } 288 } 289 290 static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early) 291 { 292 char str[16]; 293 char oem[10]; 294 295 int count = sizeof(*mpc); 296 unsigned char *mpt = ((unsigned char *)mpc) + count; 297 298 if (!smp_check_mpc(mpc, oem, str)) 299 return 0; 300 301 #ifdef CONFIG_X86_32 302 generic_mps_oem_check(mpc, oem, str); 303 #endif 304 /* save the local APIC address, it might be non-default */ 305 if (!acpi_lapic) 306 mp_lapic_addr = mpc->lapic; 307 308 if (early) 309 return 1; 310 311 /* Initialize the lapic mapping */ 312 if (!acpi_lapic) 313 smp_register_lapic_address(mpc->lapic); 314 315 if (mpc->oemptr) 316 x86_init.mpparse.smp_read_mpc_oem(mpc); 317 318 /* 319 * Now process the configuration blocks. 320 */ 321 x86_init.mpparse.mpc_record(0); 322 323 while (count < mpc->length) { 324 switch (*mpt) { 325 case MP_PROCESSOR: 326 /* ACPI may have already provided this data */ 327 if (!acpi_lapic) 328 MP_processor_info((struct mpc_cpu *)mpt); 329 skip_entry(&mpt, &count, sizeof(struct mpc_cpu)); 330 break; 331 case MP_BUS: 332 MP_bus_info((struct mpc_bus *)mpt); 333 skip_entry(&mpt, &count, sizeof(struct mpc_bus)); 334 break; 335 case MP_IOAPIC: 336 MP_ioapic_info((struct mpc_ioapic *)mpt); 337 skip_entry(&mpt, &count, sizeof(struct mpc_ioapic)); 338 break; 339 case MP_INTSRC: 340 MP_intsrc_info((struct mpc_intsrc *)mpt); 341 skip_entry(&mpt, &count, sizeof(struct mpc_intsrc)); 342 break; 343 case MP_LINTSRC: 344 MP_lintsrc_info((struct mpc_lintsrc *)mpt); 345 skip_entry(&mpt, &count, sizeof(struct mpc_lintsrc)); 346 break; 347 default: 348 /* wrong mptable */ 349 smp_dump_mptable(mpc, mpt); 350 count = mpc->length; 351 break; 352 } 353 x86_init.mpparse.mpc_record(1); 354 } 355 356 if (!num_processors) 357 printk(KERN_ERR "MPTABLE: no processors registered!\n"); 358 return num_processors; 359 } 360 361 #ifdef CONFIG_X86_IO_APIC 362 363 static int __init ELCR_trigger(unsigned int irq) 364 { 365 unsigned int port; 366 367 port = 0x4d0 + (irq >> 3); 368 return (inb(port) >> (irq & 7)) & 1; 369 } 370 371 static void __init construct_default_ioirq_mptable(int mpc_default_type) 372 { 373 struct mpc_intsrc intsrc; 374 int i; 375 int ELCR_fallback = 0; 376 377 intsrc.type = MP_INTSRC; 378 intsrc.irqflag = 0; /* conforming */ 379 intsrc.srcbus = 0; 380 intsrc.dstapic = mp_ioapics[0].apicid; 381 382 intsrc.irqtype = mp_INT; 383 384 /* 385 * If true, we have an ISA/PCI system with no IRQ entries 386 * in the MP table. To prevent the PCI interrupts from being set up 387 * incorrectly, we try to use the ELCR. The sanity check to see if 388 * there is good ELCR data is very simple - IRQ0, 1, 2 and 13 can 389 * never be level sensitive, so we simply see if the ELCR agrees. 390 * If it does, we assume it's valid. 391 */ 392 if (mpc_default_type == 5) { 393 printk(KERN_INFO "ISA/PCI bus type with no IRQ information... " 394 "falling back to ELCR\n"); 395 396 if (ELCR_trigger(0) || ELCR_trigger(1) || ELCR_trigger(2) || 397 ELCR_trigger(13)) 398 printk(KERN_ERR "ELCR contains invalid data... " 399 "not using ELCR\n"); 400 else { 401 printk(KERN_INFO 402 "Using ELCR to identify PCI interrupts\n"); 403 ELCR_fallback = 1; 404 } 405 } 406 407 for (i = 0; i < 16; i++) { 408 switch (mpc_default_type) { 409 case 2: 410 if (i == 0 || i == 13) 411 continue; /* IRQ0 & IRQ13 not connected */ 412 /* fall through */ 413 default: 414 if (i == 2) 415 continue; /* IRQ2 is never connected */ 416 } 417 418 if (ELCR_fallback) { 419 /* 420 * If the ELCR indicates a level-sensitive interrupt, we 421 * copy that information over to the MP table in the 422 * irqflag field (level sensitive, active high polarity). 423 */ 424 if (ELCR_trigger(i)) 425 intsrc.irqflag = 13; 426 else 427 intsrc.irqflag = 0; 428 } 429 430 intsrc.srcbusirq = i; 431 intsrc.dstirq = i ? i : 2; /* IRQ0 to INTIN2 */ 432 MP_intsrc_info(&intsrc); 433 } 434 435 intsrc.irqtype = mp_ExtINT; 436 intsrc.srcbusirq = 0; 437 intsrc.dstirq = 0; /* 8259A to INTIN0 */ 438 MP_intsrc_info(&intsrc); 439 } 440 441 442 static void __init construct_ioapic_table(int mpc_default_type) 443 { 444 struct mpc_ioapic ioapic; 445 struct mpc_bus bus; 446 447 bus.type = MP_BUS; 448 bus.busid = 0; 449 switch (mpc_default_type) { 450 default: 451 printk(KERN_ERR "???\nUnknown standard configuration %d\n", 452 mpc_default_type); 453 /* fall through */ 454 case 1: 455 case 5: 456 memcpy(bus.bustype, "ISA ", 6); 457 break; 458 case 2: 459 case 6: 460 case 3: 461 memcpy(bus.bustype, "EISA ", 6); 462 break; 463 case 4: 464 case 7: 465 memcpy(bus.bustype, "MCA ", 6); 466 } 467 MP_bus_info(&bus); 468 if (mpc_default_type > 4) { 469 bus.busid = 1; 470 memcpy(bus.bustype, "PCI ", 6); 471 MP_bus_info(&bus); 472 } 473 474 ioapic.type = MP_IOAPIC; 475 ioapic.apicid = 2; 476 ioapic.apicver = mpc_default_type > 4 ? 0x10 : 0x01; 477 ioapic.flags = MPC_APIC_USABLE; 478 ioapic.apicaddr = IO_APIC_DEFAULT_PHYS_BASE; 479 MP_ioapic_info(&ioapic); 480 481 /* 482 * We set up most of the low 16 IO-APIC pins according to MPS rules. 483 */ 484 construct_default_ioirq_mptable(mpc_default_type); 485 } 486 #else 487 static inline void __init construct_ioapic_table(int mpc_default_type) { } 488 #endif 489 490 static inline void __init construct_default_ISA_mptable(int mpc_default_type) 491 { 492 struct mpc_cpu processor; 493 struct mpc_lintsrc lintsrc; 494 int linttypes[2] = { mp_ExtINT, mp_NMI }; 495 int i; 496 497 /* 498 * local APIC has default address 499 */ 500 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE; 501 502 /* 503 * 2 CPUs, numbered 0 & 1. 504 */ 505 processor.type = MP_PROCESSOR; 506 /* Either an integrated APIC or a discrete 82489DX. */ 507 processor.apicver = mpc_default_type > 4 ? 0x10 : 0x01; 508 processor.cpuflag = CPU_ENABLED; 509 processor.cpufeature = (boot_cpu_data.x86 << 8) | 510 (boot_cpu_data.x86_model << 4) | boot_cpu_data.x86_mask; 511 processor.featureflag = boot_cpu_data.x86_capability[0]; 512 processor.reserved[0] = 0; 513 processor.reserved[1] = 0; 514 for (i = 0; i < 2; i++) { 515 processor.apicid = i; 516 MP_processor_info(&processor); 517 } 518 519 construct_ioapic_table(mpc_default_type); 520 521 lintsrc.type = MP_LINTSRC; 522 lintsrc.irqflag = 0; /* conforming */ 523 lintsrc.srcbusid = 0; 524 lintsrc.srcbusirq = 0; 525 lintsrc.destapic = MP_APIC_ALL; 526 for (i = 0; i < 2; i++) { 527 lintsrc.irqtype = linttypes[i]; 528 lintsrc.destapiclint = i; 529 MP_lintsrc_info(&lintsrc); 530 } 531 } 532 533 static struct mpf_intel *mpf_found; 534 535 static unsigned long __init get_mpc_size(unsigned long physptr) 536 { 537 struct mpc_table *mpc; 538 unsigned long size; 539 540 mpc = early_ioremap(physptr, PAGE_SIZE); 541 size = mpc->length; 542 early_iounmap(mpc, PAGE_SIZE); 543 apic_printk(APIC_VERBOSE, " mpc: %lx-%lx\n", physptr, physptr + size); 544 545 return size; 546 } 547 548 static int __init check_physptr(struct mpf_intel *mpf, unsigned int early) 549 { 550 struct mpc_table *mpc; 551 unsigned long size; 552 553 size = get_mpc_size(mpf->physptr); 554 mpc = early_ioremap(mpf->physptr, size); 555 /* 556 * Read the physical hardware table. Anything here will 557 * override the defaults. 558 */ 559 if (!smp_read_mpc(mpc, early)) { 560 #ifdef CONFIG_X86_LOCAL_APIC 561 smp_found_config = 0; 562 #endif 563 printk(KERN_ERR "BIOS bug, MP table errors detected!...\n" 564 "... disabling SMP support. (tell your hw vendor)\n"); 565 early_iounmap(mpc, size); 566 return -1; 567 } 568 early_iounmap(mpc, size); 569 570 if (early) 571 return -1; 572 573 #ifdef CONFIG_X86_IO_APIC 574 /* 575 * If there are no explicit MP IRQ entries, then we are 576 * broken. We set up most of the low 16 IO-APIC pins to 577 * ISA defaults and hope it will work. 578 */ 579 if (!mp_irq_entries) { 580 struct mpc_bus bus; 581 582 printk(KERN_ERR "BIOS bug, no explicit IRQ entries, " 583 "using default mptable. (tell your hw vendor)\n"); 584 585 bus.type = MP_BUS; 586 bus.busid = 0; 587 memcpy(bus.bustype, "ISA ", 6); 588 MP_bus_info(&bus); 589 590 construct_default_ioirq_mptable(0); 591 } 592 #endif 593 594 return 0; 595 } 596 597 /* 598 * Scan the memory blocks for an SMP configuration block. 599 */ 600 void __init default_get_smp_config(unsigned int early) 601 { 602 struct mpf_intel *mpf = mpf_found; 603 604 if (!mpf) 605 return; 606 607 if (acpi_lapic && early) 608 return; 609 610 /* 611 * MPS doesn't support hyperthreading, aka only have 612 * thread 0 apic id in MPS table 613 */ 614 if (acpi_lapic && acpi_ioapic) 615 return; 616 617 printk(KERN_INFO "Intel MultiProcessor Specification v1.%d\n", 618 mpf->specification); 619 #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32) 620 if (mpf->feature2 & (1 << 7)) { 621 printk(KERN_INFO " IMCR and PIC compatibility mode.\n"); 622 pic_mode = 1; 623 } else { 624 printk(KERN_INFO " Virtual Wire compatibility mode.\n"); 625 pic_mode = 0; 626 } 627 #endif 628 /* 629 * Now see if we need to read further. 630 */ 631 if (mpf->feature1 != 0) { 632 if (early) { 633 /* 634 * local APIC has default address 635 */ 636 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE; 637 return; 638 } 639 640 printk(KERN_INFO "Default MP configuration #%d\n", 641 mpf->feature1); 642 construct_default_ISA_mptable(mpf->feature1); 643 644 } else if (mpf->physptr) { 645 if (check_physptr(mpf, early)) 646 return; 647 } else 648 BUG(); 649 650 if (!early) 651 printk(KERN_INFO "Processors: %d\n", num_processors); 652 /* 653 * Only use the first configuration found. 654 */ 655 } 656 657 static void __init smp_reserve_memory(struct mpf_intel *mpf) 658 { 659 unsigned long size = get_mpc_size(mpf->physptr); 660 661 memblock_x86_reserve_range(mpf->physptr, mpf->physptr+size, "* MP-table mpc"); 662 } 663 664 static int __init smp_scan_config(unsigned long base, unsigned long length) 665 { 666 unsigned int *bp = phys_to_virt(base); 667 struct mpf_intel *mpf; 668 unsigned long mem; 669 670 apic_printk(APIC_VERBOSE, "Scan SMP from %p for %ld bytes.\n", 671 bp, length); 672 BUILD_BUG_ON(sizeof(*mpf) != 16); 673 674 while (length > 0) { 675 mpf = (struct mpf_intel *)bp; 676 if ((*bp == SMP_MAGIC_IDENT) && 677 (mpf->length == 1) && 678 !mpf_checksum((unsigned char *)bp, 16) && 679 ((mpf->specification == 1) 680 || (mpf->specification == 4))) { 681 #ifdef CONFIG_X86_LOCAL_APIC 682 smp_found_config = 1; 683 #endif 684 mpf_found = mpf; 685 686 printk(KERN_INFO "found SMP MP-table at [%p] %llx\n", 687 mpf, (u64)virt_to_phys(mpf)); 688 689 mem = virt_to_phys(mpf); 690 memblock_x86_reserve_range(mem, mem + sizeof(*mpf), "* MP-table mpf"); 691 if (mpf->physptr) 692 smp_reserve_memory(mpf); 693 694 return 1; 695 } 696 bp += 4; 697 length -= 16; 698 } 699 return 0; 700 } 701 702 void __init default_find_smp_config(void) 703 { 704 unsigned int address; 705 706 /* 707 * FIXME: Linux assumes you have 640K of base ram.. 708 * this continues the error... 709 * 710 * 1) Scan the bottom 1K for a signature 711 * 2) Scan the top 1K of base RAM 712 * 3) Scan the 64K of bios 713 */ 714 if (smp_scan_config(0x0, 0x400) || 715 smp_scan_config(639 * 0x400, 0x400) || 716 smp_scan_config(0xF0000, 0x10000)) 717 return; 718 /* 719 * If it is an SMP machine we should know now, unless the 720 * configuration is in an EISA/MCA bus machine with an 721 * extended bios data area. 722 * 723 * there is a real-mode segmented pointer pointing to the 724 * 4K EBDA area at 0x40E, calculate and scan it here. 725 * 726 * NOTE! There are Linux loaders that will corrupt the EBDA 727 * area, and as such this kind of SMP config may be less 728 * trustworthy, simply because the SMP table may have been 729 * stomped on during early boot. These loaders are buggy and 730 * should be fixed. 731 * 732 * MP1.4 SPEC states to only scan first 1K of 4K EBDA. 733 */ 734 735 address = get_bios_ebda(); 736 if (address) 737 smp_scan_config(address, 0x400); 738 } 739 740 #ifdef CONFIG_X86_IO_APIC 741 static u8 __initdata irq_used[MAX_IRQ_SOURCES]; 742 743 static int __init get_MP_intsrc_index(struct mpc_intsrc *m) 744 { 745 int i; 746 747 if (m->irqtype != mp_INT) 748 return 0; 749 750 if (m->irqflag != 0x0f) 751 return 0; 752 753 /* not legacy */ 754 755 for (i = 0; i < mp_irq_entries; i++) { 756 if (mp_irqs[i].irqtype != mp_INT) 757 continue; 758 759 if (mp_irqs[i].irqflag != 0x0f) 760 continue; 761 762 if (mp_irqs[i].srcbus != m->srcbus) 763 continue; 764 if (mp_irqs[i].srcbusirq != m->srcbusirq) 765 continue; 766 if (irq_used[i]) { 767 /* already claimed */ 768 return -2; 769 } 770 irq_used[i] = 1; 771 return i; 772 } 773 774 /* not found */ 775 return -1; 776 } 777 778 #define SPARE_SLOT_NUM 20 779 780 static struct mpc_intsrc __initdata *m_spare[SPARE_SLOT_NUM]; 781 782 static void __init check_irq_src(struct mpc_intsrc *m, int *nr_m_spare) 783 { 784 int i; 785 786 apic_printk(APIC_VERBOSE, "OLD "); 787 print_MP_intsrc_info(m); 788 789 i = get_MP_intsrc_index(m); 790 if (i > 0) { 791 assign_to_mpc_intsrc(&mp_irqs[i], m); 792 apic_printk(APIC_VERBOSE, "NEW "); 793 print_mp_irq_info(&mp_irqs[i]); 794 return; 795 } 796 if (!i) { 797 /* legacy, do nothing */ 798 return; 799 } 800 if (*nr_m_spare < SPARE_SLOT_NUM) { 801 /* 802 * not found (-1), or duplicated (-2) are invalid entries, 803 * we need to use the slot later 804 */ 805 m_spare[*nr_m_spare] = m; 806 *nr_m_spare += 1; 807 } 808 } 809 #else /* CONFIG_X86_IO_APIC */ 810 static 811 inline void __init check_irq_src(struct mpc_intsrc *m, int *nr_m_spare) {} 812 #endif /* CONFIG_X86_IO_APIC */ 813 814 static int 815 check_slot(unsigned long mpc_new_phys, unsigned long mpc_new_length, int count) 816 { 817 int ret = 0; 818 819 if (!mpc_new_phys || count <= mpc_new_length) { 820 WARN(1, "update_mptable: No spare slots (length: %x)\n", count); 821 return -1; 822 } 823 824 return ret; 825 } 826 827 static int __init replace_intsrc_all(struct mpc_table *mpc, 828 unsigned long mpc_new_phys, 829 unsigned long mpc_new_length) 830 { 831 #ifdef CONFIG_X86_IO_APIC 832 int i; 833 #endif 834 int count = sizeof(*mpc); 835 int nr_m_spare = 0; 836 unsigned char *mpt = ((unsigned char *)mpc) + count; 837 838 printk(KERN_INFO "mpc_length %x\n", mpc->length); 839 while (count < mpc->length) { 840 switch (*mpt) { 841 case MP_PROCESSOR: 842 skip_entry(&mpt, &count, sizeof(struct mpc_cpu)); 843 break; 844 case MP_BUS: 845 skip_entry(&mpt, &count, sizeof(struct mpc_bus)); 846 break; 847 case MP_IOAPIC: 848 skip_entry(&mpt, &count, sizeof(struct mpc_ioapic)); 849 break; 850 case MP_INTSRC: 851 check_irq_src((struct mpc_intsrc *)mpt, &nr_m_spare); 852 skip_entry(&mpt, &count, sizeof(struct mpc_intsrc)); 853 break; 854 case MP_LINTSRC: 855 skip_entry(&mpt, &count, sizeof(struct mpc_lintsrc)); 856 break; 857 default: 858 /* wrong mptable */ 859 smp_dump_mptable(mpc, mpt); 860 goto out; 861 } 862 } 863 864 #ifdef CONFIG_X86_IO_APIC 865 for (i = 0; i < mp_irq_entries; i++) { 866 if (irq_used[i]) 867 continue; 868 869 if (mp_irqs[i].irqtype != mp_INT) 870 continue; 871 872 if (mp_irqs[i].irqflag != 0x0f) 873 continue; 874 875 if (nr_m_spare > 0) { 876 apic_printk(APIC_VERBOSE, "*NEW* found\n"); 877 nr_m_spare--; 878 assign_to_mpc_intsrc(&mp_irqs[i], m_spare[nr_m_spare]); 879 m_spare[nr_m_spare] = NULL; 880 } else { 881 struct mpc_intsrc *m = (struct mpc_intsrc *)mpt; 882 count += sizeof(struct mpc_intsrc); 883 if (check_slot(mpc_new_phys, mpc_new_length, count) < 0) 884 goto out; 885 assign_to_mpc_intsrc(&mp_irqs[i], m); 886 mpc->length = count; 887 mpt += sizeof(struct mpc_intsrc); 888 } 889 print_mp_irq_info(&mp_irqs[i]); 890 } 891 #endif 892 out: 893 /* update checksum */ 894 mpc->checksum = 0; 895 mpc->checksum -= mpf_checksum((unsigned char *)mpc, mpc->length); 896 897 return 0; 898 } 899 900 int enable_update_mptable; 901 902 static int __init update_mptable_setup(char *str) 903 { 904 enable_update_mptable = 1; 905 #ifdef CONFIG_PCI 906 pci_routeirq = 1; 907 #endif 908 return 0; 909 } 910 early_param("update_mptable", update_mptable_setup); 911 912 static unsigned long __initdata mpc_new_phys; 913 static unsigned long mpc_new_length __initdata = 4096; 914 915 /* alloc_mptable or alloc_mptable=4k */ 916 static int __initdata alloc_mptable; 917 static int __init parse_alloc_mptable_opt(char *p) 918 { 919 enable_update_mptable = 1; 920 #ifdef CONFIG_PCI 921 pci_routeirq = 1; 922 #endif 923 alloc_mptable = 1; 924 if (!p) 925 return 0; 926 mpc_new_length = memparse(p, &p); 927 return 0; 928 } 929 early_param("alloc_mptable", parse_alloc_mptable_opt); 930 931 void __init early_reserve_e820_mpc_new(void) 932 { 933 if (enable_update_mptable && alloc_mptable) { 934 u64 startt = 0; 935 mpc_new_phys = early_reserve_e820(startt, mpc_new_length, 4); 936 } 937 } 938 939 static int __init update_mp_table(void) 940 { 941 char str[16]; 942 char oem[10]; 943 struct mpf_intel *mpf; 944 struct mpc_table *mpc, *mpc_new; 945 946 if (!enable_update_mptable) 947 return 0; 948 949 mpf = mpf_found; 950 if (!mpf) 951 return 0; 952 953 /* 954 * Now see if we need to go further. 955 */ 956 if (mpf->feature1 != 0) 957 return 0; 958 959 if (!mpf->physptr) 960 return 0; 961 962 mpc = phys_to_virt(mpf->physptr); 963 964 if (!smp_check_mpc(mpc, oem, str)) 965 return 0; 966 967 printk(KERN_INFO "mpf: %llx\n", (u64)virt_to_phys(mpf)); 968 printk(KERN_INFO "physptr: %x\n", mpf->physptr); 969 970 if (mpc_new_phys && mpc->length > mpc_new_length) { 971 mpc_new_phys = 0; 972 printk(KERN_INFO "mpc_new_length is %ld, please use alloc_mptable=8k\n", 973 mpc_new_length); 974 } 975 976 if (!mpc_new_phys) { 977 unsigned char old, new; 978 /* check if we can change the postion */ 979 mpc->checksum = 0; 980 old = mpf_checksum((unsigned char *)mpc, mpc->length); 981 mpc->checksum = 0xff; 982 new = mpf_checksum((unsigned char *)mpc, mpc->length); 983 if (old == new) { 984 printk(KERN_INFO "mpc is readonly, please try alloc_mptable instead\n"); 985 return 0; 986 } 987 printk(KERN_INFO "use in-positon replacing\n"); 988 } else { 989 mpf->physptr = mpc_new_phys; 990 mpc_new = phys_to_virt(mpc_new_phys); 991 memcpy(mpc_new, mpc, mpc->length); 992 mpc = mpc_new; 993 /* check if we can modify that */ 994 if (mpc_new_phys - mpf->physptr) { 995 struct mpf_intel *mpf_new; 996 /* steal 16 bytes from [0, 1k) */ 997 printk(KERN_INFO "mpf new: %x\n", 0x400 - 16); 998 mpf_new = phys_to_virt(0x400 - 16); 999 memcpy(mpf_new, mpf, 16); 1000 mpf = mpf_new; 1001 mpf->physptr = mpc_new_phys; 1002 } 1003 mpf->checksum = 0; 1004 mpf->checksum -= mpf_checksum((unsigned char *)mpf, 16); 1005 printk(KERN_INFO "physptr new: %x\n", mpf->physptr); 1006 } 1007 1008 /* 1009 * only replace the one with mp_INT and 1010 * MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 1011 * already in mp_irqs , stored by ... and mp_config_acpi_gsi, 1012 * may need pci=routeirq for all coverage 1013 */ 1014 replace_intsrc_all(mpc, mpc_new_phys, mpc_new_length); 1015 1016 return 0; 1017 } 1018 1019 late_initcall(update_mp_table); 1020