1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Jailhouse paravirt_ops implementation 4 * 5 * Copyright (c) Siemens AG, 2015-2017 6 * 7 * Authors: 8 * Jan Kiszka <jan.kiszka@siemens.com> 9 */ 10 11 #include <linux/acpi_pmtmr.h> 12 #include <linux/kernel.h> 13 #include <linux/reboot.h> 14 #include <linux/serial_8250.h> 15 #include <linux/acpi.h> 16 #include <asm/apic.h> 17 #include <asm/io_apic.h> 18 #include <asm/acpi.h> 19 #include <asm/cpu.h> 20 #include <asm/hypervisor.h> 21 #include <asm/i8259.h> 22 #include <asm/irqdomain.h> 23 #include <asm/pci_x86.h> 24 #include <asm/reboot.h> 25 #include <asm/setup.h> 26 #include <asm/jailhouse_para.h> 27 28 static struct jailhouse_setup_data setup_data; 29 #define SETUP_DATA_V1_LEN (sizeof(setup_data.hdr) + sizeof(setup_data.v1)) 30 #define SETUP_DATA_V2_LEN (SETUP_DATA_V1_LEN + sizeof(setup_data.v2)) 31 32 static unsigned int precalibrated_tsc_khz; 33 34 static void jailhouse_setup_irq(unsigned int irq) 35 { 36 struct mpc_intsrc mp_irq = { 37 .type = MP_INTSRC, 38 .irqtype = mp_INT, 39 .irqflag = MP_IRQPOL_ACTIVE_HIGH | MP_IRQTRIG_EDGE, 40 .srcbusirq = irq, 41 .dstirq = irq, 42 }; 43 mp_save_irq(&mp_irq); 44 } 45 46 static uint32_t jailhouse_cpuid_base(void) 47 { 48 if (boot_cpu_data.cpuid_level < 0 || 49 !boot_cpu_has(X86_FEATURE_HYPERVISOR)) 50 return 0; 51 52 return hypervisor_cpuid_base("Jailhouse\0\0\0", 0); 53 } 54 55 static uint32_t __init jailhouse_detect(void) 56 { 57 return jailhouse_cpuid_base(); 58 } 59 60 static void jailhouse_get_wallclock(struct timespec64 *now) 61 { 62 memset(now, 0, sizeof(*now)); 63 } 64 65 static void __init jailhouse_timer_init(void) 66 { 67 lapic_timer_period = setup_data.v1.apic_khz * (1000 / HZ); 68 } 69 70 static unsigned long jailhouse_get_tsc(void) 71 { 72 return precalibrated_tsc_khz; 73 } 74 75 static void __init jailhouse_x2apic_init(void) 76 { 77 #ifdef CONFIG_X86_X2APIC 78 if (!x2apic_enabled()) 79 return; 80 /* 81 * We do not have access to IR inside Jailhouse non-root cells. So 82 * we have to run in physical mode. 83 */ 84 x2apic_phys = 1; 85 /* 86 * This will trigger the switch to apic_x2apic_phys. Empty OEM IDs 87 * ensure that only this APIC driver picks up the call. 88 */ 89 default_acpi_madt_oem_check("", ""); 90 #endif 91 } 92 93 static void __init jailhouse_get_smp_config(unsigned int early) 94 { 95 struct ioapic_domain_cfg ioapic_cfg = { 96 .type = IOAPIC_DOMAIN_STRICT, 97 .ops = &mp_ioapic_irqdomain_ops, 98 }; 99 unsigned int cpu; 100 101 jailhouse_x2apic_init(); 102 103 register_lapic_address(0xfee00000); 104 105 for (cpu = 0; cpu < setup_data.v1.num_cpus; cpu++) 106 generic_processor_info(setup_data.v1.cpu_ids[cpu]); 107 108 smp_found_config = 1; 109 110 if (setup_data.v1.standard_ioapic) { 111 mp_register_ioapic(0, 0xfec00000, gsi_top, &ioapic_cfg); 112 113 if (IS_ENABLED(CONFIG_SERIAL_8250) && 114 setup_data.hdr.version < 2) { 115 /* Register 1:1 mapping for legacy UART IRQs 3 and 4 */ 116 jailhouse_setup_irq(3); 117 jailhouse_setup_irq(4); 118 } 119 } 120 } 121 122 static void jailhouse_no_restart(void) 123 { 124 pr_notice("Jailhouse: Restart not supported, halting\n"); 125 machine_halt(); 126 } 127 128 static int __init jailhouse_pci_arch_init(void) 129 { 130 pci_direct_init(1); 131 132 /* 133 * There are no bridges on the virtual PCI root bus under Jailhouse, 134 * thus no other way to discover all devices than a full scan. 135 * Respect any overrides via the command line, though. 136 */ 137 if (pcibios_last_bus < 0) 138 pcibios_last_bus = 0xff; 139 140 #ifdef CONFIG_PCI_MMCONFIG 141 if (setup_data.v1.pci_mmconfig_base) { 142 pci_mmconfig_add(0, 0, pcibios_last_bus, 143 setup_data.v1.pci_mmconfig_base); 144 pci_mmcfg_arch_init(); 145 } 146 #endif 147 148 return 0; 149 } 150 151 #ifdef CONFIG_SERIAL_8250 152 static inline bool jailhouse_uart_enabled(unsigned int uart_nr) 153 { 154 return setup_data.v2.flags & BIT(uart_nr); 155 } 156 157 static void jailhouse_serial_fixup(int port, struct uart_port *up, 158 u32 *capabilities) 159 { 160 static const u16 pcuart_base[] = {0x3f8, 0x2f8, 0x3e8, 0x2e8}; 161 unsigned int n; 162 163 for (n = 0; n < ARRAY_SIZE(pcuart_base); n++) { 164 if (pcuart_base[n] != up->iobase) 165 continue; 166 167 if (jailhouse_uart_enabled(n)) { 168 pr_info("Enabling UART%u (port 0x%lx)\n", n, 169 up->iobase); 170 jailhouse_setup_irq(up->irq); 171 } else { 172 /* Deactivate UART if access isn't allowed */ 173 up->iobase = 0; 174 } 175 break; 176 } 177 } 178 179 static void __init jailhouse_serial_workaround(void) 180 { 181 /* 182 * There are flags inside setup_data that indicate availability of 183 * platform UARTs since setup data version 2. 184 * 185 * In case of version 1, we don't know which UARTs belong Linux. In 186 * this case, unconditionally register 1:1 mapping for legacy UART IRQs 187 * 3 and 4. 188 */ 189 if (setup_data.hdr.version > 1) 190 serial8250_set_isa_configurator(jailhouse_serial_fixup); 191 } 192 #else /* !CONFIG_SERIAL_8250 */ 193 static inline void jailhouse_serial_workaround(void) 194 { 195 } 196 #endif /* CONFIG_SERIAL_8250 */ 197 198 static void __init jailhouse_init_platform(void) 199 { 200 u64 pa_data = boot_params.hdr.setup_data; 201 unsigned long setup_data_len; 202 struct setup_data header; 203 void *mapping; 204 205 x86_init.irqs.pre_vector_init = x86_init_noop; 206 x86_init.timers.timer_init = jailhouse_timer_init; 207 x86_init.mpparse.get_smp_config = jailhouse_get_smp_config; 208 x86_init.pci.arch_init = jailhouse_pci_arch_init; 209 210 x86_platform.calibrate_cpu = jailhouse_get_tsc; 211 x86_platform.calibrate_tsc = jailhouse_get_tsc; 212 x86_platform.get_wallclock = jailhouse_get_wallclock; 213 x86_platform.legacy.rtc = 0; 214 x86_platform.legacy.warm_reset = 0; 215 x86_platform.legacy.i8042 = X86_LEGACY_I8042_PLATFORM_ABSENT; 216 217 legacy_pic = &null_legacy_pic; 218 219 machine_ops.emergency_restart = jailhouse_no_restart; 220 221 while (pa_data) { 222 mapping = early_memremap(pa_data, sizeof(header)); 223 memcpy(&header, mapping, sizeof(header)); 224 early_memunmap(mapping, sizeof(header)); 225 226 if (header.type == SETUP_JAILHOUSE) 227 break; 228 229 pa_data = header.next; 230 } 231 232 if (!pa_data) 233 panic("Jailhouse: No valid setup data found"); 234 235 /* setup data must at least contain the header */ 236 if (header.len < sizeof(setup_data.hdr)) 237 goto unsupported; 238 239 pa_data += offsetof(struct setup_data, data); 240 setup_data_len = min_t(unsigned long, sizeof(setup_data), 241 (unsigned long)header.len); 242 mapping = early_memremap(pa_data, setup_data_len); 243 memcpy(&setup_data, mapping, setup_data_len); 244 early_memunmap(mapping, setup_data_len); 245 246 if (setup_data.hdr.version == 0 || 247 setup_data.hdr.compatible_version != 248 JAILHOUSE_SETUP_REQUIRED_VERSION || 249 (setup_data.hdr.version == 1 && header.len < SETUP_DATA_V1_LEN) || 250 (setup_data.hdr.version >= 2 && header.len < SETUP_DATA_V2_LEN)) 251 goto unsupported; 252 253 pmtmr_ioport = setup_data.v1.pm_timer_address; 254 pr_debug("Jailhouse: PM-Timer IO Port: %#x\n", pmtmr_ioport); 255 256 precalibrated_tsc_khz = setup_data.v1.tsc_khz; 257 setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ); 258 259 pci_probe = 0; 260 261 /* 262 * Avoid that the kernel complains about missing ACPI tables - there 263 * are none in a non-root cell. 264 */ 265 disable_acpi(); 266 267 jailhouse_serial_workaround(); 268 return; 269 270 unsupported: 271 panic("Jailhouse: Unsupported setup data structure"); 272 } 273 274 bool jailhouse_paravirt(void) 275 { 276 return jailhouse_cpuid_base() != 0; 277 } 278 279 static bool __init jailhouse_x2apic_available(void) 280 { 281 /* 282 * The x2APIC is only available if the root cell enabled it. Jailhouse 283 * does not support switching between xAPIC and x2APIC. 284 */ 285 return x2apic_enabled(); 286 } 287 288 const struct hypervisor_x86 x86_hyper_jailhouse __refconst = { 289 .name = "Jailhouse", 290 .detect = jailhouse_detect, 291 .init.init_platform = jailhouse_init_platform, 292 .init.x2apic_available = jailhouse_x2apic_available, 293 .ignore_nopv = true, 294 }; 295