1 /* 2 * 8253/PIT functions 3 * 4 */ 5 #include <linux/clockchips.h> 6 #include <linux/init.h> 7 #include <linux/interrupt.h> 8 #include <linux/jiffies.h> 9 #include <linux/module.h> 10 #include <linux/spinlock.h> 11 12 #include <asm/smp.h> 13 #include <asm/delay.h> 14 #include <asm/i8253.h> 15 #include <asm/io.h> 16 #include <asm/hpet.h> 17 18 DEFINE_SPINLOCK(i8253_lock); 19 EXPORT_SYMBOL(i8253_lock); 20 21 #ifdef CONFIG_X86_32 22 static void pit_disable_clocksource(void); 23 #else 24 static inline void pit_disable_clocksource(void) { } 25 #endif 26 27 /* 28 * HPET replaces the PIT, when enabled. So we need to know, which of 29 * the two timers is used 30 */ 31 struct clock_event_device *global_clock_event; 32 33 /* 34 * Initialize the PIT timer. 35 * 36 * This is also called after resume to bring the PIT into operation again. 37 */ 38 static void init_pit_timer(enum clock_event_mode mode, 39 struct clock_event_device *evt) 40 { 41 spin_lock(&i8253_lock); 42 43 switch(mode) { 44 case CLOCK_EVT_MODE_PERIODIC: 45 /* binary, mode 2, LSB/MSB, ch 0 */ 46 outb_pit(0x34, PIT_MODE); 47 outb_pit(LATCH & 0xff , PIT_CH0); /* LSB */ 48 outb_pit(LATCH >> 8 , PIT_CH0); /* MSB */ 49 break; 50 51 case CLOCK_EVT_MODE_SHUTDOWN: 52 case CLOCK_EVT_MODE_UNUSED: 53 if (evt->mode == CLOCK_EVT_MODE_PERIODIC || 54 evt->mode == CLOCK_EVT_MODE_ONESHOT) { 55 outb_pit(0x30, PIT_MODE); 56 outb_pit(0, PIT_CH0); 57 outb_pit(0, PIT_CH0); 58 } 59 pit_disable_clocksource(); 60 break; 61 62 case CLOCK_EVT_MODE_ONESHOT: 63 /* One shot setup */ 64 pit_disable_clocksource(); 65 outb_pit(0x38, PIT_MODE); 66 break; 67 68 case CLOCK_EVT_MODE_RESUME: 69 /* Nothing to do here */ 70 break; 71 } 72 spin_unlock(&i8253_lock); 73 } 74 75 /* 76 * Program the next event in oneshot mode 77 * 78 * Delta is given in PIT ticks 79 */ 80 static int pit_next_event(unsigned long delta, struct clock_event_device *evt) 81 { 82 spin_lock(&i8253_lock); 83 outb_pit(delta & 0xff , PIT_CH0); /* LSB */ 84 outb_pit(delta >> 8 , PIT_CH0); /* MSB */ 85 spin_unlock(&i8253_lock); 86 87 return 0; 88 } 89 90 /* 91 * On UP the PIT can serve all of the possible timer functions. On SMP systems 92 * it can be solely used for the global tick. 93 * 94 * The profiling and update capabilities are switched off once the local apic is 95 * registered. This mechanism replaces the previous #ifdef LOCAL_APIC - 96 * !using_apic_timer decisions in do_timer_interrupt_hook() 97 */ 98 static struct clock_event_device pit_clockevent = { 99 .name = "pit", 100 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, 101 .set_mode = init_pit_timer, 102 .set_next_event = pit_next_event, 103 .shift = 32, 104 .irq = 0, 105 }; 106 107 /* 108 * Initialize the conversion factor and the min/max deltas of the clock event 109 * structure and register the clock event source with the framework. 110 */ 111 void __init setup_pit_timer(void) 112 { 113 /* 114 * Start pit with the boot cpu mask and make it global after the 115 * IO_APIC has been initialized. 116 */ 117 pit_clockevent.cpumask = cpumask_of_cpu(smp_processor_id()); 118 pit_clockevent.mult = div_sc(CLOCK_TICK_RATE, NSEC_PER_SEC, 119 pit_clockevent.shift); 120 pit_clockevent.max_delta_ns = 121 clockevent_delta2ns(0x7FFF, &pit_clockevent); 122 pit_clockevent.min_delta_ns = 123 clockevent_delta2ns(0xF, &pit_clockevent); 124 clockevents_register_device(&pit_clockevent); 125 global_clock_event = &pit_clockevent; 126 } 127 128 #ifndef CONFIG_X86_64 129 /* 130 * Since the PIT overflows every tick, its not very useful 131 * to just read by itself. So use jiffies to emulate a free 132 * running counter: 133 */ 134 static cycle_t pit_read(void) 135 { 136 unsigned long flags; 137 int count; 138 u32 jifs; 139 static int old_count; 140 static u32 old_jifs; 141 142 spin_lock_irqsave(&i8253_lock, flags); 143 /* 144 * Although our caller may have the read side of xtime_lock, 145 * this is now a seqlock, and we are cheating in this routine 146 * by having side effects on state that we cannot undo if 147 * there is a collision on the seqlock and our caller has to 148 * retry. (Namely, old_jifs and old_count.) So we must treat 149 * jiffies as volatile despite the lock. We read jiffies 150 * before latching the timer count to guarantee that although 151 * the jiffies value might be older than the count (that is, 152 * the counter may underflow between the last point where 153 * jiffies was incremented and the point where we latch the 154 * count), it cannot be newer. 155 */ 156 jifs = jiffies; 157 outb_pit(0x00, PIT_MODE); /* latch the count ASAP */ 158 count = inb_pit(PIT_CH0); /* read the latched count */ 159 count |= inb_pit(PIT_CH0) << 8; 160 161 /* VIA686a test code... reset the latch if count > max + 1 */ 162 if (count > LATCH) { 163 outb_pit(0x34, PIT_MODE); 164 outb_pit(LATCH & 0xff, PIT_CH0); 165 outb_pit(LATCH >> 8, PIT_CH0); 166 count = LATCH - 1; 167 } 168 169 /* 170 * It's possible for count to appear to go the wrong way for a 171 * couple of reasons: 172 * 173 * 1. The timer counter underflows, but we haven't handled the 174 * resulting interrupt and incremented jiffies yet. 175 * 2. Hardware problem with the timer, not giving us continuous time, 176 * the counter does small "jumps" upwards on some Pentium systems, 177 * (see c't 95/10 page 335 for Neptun bug.) 178 * 179 * Previous attempts to handle these cases intelligently were 180 * buggy, so we just do the simple thing now. 181 */ 182 if (count > old_count && jifs == old_jifs) { 183 count = old_count; 184 } 185 old_count = count; 186 old_jifs = jifs; 187 188 spin_unlock_irqrestore(&i8253_lock, flags); 189 190 count = (LATCH - 1) - count; 191 192 return (cycle_t)(jifs * LATCH) + count; 193 } 194 195 static struct clocksource clocksource_pit = { 196 .name = "pit", 197 .rating = 110, 198 .read = pit_read, 199 .mask = CLOCKSOURCE_MASK(32), 200 .mult = 0, 201 .shift = 20, 202 }; 203 204 static void pit_disable_clocksource(void) 205 { 206 /* 207 * Use mult to check whether it is registered or not 208 */ 209 if (clocksource_pit.mult) { 210 clocksource_unregister(&clocksource_pit); 211 clocksource_pit.mult = 0; 212 } 213 } 214 215 static int __init init_pit_clocksource(void) 216 { 217 /* 218 * Several reasons not to register PIT as a clocksource: 219 * 220 * - On SMP PIT does not scale due to i8253_lock 221 * - when HPET is enabled 222 * - when local APIC timer is active (PIT is switched off) 223 */ 224 if (num_possible_cpus() > 1 || is_hpet_enabled() || 225 pit_clockevent.mode != CLOCK_EVT_MODE_PERIODIC) 226 return 0; 227 228 clocksource_pit.mult = clocksource_hz2mult(CLOCK_TICK_RATE, 229 clocksource_pit.shift); 230 return clocksource_register(&clocksource_pit); 231 } 232 arch_initcall(init_pit_clocksource); 233 234 #endif 235