xref: /openbmc/linux/arch/x86/kernel/head_32.S (revision baa7eb025ab14f3cba2e35c0a8648f9c9f01d24f) 
1/*
2 *
3 *  Copyright (C) 1991, 1992  Linus Torvalds
4 *
5 *  Enhanced CPU detection and feature setting code by Mike Jagdis
6 *  and Martin Mares, November 1997.
7 */
8
9.text
10#include <linux/threads.h>
11#include <linux/init.h>
12#include <linux/linkage.h>
13#include <asm/segment.h>
14#include <asm/page_types.h>
15#include <asm/pgtable_types.h>
16#include <asm/cache.h>
17#include <asm/thread_info.h>
18#include <asm/asm-offsets.h>
19#include <asm/setup.h>
20#include <asm/processor-flags.h>
21#include <asm/msr-index.h>
22#include <asm/cpufeature.h>
23#include <asm/percpu.h>
24
25/* Physical address */
26#define pa(X) ((X) - __PAGE_OFFSET)
27
28/*
29 * References to members of the new_cpu_data structure.
30 */
31
32#define X86		new_cpu_data+CPUINFO_x86
33#define X86_VENDOR	new_cpu_data+CPUINFO_x86_vendor
34#define X86_MODEL	new_cpu_data+CPUINFO_x86_model
35#define X86_MASK	new_cpu_data+CPUINFO_x86_mask
36#define X86_HARD_MATH	new_cpu_data+CPUINFO_hard_math
37#define X86_CPUID	new_cpu_data+CPUINFO_cpuid_level
38#define X86_CAPABILITY	new_cpu_data+CPUINFO_x86_capability
39#define X86_VENDOR_ID	new_cpu_data+CPUINFO_x86_vendor_id
40
41/*
42 * This is how much memory in addition to the memory covered up to
43 * and including _end we need mapped initially.
44 * We need:
45 *     (KERNEL_IMAGE_SIZE/4096) / 1024 pages (worst case, non PAE)
46 *     (KERNEL_IMAGE_SIZE/4096) / 512 + 4 pages (worst case for PAE)
47 *
48 * Modulo rounding, each megabyte assigned here requires a kilobyte of
49 * memory, which is currently unreclaimed.
50 *
51 * This should be a multiple of a page.
52 *
53 * KERNEL_IMAGE_SIZE should be greater than pa(_end)
54 * and small than max_low_pfn, otherwise will waste some page table entries
55 */
56
57#if PTRS_PER_PMD > 1
58#define PAGE_TABLE_SIZE(pages) (((pages) / PTRS_PER_PMD) + PTRS_PER_PGD)
59#else
60#define PAGE_TABLE_SIZE(pages) ((pages) / PTRS_PER_PGD)
61#endif
62
63/* Number of possible pages in the lowmem region */
64LOWMEM_PAGES = (((1<<32) - __PAGE_OFFSET) >> PAGE_SHIFT)
65
66/* Enough space to fit pagetables for the low memory linear map */
67MAPPING_BEYOND_END = PAGE_TABLE_SIZE(LOWMEM_PAGES) << PAGE_SHIFT
68
69/*
70 * Worst-case size of the kernel mapping we need to make:
71 * a relocatable kernel can live anywhere in lowmem, so we need to be able
72 * to map all of lowmem.
73 */
74KERNEL_PAGES = LOWMEM_PAGES
75
76INIT_MAP_SIZE = PAGE_TABLE_SIZE(KERNEL_PAGES) * PAGE_SIZE_asm
77RESERVE_BRK(pagetables, INIT_MAP_SIZE)
78
79/*
80 * 32-bit kernel entrypoint; only used by the boot CPU.  On entry,
81 * %esi points to the real-mode code as a 32-bit pointer.
82 * CS and DS must be 4 GB flat segments, but we don't depend on
83 * any particular GDT layout, because we load our own as soon as we
84 * can.
85 */
86__HEAD
87ENTRY(startup_32)
88	/* test KEEP_SEGMENTS flag to see if the bootloader is asking
89		us to not reload segments */
90	testb $(1<<6), BP_loadflags(%esi)
91	jnz 2f
92
93/*
94 * Set segments to known values.
95 */
96	lgdt pa(boot_gdt_descr)
97	movl $(__BOOT_DS),%eax
98	movl %eax,%ds
99	movl %eax,%es
100	movl %eax,%fs
101	movl %eax,%gs
1022:
103
104/*
105 * Clear BSS first so that there are no surprises...
106 */
107	cld
108	xorl %eax,%eax
109	movl $pa(__bss_start),%edi
110	movl $pa(__bss_stop),%ecx
111	subl %edi,%ecx
112	shrl $2,%ecx
113	rep ; stosl
114/*
115 * Copy bootup parameters out of the way.
116 * Note: %esi still has the pointer to the real-mode data.
117 * With the kexec as boot loader, parameter segment might be loaded beyond
118 * kernel image and might not even be addressable by early boot page tables.
119 * (kexec on panic case). Hence copy out the parameters before initializing
120 * page tables.
121 */
122	movl $pa(boot_params),%edi
123	movl $(PARAM_SIZE/4),%ecx
124	cld
125	rep
126	movsl
127	movl pa(boot_params) + NEW_CL_POINTER,%esi
128	andl %esi,%esi
129	jz 1f			# No comand line
130	movl $pa(boot_command_line),%edi
131	movl $(COMMAND_LINE_SIZE/4),%ecx
132	rep
133	movsl
1341:
135
136#ifdef CONFIG_OLPC_OPENFIRMWARE
137	/* save OFW's pgdir table for later use when calling into OFW */
138	movl %cr3, %eax
139	movl %eax, pa(olpc_ofw_pgd)
140#endif
141
142/*
143 * Initialize page tables.  This creates a PDE and a set of page
144 * tables, which are located immediately beyond __brk_base.  The variable
145 * _brk_end is set up to point to the first "safe" location.
146 * Mappings are created both at virtual address 0 (identity mapping)
147 * and PAGE_OFFSET for up to _end.
148 *
149 * Note that the stack is not yet set up!
150 */
151#ifdef CONFIG_X86_PAE
152
153	/*
154	 * In PAE mode initial_page_table is statically defined to contain
155	 * enough entries to cover the VMSPLIT option (that is the top 1, 2 or 3
156	 * entries). The identity mapping is handled by pointing two PGD entries
157	 * to the first kernel PMD.
158	 *
159	 * Note the upper half of each PMD or PTE are always zero at this stage.
160	 */
161
162#define KPMDS (((-__PAGE_OFFSET) >> 30) & 3) /* Number of kernel PMDs */
163
164	xorl %ebx,%ebx				/* %ebx is kept at zero */
165
166	movl $pa(__brk_base), %edi
167	movl $pa(initial_pg_pmd), %edx
168	movl $PTE_IDENT_ATTR, %eax
16910:
170	leal PDE_IDENT_ATTR(%edi),%ecx		/* Create PMD entry */
171	movl %ecx,(%edx)			/* Store PMD entry */
172						/* Upper half already zero */
173	addl $8,%edx
174	movl $512,%ecx
17511:
176	stosl
177	xchgl %eax,%ebx
178	stosl
179	xchgl %eax,%ebx
180	addl $0x1000,%eax
181	loop 11b
182
183	/*
184	 * End condition: we must map up to the end + MAPPING_BEYOND_END.
185	 */
186	movl $pa(_end) + MAPPING_BEYOND_END + PTE_IDENT_ATTR, %ebp
187	cmpl %ebp,%eax
188	jb 10b
1891:
190	addl $__PAGE_OFFSET, %edi
191	movl %edi, pa(_brk_end)
192	shrl $12, %eax
193	movl %eax, pa(max_pfn_mapped)
194
195	/* Do early initialization of the fixmap area */
196	movl $pa(initial_pg_fixmap)+PDE_IDENT_ATTR,%eax
197	movl %eax,pa(initial_pg_pmd+0x1000*KPMDS-8)
198#else	/* Not PAE */
199
200page_pde_offset = (__PAGE_OFFSET >> 20);
201
202	movl $pa(__brk_base), %edi
203	movl $pa(initial_page_table), %edx
204	movl $PTE_IDENT_ATTR, %eax
20510:
206	leal PDE_IDENT_ATTR(%edi),%ecx		/* Create PDE entry */
207	movl %ecx,(%edx)			/* Store identity PDE entry */
208	movl %ecx,page_pde_offset(%edx)		/* Store kernel PDE entry */
209	addl $4,%edx
210	movl $1024, %ecx
21111:
212	stosl
213	addl $0x1000,%eax
214	loop 11b
215	/*
216	 * End condition: we must map up to the end + MAPPING_BEYOND_END.
217	 */
218	movl $pa(_end) + MAPPING_BEYOND_END + PTE_IDENT_ATTR, %ebp
219	cmpl %ebp,%eax
220	jb 10b
221	addl $__PAGE_OFFSET, %edi
222	movl %edi, pa(_brk_end)
223	shrl $12, %eax
224	movl %eax, pa(max_pfn_mapped)
225
226	/* Do early initialization of the fixmap area */
227	movl $pa(initial_pg_fixmap)+PDE_IDENT_ATTR,%eax
228	movl %eax,pa(initial_page_table+0xffc)
229#endif
230
231#ifdef CONFIG_PARAVIRT
232	/* This is can only trip for a broken bootloader... */
233	cmpw $0x207, pa(boot_params + BP_version)
234	jb default_entry
235
236	/* Paravirt-compatible boot parameters.  Look to see what architecture
237		we're booting under. */
238	movl pa(boot_params + BP_hardware_subarch), %eax
239	cmpl $num_subarch_entries, %eax
240	jae bad_subarch
241
242	movl pa(subarch_entries)(,%eax,4), %eax
243	subl $__PAGE_OFFSET, %eax
244	jmp *%eax
245
246bad_subarch:
247WEAK(lguest_entry)
248WEAK(xen_entry)
249	/* Unknown implementation; there's really
250	   nothing we can do at this point. */
251	ud2a
252
253	__INITDATA
254
255subarch_entries:
256	.long default_entry		/* normal x86/PC */
257	.long lguest_entry		/* lguest hypervisor */
258	.long xen_entry			/* Xen hypervisor */
259	.long default_entry		/* Moorestown MID */
260num_subarch_entries = (. - subarch_entries) / 4
261.previous
262#else
263	jmp default_entry
264#endif /* CONFIG_PARAVIRT */
265
266/*
267 * Non-boot CPU entry point; entered from trampoline.S
268 * We can't lgdt here, because lgdt itself uses a data segment, but
269 * we know the trampoline has already loaded the boot_gdt for us.
270 *
271 * If cpu hotplug is not supported then this code can go in init section
272 * which will be freed later
273 */
274
275__CPUINIT
276
277#ifdef CONFIG_SMP
278ENTRY(startup_32_smp)
279	cld
280	movl $(__BOOT_DS),%eax
281	movl %eax,%ds
282	movl %eax,%es
283	movl %eax,%fs
284	movl %eax,%gs
285#endif /* CONFIG_SMP */
286default_entry:
287
288/*
289 *	New page tables may be in 4Mbyte page mode and may
290 *	be using the global pages.
291 *
292 *	NOTE! If we are on a 486 we may have no cr4 at all!
293 *	So we do not try to touch it unless we really have
294 *	some bits in it to set.  This won't work if the BSP
295 *	implements cr4 but this AP does not -- very unlikely
296 *	but be warned!  The same applies to the pse feature
297 *	if not equally supported. --macro
298 *
299 *	NOTE! We have to correct for the fact that we're
300 *	not yet offset PAGE_OFFSET..
301 */
302#define cr4_bits pa(mmu_cr4_features)
303	movl cr4_bits,%edx
304	andl %edx,%edx
305	jz 6f
306	movl %cr4,%eax		# Turn on paging options (PSE,PAE,..)
307	orl %edx,%eax
308	movl %eax,%cr4
309
310	testb $X86_CR4_PAE, %al		# check if PAE is enabled
311	jz 6f
312
313	/* Check if extended functions are implemented */
314	movl $0x80000000, %eax
315	cpuid
316	/* Value must be in the range 0x80000001 to 0x8000ffff */
317	subl $0x80000001, %eax
318	cmpl $(0x8000ffff-0x80000001), %eax
319	ja 6f
320
321	/* Clear bogus XD_DISABLE bits */
322	call verify_cpu
323
324	mov $0x80000001, %eax
325	cpuid
326	/* Execute Disable bit supported? */
327	btl $(X86_FEATURE_NX & 31), %edx
328	jnc 6f
329
330	/* Setup EFER (Extended Feature Enable Register) */
331	movl $MSR_EFER, %ecx
332	rdmsr
333
334	btsl $_EFER_NX, %eax
335	/* Make changes effective */
336	wrmsr
337
3386:
339
340/*
341 * Enable paging
342 */
343	movl $pa(initial_page_table), %eax
344	movl %eax,%cr3		/* set the page table pointer.. */
345	movl %cr0,%eax
346	orl  $X86_CR0_PG,%eax
347	movl %eax,%cr0		/* ..and set paging (PG) bit */
348	ljmp $__BOOT_CS,$1f	/* Clear prefetch and normalize %eip */
3491:
350	/* Set up the stack pointer */
351	lss stack_start,%esp
352
353/*
354 * Initialize eflags.  Some BIOS's leave bits like NT set.  This would
355 * confuse the debugger if this code is traced.
356 * XXX - best to initialize before switching to protected mode.
357 */
358	pushl $0
359	popfl
360
361#ifdef CONFIG_SMP
362	cmpb $0, ready
363	jz  1f				/* Initial CPU cleans BSS */
364	jmp checkCPUtype
3651:
366#endif /* CONFIG_SMP */
367
368/*
369 * start system 32-bit setup. We need to re-do some of the things done
370 * in 16-bit mode for the "real" operations.
371 */
372	call setup_idt
373
374checkCPUtype:
375
376	movl $-1,X86_CPUID		#  -1 for no CPUID initially
377
378/* check if it is 486 or 386. */
379/*
380 * XXX - this does a lot of unnecessary setup.  Alignment checks don't
381 * apply at our cpl of 0 and the stack ought to be aligned already, and
382 * we don't need to preserve eflags.
383 */
384
385	movb $3,X86		# at least 386
386	pushfl			# push EFLAGS
387	popl %eax		# get EFLAGS
388	movl %eax,%ecx		# save original EFLAGS
389	xorl $0x240000,%eax	# flip AC and ID bits in EFLAGS
390	pushl %eax		# copy to EFLAGS
391	popfl			# set EFLAGS
392	pushfl			# get new EFLAGS
393	popl %eax		# put it in eax
394	xorl %ecx,%eax		# change in flags
395	pushl %ecx		# restore original EFLAGS
396	popfl
397	testl $0x40000,%eax	# check if AC bit changed
398	je is386
399
400	movb $4,X86		# at least 486
401	testl $0x200000,%eax	# check if ID bit changed
402	je is486
403
404	/* get vendor info */
405	xorl %eax,%eax			# call CPUID with 0 -> return vendor ID
406	cpuid
407	movl %eax,X86_CPUID		# save CPUID level
408	movl %ebx,X86_VENDOR_ID		# lo 4 chars
409	movl %edx,X86_VENDOR_ID+4	# next 4 chars
410	movl %ecx,X86_VENDOR_ID+8	# last 4 chars
411
412	orl %eax,%eax			# do we have processor info as well?
413	je is486
414
415	movl $1,%eax		# Use the CPUID instruction to get CPU type
416	cpuid
417	movb %al,%cl		# save reg for future use
418	andb $0x0f,%ah		# mask processor family
419	movb %ah,X86
420	andb $0xf0,%al		# mask model
421	shrb $4,%al
422	movb %al,X86_MODEL
423	andb $0x0f,%cl		# mask mask revision
424	movb %cl,X86_MASK
425	movl %edx,X86_CAPABILITY
426
427is486:	movl $0x50022,%ecx	# set AM, WP, NE and MP
428	jmp 2f
429
430is386:	movl $2,%ecx		# set MP
4312:	movl %cr0,%eax
432	andl $0x80000011,%eax	# Save PG,PE,ET
433	orl %ecx,%eax
434	movl %eax,%cr0
435
436	call check_x87
437	lgdt early_gdt_descr
438	lidt idt_descr
439	ljmp $(__KERNEL_CS),$1f
4401:	movl $(__KERNEL_DS),%eax	# reload all the segment registers
441	movl %eax,%ss			# after changing gdt.
442
443	movl $(__USER_DS),%eax		# DS/ES contains default USER segment
444	movl %eax,%ds
445	movl %eax,%es
446
447	movl $(__KERNEL_PERCPU), %eax
448	movl %eax,%fs			# set this cpu's percpu
449
450#ifdef CONFIG_CC_STACKPROTECTOR
451	/*
452	 * The linker can't handle this by relocation.  Manually set
453	 * base address in stack canary segment descriptor.
454	 */
455	cmpb $0,ready
456	jne 1f
457	movl $gdt_page,%eax
458	movl $stack_canary,%ecx
459	movw %cx, 8 * GDT_ENTRY_STACK_CANARY + 2(%eax)
460	shrl $16, %ecx
461	movb %cl, 8 * GDT_ENTRY_STACK_CANARY + 4(%eax)
462	movb %ch, 8 * GDT_ENTRY_STACK_CANARY + 7(%eax)
4631:
464#endif
465	movl $(__KERNEL_STACK_CANARY),%eax
466	movl %eax,%gs
467
468	xorl %eax,%eax			# Clear LDT
469	lldt %ax
470
471	cld			# gcc2 wants the direction flag cleared at all times
472	pushl $0		# fake return address for unwinder
473#ifdef CONFIG_SMP
474	movb ready, %cl
475	movb $1, ready
476	cmpb $0,%cl		# the first CPU calls start_kernel
477	je   1f
478	movl (stack_start), %esp
4791:
480#endif /* CONFIG_SMP */
481	jmp *(initial_code)
482
483/*
484 * We depend on ET to be correct. This checks for 287/387.
485 */
486check_x87:
487	movb $0,X86_HARD_MATH
488	clts
489	fninit
490	fstsw %ax
491	cmpb $0,%al
492	je 1f
493	movl %cr0,%eax		/* no coprocessor: have to set bits */
494	xorl $4,%eax		/* set EM */
495	movl %eax,%cr0
496	ret
497	ALIGN
4981:	movb $1,X86_HARD_MATH
499	.byte 0xDB,0xE4		/* fsetpm for 287, ignored by 387 */
500	ret
501
502/*
503 *  setup_idt
504 *
505 *  sets up a idt with 256 entries pointing to
506 *  ignore_int, interrupt gates. It doesn't actually load
507 *  idt - that can be done only after paging has been enabled
508 *  and the kernel moved to PAGE_OFFSET. Interrupts
509 *  are enabled elsewhere, when we can be relatively
510 *  sure everything is ok.
511 *
512 *  Warning: %esi is live across this function.
513 */
514setup_idt:
515	lea ignore_int,%edx
516	movl $(__KERNEL_CS << 16),%eax
517	movw %dx,%ax		/* selector = 0x0010 = cs */
518	movw $0x8E00,%dx	/* interrupt gate - dpl=0, present */
519
520	lea idt_table,%edi
521	mov $256,%ecx
522rp_sidt:
523	movl %eax,(%edi)
524	movl %edx,4(%edi)
525	addl $8,%edi
526	dec %ecx
527	jne rp_sidt
528
529.macro	set_early_handler handler,trapno
530	lea \handler,%edx
531	movl $(__KERNEL_CS << 16),%eax
532	movw %dx,%ax
533	movw $0x8E00,%dx	/* interrupt gate - dpl=0, present */
534	lea idt_table,%edi
535	movl %eax,8*\trapno(%edi)
536	movl %edx,8*\trapno+4(%edi)
537.endm
538
539	set_early_handler handler=early_divide_err,trapno=0
540	set_early_handler handler=early_illegal_opcode,trapno=6
541	set_early_handler handler=early_protection_fault,trapno=13
542	set_early_handler handler=early_page_fault,trapno=14
543
544	ret
545
546early_divide_err:
547	xor %edx,%edx
548	pushl $0	/* fake errcode */
549	jmp early_fault
550
551early_illegal_opcode:
552	movl $6,%edx
553	pushl $0	/* fake errcode */
554	jmp early_fault
555
556early_protection_fault:
557	movl $13,%edx
558	jmp early_fault
559
560early_page_fault:
561	movl $14,%edx
562	jmp early_fault
563
564early_fault:
565	cld
566#ifdef CONFIG_PRINTK
567	pusha
568	movl $(__KERNEL_DS),%eax
569	movl %eax,%ds
570	movl %eax,%es
571	cmpl $2,early_recursion_flag
572	je hlt_loop
573	incl early_recursion_flag
574	movl %cr2,%eax
575	pushl %eax
576	pushl %edx		/* trapno */
577	pushl $fault_msg
578	call printk
579#endif
580	call dump_stack
581hlt_loop:
582	hlt
583	jmp hlt_loop
584
585/* This is the default interrupt "handler" :-) */
586	ALIGN
587ignore_int:
588	cld
589#ifdef CONFIG_PRINTK
590	pushl %eax
591	pushl %ecx
592	pushl %edx
593	pushl %es
594	pushl %ds
595	movl $(__KERNEL_DS),%eax
596	movl %eax,%ds
597	movl %eax,%es
598	cmpl $2,early_recursion_flag
599	je hlt_loop
600	incl early_recursion_flag
601	pushl 16(%esp)
602	pushl 24(%esp)
603	pushl 32(%esp)
604	pushl 40(%esp)
605	pushl $int_msg
606	call printk
607
608	call dump_stack
609
610	addl $(5*4),%esp
611	popl %ds
612	popl %es
613	popl %edx
614	popl %ecx
615	popl %eax
616#endif
617	iret
618
619#include "verify_cpu.S"
620
621	__REFDATA
622.align 4
623ENTRY(initial_code)
624	.long i386_start_kernel
625
626/*
627 * BSS section
628 */
629__PAGE_ALIGNED_BSS
630	.align PAGE_SIZE_asm
631#ifdef CONFIG_X86_PAE
632initial_pg_pmd:
633	.fill 1024*KPMDS,4,0
634#else
635ENTRY(initial_page_table)
636	.fill 1024,4,0
637#endif
638initial_pg_fixmap:
639	.fill 1024,4,0
640ENTRY(empty_zero_page)
641	.fill 4096,1,0
642ENTRY(swapper_pg_dir)
643	.fill 1024,4,0
644
645/*
646 * This starts the data section.
647 */
648#ifdef CONFIG_X86_PAE
649__PAGE_ALIGNED_DATA
650	/* Page-aligned for the benefit of paravirt? */
651	.align PAGE_SIZE_asm
652ENTRY(initial_page_table)
653	.long	pa(initial_pg_pmd+PGD_IDENT_ATTR),0	/* low identity map */
654# if KPMDS == 3
655	.long	pa(initial_pg_pmd+PGD_IDENT_ATTR),0
656	.long	pa(initial_pg_pmd+PGD_IDENT_ATTR+0x1000),0
657	.long	pa(initial_pg_pmd+PGD_IDENT_ATTR+0x2000),0
658# elif KPMDS == 2
659	.long	0,0
660	.long	pa(initial_pg_pmd+PGD_IDENT_ATTR),0
661	.long	pa(initial_pg_pmd+PGD_IDENT_ATTR+0x1000),0
662# elif KPMDS == 1
663	.long	0,0
664	.long	0,0
665	.long	pa(initial_pg_pmd+PGD_IDENT_ATTR),0
666# else
667#  error "Kernel PMDs should be 1, 2 or 3"
668# endif
669	.align PAGE_SIZE_asm		/* needs to be page-sized too */
670#endif
671
672.data
673ENTRY(stack_start)
674	.long init_thread_union+THREAD_SIZE
675	.long __BOOT_DS
676
677ready:	.byte 0
678
679early_recursion_flag:
680	.long 0
681
682int_msg:
683	.asciz "Unknown interrupt or fault at: %p %p %p\n"
684
685fault_msg:
686/* fault info: */
687	.ascii "BUG: Int %d: CR2 %p\n"
688/* pusha regs: */
689	.ascii "     EDI %p  ESI %p  EBP %p  ESP %p\n"
690	.ascii "     EBX %p  EDX %p  ECX %p  EAX %p\n"
691/* fault frame: */
692	.ascii "     err %p  EIP %p   CS %p  flg %p\n"
693	.ascii "Stack: %p %p %p %p %p %p %p %p\n"
694	.ascii "       %p %p %p %p %p %p %p %p\n"
695	.asciz "       %p %p %p %p %p %p %p %p\n"
696
697#include "../../x86/xen/xen-head.S"
698
699/*
700 * The IDT and GDT 'descriptors' are a strange 48-bit object
701 * only used by the lidt and lgdt instructions. They are not
702 * like usual segment descriptors - they consist of a 16-bit
703 * segment size, and 32-bit linear address value:
704 */
705
706.globl boot_gdt_descr
707.globl idt_descr
708
709	ALIGN
710# early boot GDT descriptor (must use 1:1 address mapping)
711	.word 0				# 32 bit align gdt_desc.address
712boot_gdt_descr:
713	.word __BOOT_DS+7
714	.long boot_gdt - __PAGE_OFFSET
715
716	.word 0				# 32-bit align idt_desc.address
717idt_descr:
718	.word IDT_ENTRIES*8-1		# idt contains 256 entries
719	.long idt_table
720
721# boot GDT descriptor (later on used by CPU#0):
722	.word 0				# 32 bit align gdt_desc.address
723ENTRY(early_gdt_descr)
724	.word GDT_ENTRIES*8-1
725	.long gdt_page			/* Overwritten for secondary CPUs */
726
727/*
728 * The boot_gdt must mirror the equivalent in setup.S and is
729 * used only for booting.
730 */
731	.align L1_CACHE_BYTES
732ENTRY(boot_gdt)
733	.fill GDT_ENTRY_BOOT_CS,8,0
734	.quad 0x00cf9a000000ffff	/* kernel 4GB code at 0x00000000 */
735	.quad 0x00cf92000000ffff	/* kernel 4GB data at 0x00000000 */
736