xref: /openbmc/linux/arch/x86/kernel/head_32.S (revision b24413180f5600bcb3bb70fbed5cf186b60864bd)
1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 *
4 *  Copyright (C) 1991, 1992  Linus Torvalds
5 *
6 *  Enhanced CPU detection and feature setting code by Mike Jagdis
7 *  and Martin Mares, November 1997.
8 */
9
10.text
11#include <linux/threads.h>
12#include <linux/init.h>
13#include <linux/linkage.h>
14#include <asm/segment.h>
15#include <asm/page_types.h>
16#include <asm/pgtable_types.h>
17#include <asm/cache.h>
18#include <asm/thread_info.h>
19#include <asm/asm-offsets.h>
20#include <asm/setup.h>
21#include <asm/processor-flags.h>
22#include <asm/msr-index.h>
23#include <asm/cpufeatures.h>
24#include <asm/percpu.h>
25#include <asm/nops.h>
26#include <asm/bootparam.h>
27#include <asm/export.h>
28#include <asm/pgtable_32.h>
29
30/* Physical address */
31#define pa(X) ((X) - __PAGE_OFFSET)
32
33/*
34 * References to members of the new_cpu_data structure.
35 */
36
37#define X86		new_cpu_data+CPUINFO_x86
38#define X86_VENDOR	new_cpu_data+CPUINFO_x86_vendor
39#define X86_MODEL	new_cpu_data+CPUINFO_x86_model
40#define X86_MASK	new_cpu_data+CPUINFO_x86_mask
41#define X86_HARD_MATH	new_cpu_data+CPUINFO_hard_math
42#define X86_CPUID	new_cpu_data+CPUINFO_cpuid_level
43#define X86_CAPABILITY	new_cpu_data+CPUINFO_x86_capability
44#define X86_VENDOR_ID	new_cpu_data+CPUINFO_x86_vendor_id
45
46
47#define SIZEOF_PTREGS 17*4
48
49/*
50 * Worst-case size of the kernel mapping we need to make:
51 * a relocatable kernel can live anywhere in lowmem, so we need to be able
52 * to map all of lowmem.
53 */
54KERNEL_PAGES = LOWMEM_PAGES
55
56INIT_MAP_SIZE = PAGE_TABLE_SIZE(KERNEL_PAGES) * PAGE_SIZE
57RESERVE_BRK(pagetables, INIT_MAP_SIZE)
58
59/*
60 * 32-bit kernel entrypoint; only used by the boot CPU.  On entry,
61 * %esi points to the real-mode code as a 32-bit pointer.
62 * CS and DS must be 4 GB flat segments, but we don't depend on
63 * any particular GDT layout, because we load our own as soon as we
64 * can.
65 */
66__HEAD
67ENTRY(startup_32)
68	movl pa(initial_stack),%ecx
69
70	/* test KEEP_SEGMENTS flag to see if the bootloader is asking
71		us to not reload segments */
72	testb $KEEP_SEGMENTS, BP_loadflags(%esi)
73	jnz 2f
74
75/*
76 * Set segments to known values.
77 */
78	lgdt pa(boot_gdt_descr)
79	movl $(__BOOT_DS),%eax
80	movl %eax,%ds
81	movl %eax,%es
82	movl %eax,%fs
83	movl %eax,%gs
84	movl %eax,%ss
852:
86	leal -__PAGE_OFFSET(%ecx),%esp
87
88/*
89 * Clear BSS first so that there are no surprises...
90 */
91	cld
92	xorl %eax,%eax
93	movl $pa(__bss_start),%edi
94	movl $pa(__bss_stop),%ecx
95	subl %edi,%ecx
96	shrl $2,%ecx
97	rep ; stosl
98/*
99 * Copy bootup parameters out of the way.
100 * Note: %esi still has the pointer to the real-mode data.
101 * With the kexec as boot loader, parameter segment might be loaded beyond
102 * kernel image and might not even be addressable by early boot page tables.
103 * (kexec on panic case). Hence copy out the parameters before initializing
104 * page tables.
105 */
106	movl $pa(boot_params),%edi
107	movl $(PARAM_SIZE/4),%ecx
108	cld
109	rep
110	movsl
111	movl pa(boot_params) + NEW_CL_POINTER,%esi
112	andl %esi,%esi
113	jz 1f			# No command line
114	movl $pa(boot_command_line),%edi
115	movl $(COMMAND_LINE_SIZE/4),%ecx
116	rep
117	movsl
1181:
119
120#ifdef CONFIG_OLPC
121	/* save OFW's pgdir table for later use when calling into OFW */
122	movl %cr3, %eax
123	movl %eax, pa(olpc_ofw_pgd)
124#endif
125
126#ifdef CONFIG_MICROCODE
127	/* Early load ucode on BSP. */
128	call load_ucode_bsp
129#endif
130
131	/* Create early pagetables. */
132	call  mk_early_pgtbl_32
133
134	/* Do early initialization of the fixmap area */
135	movl $pa(initial_pg_fixmap)+PDE_IDENT_ATTR,%eax
136#ifdef  CONFIG_X86_PAE
137#define KPMDS (((-__PAGE_OFFSET) >> 30) & 3) /* Number of kernel PMDs */
138	movl %eax,pa(initial_pg_pmd+0x1000*KPMDS-8)
139#else
140	movl %eax,pa(initial_page_table+0xffc)
141#endif
142
143#ifdef CONFIG_PARAVIRT
144	/* This is can only trip for a broken bootloader... */
145	cmpw $0x207, pa(boot_params + BP_version)
146	jb .Ldefault_entry
147
148	/* Paravirt-compatible boot parameters.  Look to see what architecture
149		we're booting under. */
150	movl pa(boot_params + BP_hardware_subarch), %eax
151	cmpl $num_subarch_entries, %eax
152	jae .Lbad_subarch
153
154	movl pa(subarch_entries)(,%eax,4), %eax
155	subl $__PAGE_OFFSET, %eax
156	jmp *%eax
157
158.Lbad_subarch:
159WEAK(xen_entry)
160	/* Unknown implementation; there's really
161	   nothing we can do at this point. */
162	ud2a
163
164	__INITDATA
165
166subarch_entries:
167	.long .Ldefault_entry		/* normal x86/PC */
168	.long xen_entry			/* Xen hypervisor */
169	.long .Ldefault_entry		/* Moorestown MID */
170num_subarch_entries = (. - subarch_entries) / 4
171.previous
172#else
173	jmp .Ldefault_entry
174#endif /* CONFIG_PARAVIRT */
175
176#ifdef CONFIG_HOTPLUG_CPU
177/*
178 * Boot CPU0 entry point. It's called from play_dead(). Everything has been set
179 * up already except stack. We just set up stack here. Then call
180 * start_secondary().
181 */
182ENTRY(start_cpu0)
183	movl initial_stack, %ecx
184	movl %ecx, %esp
185	call *(initial_code)
1861:	jmp 1b
187ENDPROC(start_cpu0)
188#endif
189
190/*
191 * Non-boot CPU entry point; entered from trampoline.S
192 * We can't lgdt here, because lgdt itself uses a data segment, but
193 * we know the trampoline has already loaded the boot_gdt for us.
194 *
195 * If cpu hotplug is not supported then this code can go in init section
196 * which will be freed later
197 */
198ENTRY(startup_32_smp)
199	cld
200	movl $(__BOOT_DS),%eax
201	movl %eax,%ds
202	movl %eax,%es
203	movl %eax,%fs
204	movl %eax,%gs
205	movl pa(initial_stack),%ecx
206	movl %eax,%ss
207	leal -__PAGE_OFFSET(%ecx),%esp
208
209#ifdef CONFIG_MICROCODE
210	/* Early load ucode on AP. */
211	call load_ucode_ap
212#endif
213
214.Ldefault_entry:
215#define CR0_STATE	(X86_CR0_PE | X86_CR0_MP | X86_CR0_ET | \
216			 X86_CR0_NE | X86_CR0_WP | X86_CR0_AM | \
217			 X86_CR0_PG)
218	movl $(CR0_STATE & ~X86_CR0_PG),%eax
219	movl %eax,%cr0
220
221/*
222 * We want to start out with EFLAGS unambiguously cleared. Some BIOSes leave
223 * bits like NT set. This would confuse the debugger if this code is traced. So
224 * initialize them properly now before switching to protected mode. That means
225 * DF in particular (even though we have cleared it earlier after copying the
226 * command line) because GCC expects it.
227 */
228	pushl $0
229	popfl
230
231/*
232 * New page tables may be in 4Mbyte page mode and may be using the global pages.
233 *
234 * NOTE! If we are on a 486 we may have no cr4 at all! Specifically, cr4 exists
235 * if and only if CPUID exists and has flags other than the FPU flag set.
236 */
237	movl $-1,pa(X86_CPUID)		# preset CPUID level
238	movl $X86_EFLAGS_ID,%ecx
239	pushl %ecx
240	popfl				# set EFLAGS=ID
241	pushfl
242	popl %eax			# get EFLAGS
243	testl $X86_EFLAGS_ID,%eax	# did EFLAGS.ID remained set?
244	jz .Lenable_paging		# hw disallowed setting of ID bit
245					# which means no CPUID and no CR4
246
247	xorl %eax,%eax
248	cpuid
249	movl %eax,pa(X86_CPUID)		# save largest std CPUID function
250
251	movl $1,%eax
252	cpuid
253	andl $~1,%edx			# Ignore CPUID.FPU
254	jz .Lenable_paging		# No flags or only CPUID.FPU = no CR4
255
256	movl pa(mmu_cr4_features),%eax
257	movl %eax,%cr4
258
259	testb $X86_CR4_PAE, %al		# check if PAE is enabled
260	jz .Lenable_paging
261
262	/* Check if extended functions are implemented */
263	movl $0x80000000, %eax
264	cpuid
265	/* Value must be in the range 0x80000001 to 0x8000ffff */
266	subl $0x80000001, %eax
267	cmpl $(0x8000ffff-0x80000001), %eax
268	ja .Lenable_paging
269
270	/* Clear bogus XD_DISABLE bits */
271	call verify_cpu
272
273	mov $0x80000001, %eax
274	cpuid
275	/* Execute Disable bit supported? */
276	btl $(X86_FEATURE_NX & 31), %edx
277	jnc .Lenable_paging
278
279	/* Setup EFER (Extended Feature Enable Register) */
280	movl $MSR_EFER, %ecx
281	rdmsr
282
283	btsl $_EFER_NX, %eax
284	/* Make changes effective */
285	wrmsr
286
287.Lenable_paging:
288
289/*
290 * Enable paging
291 */
292	movl $pa(initial_page_table), %eax
293	movl %eax,%cr3		/* set the page table pointer.. */
294	movl $CR0_STATE,%eax
295	movl %eax,%cr0		/* ..and set paging (PG) bit */
296	ljmp $__BOOT_CS,$1f	/* Clear prefetch and normalize %eip */
2971:
298	/* Shift the stack pointer to a virtual address */
299	addl $__PAGE_OFFSET, %esp
300
301/*
302 * start system 32-bit setup. We need to re-do some of the things done
303 * in 16-bit mode for the "real" operations.
304 */
305	movl setup_once_ref,%eax
306	andl %eax,%eax
307	jz 1f				# Did we do this already?
308	call *%eax
3091:
310
311/*
312 * Check if it is 486
313 */
314	movb $4,X86			# at least 486
315	cmpl $-1,X86_CPUID
316	je .Lis486
317
318	/* get vendor info */
319	xorl %eax,%eax			# call CPUID with 0 -> return vendor ID
320	cpuid
321	movl %eax,X86_CPUID		# save CPUID level
322	movl %ebx,X86_VENDOR_ID		# lo 4 chars
323	movl %edx,X86_VENDOR_ID+4	# next 4 chars
324	movl %ecx,X86_VENDOR_ID+8	# last 4 chars
325
326	orl %eax,%eax			# do we have processor info as well?
327	je .Lis486
328
329	movl $1,%eax		# Use the CPUID instruction to get CPU type
330	cpuid
331	movb %al,%cl		# save reg for future use
332	andb $0x0f,%ah		# mask processor family
333	movb %ah,X86
334	andb $0xf0,%al		# mask model
335	shrb $4,%al
336	movb %al,X86_MODEL
337	andb $0x0f,%cl		# mask mask revision
338	movb %cl,X86_MASK
339	movl %edx,X86_CAPABILITY
340
341.Lis486:
342	movl $0x50022,%ecx	# set AM, WP, NE and MP
343	movl %cr0,%eax
344	andl $0x80000011,%eax	# Save PG,PE,ET
345	orl %ecx,%eax
346	movl %eax,%cr0
347
348	lgdt early_gdt_descr
349	ljmp $(__KERNEL_CS),$1f
3501:	movl $(__KERNEL_DS),%eax	# reload all the segment registers
351	movl %eax,%ss			# after changing gdt.
352
353	movl $(__USER_DS),%eax		# DS/ES contains default USER segment
354	movl %eax,%ds
355	movl %eax,%es
356
357	movl $(__KERNEL_PERCPU), %eax
358	movl %eax,%fs			# set this cpu's percpu
359
360	movl $(__KERNEL_STACK_CANARY),%eax
361	movl %eax,%gs
362
363	xorl %eax,%eax			# Clear LDT
364	lldt %ax
365
366	call *(initial_code)
3671:	jmp 1b
368ENDPROC(startup_32_smp)
369
370#include "verify_cpu.S"
371
372/*
373 *  setup_once
374 *
375 *  The setup work we only want to run on the BSP.
376 *
377 *  Warning: %esi is live across this function.
378 */
379__INIT
380setup_once:
381#ifdef CONFIG_CC_STACKPROTECTOR
382	/*
383	 * Configure the stack canary. The linker can't handle this by
384	 * relocation.  Manually set base address in stack canary
385	 * segment descriptor.
386	 */
387	movl $gdt_page,%eax
388	movl $stack_canary,%ecx
389	movw %cx, 8 * GDT_ENTRY_STACK_CANARY + 2(%eax)
390	shrl $16, %ecx
391	movb %cl, 8 * GDT_ENTRY_STACK_CANARY + 4(%eax)
392	movb %ch, 8 * GDT_ENTRY_STACK_CANARY + 7(%eax)
393#endif
394
395	andl $0,setup_once_ref	/* Once is enough, thanks */
396	ret
397
398ENTRY(early_idt_handler_array)
399	# 36(%esp) %eflags
400	# 32(%esp) %cs
401	# 28(%esp) %eip
402	# 24(%rsp) error code
403	i = 0
404	.rept NUM_EXCEPTION_VECTORS
405	.ifeq (EXCEPTION_ERRCODE_MASK >> i) & 1
406	pushl $0		# Dummy error code, to make stack frame uniform
407	.endif
408	pushl $i		# 20(%esp) Vector number
409	jmp early_idt_handler_common
410	i = i + 1
411	.fill early_idt_handler_array + i*EARLY_IDT_HANDLER_SIZE - ., 1, 0xcc
412	.endr
413ENDPROC(early_idt_handler_array)
414
415early_idt_handler_common:
416	/*
417	 * The stack is the hardware frame, an error code or zero, and the
418	 * vector number.
419	 */
420	cld
421
422	incl %ss:early_recursion_flag
423
424	/* The vector number is in pt_regs->gs */
425
426	cld
427	pushl	%fs		/* pt_regs->fs (__fsh varies by model) */
428	pushl	%es		/* pt_regs->es (__esh varies by model) */
429	pushl	%ds		/* pt_regs->ds (__dsh varies by model) */
430	pushl	%eax		/* pt_regs->ax */
431	pushl	%ebp		/* pt_regs->bp */
432	pushl	%edi		/* pt_regs->di */
433	pushl	%esi		/* pt_regs->si */
434	pushl	%edx		/* pt_regs->dx */
435	pushl	%ecx		/* pt_regs->cx */
436	pushl	%ebx		/* pt_regs->bx */
437
438	/* Fix up DS and ES */
439	movl	$(__KERNEL_DS), %ecx
440	movl	%ecx, %ds
441	movl	%ecx, %es
442
443	/* Load the vector number into EDX */
444	movl	PT_GS(%esp), %edx
445
446	/* Load GS into pt_regs->gs (and maybe clobber __gsh) */
447	movw	%gs, PT_GS(%esp)
448
449	movl	%esp, %eax	/* args are pt_regs (EAX), trapnr (EDX) */
450	call	early_fixup_exception
451
452	popl	%ebx		/* pt_regs->bx */
453	popl	%ecx		/* pt_regs->cx */
454	popl	%edx		/* pt_regs->dx */
455	popl	%esi		/* pt_regs->si */
456	popl	%edi		/* pt_regs->di */
457	popl	%ebp		/* pt_regs->bp */
458	popl	%eax		/* pt_regs->ax */
459	popl	%ds		/* pt_regs->ds (always ignores __dsh) */
460	popl	%es		/* pt_regs->es (always ignores __esh) */
461	popl	%fs		/* pt_regs->fs (always ignores __fsh) */
462	popl	%gs		/* pt_regs->gs (always ignores __gsh) */
463	decl	%ss:early_recursion_flag
464	addl	$4, %esp	/* pop pt_regs->orig_ax */
465	iret
466ENDPROC(early_idt_handler_common)
467
468/* This is the default interrupt "handler" :-) */
469ENTRY(early_ignore_irq)
470	cld
471#ifdef CONFIG_PRINTK
472	pushl %eax
473	pushl %ecx
474	pushl %edx
475	pushl %es
476	pushl %ds
477	movl $(__KERNEL_DS),%eax
478	movl %eax,%ds
479	movl %eax,%es
480	cmpl $2,early_recursion_flag
481	je hlt_loop
482	incl early_recursion_flag
483	pushl 16(%esp)
484	pushl 24(%esp)
485	pushl 32(%esp)
486	pushl 40(%esp)
487	pushl $int_msg
488	call printk
489
490	call dump_stack
491
492	addl $(5*4),%esp
493	popl %ds
494	popl %es
495	popl %edx
496	popl %ecx
497	popl %eax
498#endif
499	iret
500
501hlt_loop:
502	hlt
503	jmp hlt_loop
504ENDPROC(early_ignore_irq)
505
506__INITDATA
507	.align 4
508GLOBAL(early_recursion_flag)
509	.long 0
510
511__REFDATA
512	.align 4
513ENTRY(initial_code)
514	.long i386_start_kernel
515ENTRY(setup_once_ref)
516	.long setup_once
517
518/*
519 * BSS section
520 */
521__PAGE_ALIGNED_BSS
522	.align PAGE_SIZE
523#ifdef CONFIG_X86_PAE
524.globl initial_pg_pmd
525initial_pg_pmd:
526	.fill 1024*KPMDS,4,0
527#else
528.globl initial_page_table
529initial_page_table:
530	.fill 1024,4,0
531#endif
532initial_pg_fixmap:
533	.fill 1024,4,0
534.globl empty_zero_page
535empty_zero_page:
536	.fill 4096,1,0
537.globl swapper_pg_dir
538swapper_pg_dir:
539	.fill 1024,4,0
540EXPORT_SYMBOL(empty_zero_page)
541
542/*
543 * This starts the data section.
544 */
545#ifdef CONFIG_X86_PAE
546__PAGE_ALIGNED_DATA
547	/* Page-aligned for the benefit of paravirt? */
548	.align PAGE_SIZE
549ENTRY(initial_page_table)
550	.long	pa(initial_pg_pmd+PGD_IDENT_ATTR),0	/* low identity map */
551# if KPMDS == 3
552	.long	pa(initial_pg_pmd+PGD_IDENT_ATTR),0
553	.long	pa(initial_pg_pmd+PGD_IDENT_ATTR+0x1000),0
554	.long	pa(initial_pg_pmd+PGD_IDENT_ATTR+0x2000),0
555# elif KPMDS == 2
556	.long	0,0
557	.long	pa(initial_pg_pmd+PGD_IDENT_ATTR),0
558	.long	pa(initial_pg_pmd+PGD_IDENT_ATTR+0x1000),0
559# elif KPMDS == 1
560	.long	0,0
561	.long	0,0
562	.long	pa(initial_pg_pmd+PGD_IDENT_ATTR),0
563# else
564#  error "Kernel PMDs should be 1, 2 or 3"
565# endif
566	.align PAGE_SIZE		/* needs to be page-sized too */
567#endif
568
569.data
570.balign 4
571ENTRY(initial_stack)
572	/*
573	 * The SIZEOF_PTREGS gap is a convention which helps the in-kernel
574	 * unwinder reliably detect the end of the stack.
575	 */
576	.long init_thread_union + THREAD_SIZE - SIZEOF_PTREGS - \
577	      TOP_OF_KERNEL_STACK_PADDING;
578
579__INITRODATA
580int_msg:
581	.asciz "Unknown interrupt or fault at: %p %p %p\n"
582
583#include "../../x86/xen/xen-head.S"
584
585/*
586 * The IDT and GDT 'descriptors' are a strange 48-bit object
587 * only used by the lidt and lgdt instructions. They are not
588 * like usual segment descriptors - they consist of a 16-bit
589 * segment size, and 32-bit linear address value:
590 */
591
592	.data
593.globl boot_gdt_descr
594
595	ALIGN
596# early boot GDT descriptor (must use 1:1 address mapping)
597	.word 0				# 32 bit align gdt_desc.address
598boot_gdt_descr:
599	.word __BOOT_DS+7
600	.long boot_gdt - __PAGE_OFFSET
601
602# boot GDT descriptor (later on used by CPU#0):
603	.word 0				# 32 bit align gdt_desc.address
604ENTRY(early_gdt_descr)
605	.word GDT_ENTRIES*8-1
606	.long gdt_page			/* Overwritten for secondary CPUs */
607
608/*
609 * The boot_gdt must mirror the equivalent in setup.S and is
610 * used only for booting.
611 */
612	.align L1_CACHE_BYTES
613ENTRY(boot_gdt)
614	.fill GDT_ENTRY_BOOT_CS,8,0
615	.quad 0x00cf9a000000ffff	/* kernel 4GB code at 0x00000000 */
616	.quad 0x00cf92000000ffff	/* kernel 4GB data at 0x00000000 */
617