19a163ed8SThomas Gleixner/* 29a163ed8SThomas Gleixner * 39a163ed8SThomas Gleixner * Copyright (C) 1991, 1992 Linus Torvalds 49a163ed8SThomas Gleixner * 59a163ed8SThomas Gleixner * Enhanced CPU detection and feature setting code by Mike Jagdis 69a163ed8SThomas Gleixner * and Martin Mares, November 1997. 79a163ed8SThomas Gleixner */ 89a163ed8SThomas Gleixner 99a163ed8SThomas Gleixner.text 109a163ed8SThomas Gleixner#include <linux/threads.h> 118b2f7fffSSam Ravnborg#include <linux/init.h> 129a163ed8SThomas Gleixner#include <linux/linkage.h> 139a163ed8SThomas Gleixner#include <asm/segment.h> 149a163ed8SThomas Gleixner#include <asm/page.h> 159a163ed8SThomas Gleixner#include <asm/pgtable.h> 169a163ed8SThomas Gleixner#include <asm/desc.h> 179a163ed8SThomas Gleixner#include <asm/cache.h> 189a163ed8SThomas Gleixner#include <asm/thread_info.h> 199a163ed8SThomas Gleixner#include <asm/asm-offsets.h> 209a163ed8SThomas Gleixner#include <asm/setup.h> 21551889a6SIan Campbell#include <asm/processor-flags.h> 22551889a6SIan Campbell 23551889a6SIan Campbell/* Physical address */ 24551889a6SIan Campbell#define pa(X) ((X) - __PAGE_OFFSET) 259a163ed8SThomas Gleixner 269a163ed8SThomas Gleixner/* 279a163ed8SThomas Gleixner * References to members of the new_cpu_data structure. 289a163ed8SThomas Gleixner */ 299a163ed8SThomas Gleixner 309a163ed8SThomas Gleixner#define X86 new_cpu_data+CPUINFO_x86 319a163ed8SThomas Gleixner#define X86_VENDOR new_cpu_data+CPUINFO_x86_vendor 329a163ed8SThomas Gleixner#define X86_MODEL new_cpu_data+CPUINFO_x86_model 339a163ed8SThomas Gleixner#define X86_MASK new_cpu_data+CPUINFO_x86_mask 349a163ed8SThomas Gleixner#define X86_HARD_MATH new_cpu_data+CPUINFO_hard_math 359a163ed8SThomas Gleixner#define X86_CPUID new_cpu_data+CPUINFO_cpuid_level 369a163ed8SThomas Gleixner#define X86_CAPABILITY new_cpu_data+CPUINFO_x86_capability 379a163ed8SThomas Gleixner#define X86_VENDOR_ID new_cpu_data+CPUINFO_x86_vendor_id 389a163ed8SThomas Gleixner 399a163ed8SThomas Gleixner/* 409a163ed8SThomas Gleixner * This is how much memory *in addition to the memory covered up to 419a163ed8SThomas Gleixner * and including _end* we need mapped initially. 429a163ed8SThomas Gleixner * We need: 439a163ed8SThomas Gleixner * - one bit for each possible page, but only in low memory, which means 449a163ed8SThomas Gleixner * 2^32/4096/8 = 128K worst case (4G/4G split.) 459a163ed8SThomas Gleixner * - enough space to map all low memory, which means 469a163ed8SThomas Gleixner * (2^32/4096) / 1024 pages (worst case, non PAE) 479a163ed8SThomas Gleixner * (2^32/4096) / 512 + 4 pages (worst case for PAE) 489a163ed8SThomas Gleixner * - a few pages for allocator use before the kernel pagetable has 499a163ed8SThomas Gleixner * been set up 509a163ed8SThomas Gleixner * 519a163ed8SThomas Gleixner * Modulo rounding, each megabyte assigned here requires a kilobyte of 529a163ed8SThomas Gleixner * memory, which is currently unreclaimed. 539a163ed8SThomas Gleixner * 549a163ed8SThomas Gleixner * This should be a multiple of a page. 559a163ed8SThomas Gleixner */ 569a163ed8SThomas GleixnerLOW_PAGES = 1<<(32-PAGE_SHIFT_asm) 579a163ed8SThomas Gleixner 581e3e1972SIngo Molnar/* 591e3e1972SIngo Molnar * To preserve the DMA pool in PAGEALLOC kernels, we'll allocate 601e3e1972SIngo Molnar * pagetables from above the 16MB DMA limit, so we'll have to set 611e3e1972SIngo Molnar * up pagetables 16MB more (worst-case): 621e3e1972SIngo Molnar */ 631e3e1972SIngo Molnar#ifdef CONFIG_DEBUG_PAGEALLOC 641e3e1972SIngo MolnarLOW_PAGES = LOW_PAGES + 0x1000000 651e3e1972SIngo Molnar#endif 661e3e1972SIngo Molnar 679a163ed8SThomas Gleixner#if PTRS_PER_PMD > 1 689a163ed8SThomas GleixnerPAGE_TABLE_SIZE = (LOW_PAGES / PTRS_PER_PMD) + PTRS_PER_PGD 699a163ed8SThomas Gleixner#else 709a163ed8SThomas GleixnerPAGE_TABLE_SIZE = (LOW_PAGES / PTRS_PER_PGD) 719a163ed8SThomas Gleixner#endif 729a163ed8SThomas GleixnerBOOTBITMAP_SIZE = LOW_PAGES / 8 739a163ed8SThomas GleixnerALLOCATOR_SLOP = 4 749a163ed8SThomas Gleixner 759a163ed8SThomas GleixnerINIT_MAP_BEYOND_END = BOOTBITMAP_SIZE + (PAGE_TABLE_SIZE + ALLOCATOR_SLOP)*PAGE_SIZE_asm 769a163ed8SThomas Gleixner 779a163ed8SThomas Gleixner/* 789a163ed8SThomas Gleixner * 32-bit kernel entrypoint; only used by the boot CPU. On entry, 799a163ed8SThomas Gleixner * %esi points to the real-mode code as a 32-bit pointer. 809a163ed8SThomas Gleixner * CS and DS must be 4 GB flat segments, but we don't depend on 819a163ed8SThomas Gleixner * any particular GDT layout, because we load our own as soon as we 829a163ed8SThomas Gleixner * can. 839a163ed8SThomas Gleixner */ 849a163ed8SThomas Gleixner.section .text.head,"ax",@progbits 859a163ed8SThomas GleixnerENTRY(startup_32) 86a24e7851SRusty Russell /* test KEEP_SEGMENTS flag to see if the bootloader is asking 87a24e7851SRusty Russell us to not reload segments */ 88a24e7851SRusty Russell testb $(1<<6), BP_loadflags(%esi) 89a24e7851SRusty Russell jnz 2f 909a163ed8SThomas Gleixner 919a163ed8SThomas Gleixner/* 929a163ed8SThomas Gleixner * Set segments to known values. 939a163ed8SThomas Gleixner */ 94551889a6SIan Campbell lgdt pa(boot_gdt_descr) 959a163ed8SThomas Gleixner movl $(__BOOT_DS),%eax 969a163ed8SThomas Gleixner movl %eax,%ds 979a163ed8SThomas Gleixner movl %eax,%es 989a163ed8SThomas Gleixner movl %eax,%fs 999a163ed8SThomas Gleixner movl %eax,%gs 100a24e7851SRusty Russell2: 1019a163ed8SThomas Gleixner 1029a163ed8SThomas Gleixner/* 1039a163ed8SThomas Gleixner * Clear BSS first so that there are no surprises... 1049a163ed8SThomas Gleixner */ 105a24e7851SRusty Russell cld 1069a163ed8SThomas Gleixner xorl %eax,%eax 107551889a6SIan Campbell movl $pa(__bss_start),%edi 108551889a6SIan Campbell movl $pa(__bss_stop),%ecx 1099a163ed8SThomas Gleixner subl %edi,%ecx 1109a163ed8SThomas Gleixner shrl $2,%ecx 1119a163ed8SThomas Gleixner rep ; stosl 1129a163ed8SThomas Gleixner/* 1139a163ed8SThomas Gleixner * Copy bootup parameters out of the way. 1149a163ed8SThomas Gleixner * Note: %esi still has the pointer to the real-mode data. 1159a163ed8SThomas Gleixner * With the kexec as boot loader, parameter segment might be loaded beyond 1169a163ed8SThomas Gleixner * kernel image and might not even be addressable by early boot page tables. 1179a163ed8SThomas Gleixner * (kexec on panic case). Hence copy out the parameters before initializing 1189a163ed8SThomas Gleixner * page tables. 1199a163ed8SThomas Gleixner */ 120551889a6SIan Campbell movl $pa(boot_params),%edi 1219a163ed8SThomas Gleixner movl $(PARAM_SIZE/4),%ecx 1229a163ed8SThomas Gleixner cld 1239a163ed8SThomas Gleixner rep 1249a163ed8SThomas Gleixner movsl 125551889a6SIan Campbell movl pa(boot_params) + NEW_CL_POINTER,%esi 1269a163ed8SThomas Gleixner andl %esi,%esi 127fa76dab9SH. Peter Anvin jz 1f # No comand line 128551889a6SIan Campbell movl $pa(boot_command_line),%edi 1299a163ed8SThomas Gleixner movl $(COMMAND_LINE_SIZE/4),%ecx 1309a163ed8SThomas Gleixner rep 1319a163ed8SThomas Gleixner movsl 1329a163ed8SThomas Gleixner1: 1339a163ed8SThomas Gleixner 134a24e7851SRusty Russell#ifdef CONFIG_PARAVIRT 135551889a6SIan Campbell /* This is can only trip for a broken bootloader... */ 136551889a6SIan Campbell cmpw $0x207, pa(boot_params + BP_version) 137a24e7851SRusty Russell jb default_entry 138a24e7851SRusty Russell 139a24e7851SRusty Russell /* Paravirt-compatible boot parameters. Look to see what architecture 140a24e7851SRusty Russell we're booting under. */ 141551889a6SIan Campbell movl pa(boot_params + BP_hardware_subarch), %eax 142a24e7851SRusty Russell cmpl $num_subarch_entries, %eax 143a24e7851SRusty Russell jae bad_subarch 144a24e7851SRusty Russell 145551889a6SIan Campbell movl pa(subarch_entries)(,%eax,4), %eax 146a24e7851SRusty Russell subl $__PAGE_OFFSET, %eax 147a24e7851SRusty Russell jmp *%eax 148a24e7851SRusty Russell 149a24e7851SRusty Russellbad_subarch: 150a24e7851SRusty RussellWEAK(lguest_entry) 151a24e7851SRusty RussellWEAK(xen_entry) 152a24e7851SRusty Russell /* Unknown implementation; there's really 153a24e7851SRusty Russell nothing we can do at this point. */ 154a24e7851SRusty Russell ud2a 1558b2f7fffSSam Ravnborg 1568b2f7fffSSam Ravnborg __INITDATA 1578b2f7fffSSam Ravnborg 158a24e7851SRusty Russellsubarch_entries: 159a24e7851SRusty Russell .long default_entry /* normal x86/PC */ 160a24e7851SRusty Russell .long lguest_entry /* lguest hypervisor */ 161a24e7851SRusty Russell .long xen_entry /* Xen hypervisor */ 162a24e7851SRusty Russellnum_subarch_entries = (. - subarch_entries) / 4 163a24e7851SRusty Russell.previous 164a24e7851SRusty Russell#endif /* CONFIG_PARAVIRT */ 165a24e7851SRusty Russell 1669a163ed8SThomas Gleixner/* 1679a163ed8SThomas Gleixner * Initialize page tables. This creates a PDE and a set of page 1689a163ed8SThomas Gleixner * tables, which are located immediately beyond _end. The variable 1699a163ed8SThomas Gleixner * init_pg_tables_end is set up to point to the first "safe" location. 1709a163ed8SThomas Gleixner * Mappings are created both at virtual address 0 (identity mapping) 1719a163ed8SThomas Gleixner * and PAGE_OFFSET for up to _end+sizeof(page tables)+INIT_MAP_BEYOND_END. 1729a163ed8SThomas Gleixner * 173551889a6SIan Campbell * Note that the stack is not yet set up! 1749a163ed8SThomas Gleixner */ 175a24e7851SRusty Russelldefault_entry: 176551889a6SIan Campbell#ifdef CONFIG_X86_PAE 177551889a6SIan Campbell 178551889a6SIan Campbell /* 179551889a6SIan Campbell * In PAE mode swapper_pg_dir is statically defined to contain enough 180551889a6SIan Campbell * entries to cover the VMSPLIT option (that is the top 1, 2 or 3 181551889a6SIan Campbell * entries). The identity mapping is handled by pointing two PGD 182551889a6SIan Campbell * entries to the first kernel PMD. 183551889a6SIan Campbell * 184551889a6SIan Campbell * Note the upper half of each PMD or PTE are always zero at 185551889a6SIan Campbell * this stage. 186551889a6SIan Campbell */ 187551889a6SIan Campbell 18886b2b70eSJoe Korty#define KPMDS (((-__PAGE_OFFSET) >> 30) & 3) /* Number of kernel PMDs */ 189551889a6SIan Campbell 190551889a6SIan Campbell xorl %ebx,%ebx /* %ebx is kept at zero */ 191551889a6SIan Campbell 192551889a6SIan Campbell movl $pa(pg0), %edi 193f0d43100SYinghai Lu movl %edi, pa(init_pg_tables_start) 194551889a6SIan Campbell movl $pa(swapper_pg_pmd), %edx 195b2bc2731SSuresh Siddha movl $PTE_IDENT_ATTR, %eax 1969a163ed8SThomas Gleixner10: 197b2bc2731SSuresh Siddha leal PDE_IDENT_ATTR(%edi),%ecx /* Create PMD entry */ 198551889a6SIan Campbell movl %ecx,(%edx) /* Store PMD entry */ 199551889a6SIan Campbell /* Upper half already zero */ 200551889a6SIan Campbell addl $8,%edx 201551889a6SIan Campbell movl $512,%ecx 202551889a6SIan Campbell11: 203551889a6SIan Campbell stosl 204551889a6SIan Campbell xchgl %eax,%ebx 205551889a6SIan Campbell stosl 206551889a6SIan Campbell xchgl %eax,%ebx 207551889a6SIan Campbell addl $0x1000,%eax 208551889a6SIan Campbell loop 11b 209551889a6SIan Campbell 210551889a6SIan Campbell /* 211551889a6SIan Campbell * End condition: we must map up to and including INIT_MAP_BEYOND_END 212551889a6SIan Campbell * bytes beyond the end of our own page tables. 213551889a6SIan Campbell */ 214b2bc2731SSuresh Siddha leal (INIT_MAP_BEYOND_END+PTE_IDENT_ATTR)(%edi),%ebp 215551889a6SIan Campbell cmpl %ebp,%eax 216551889a6SIan Campbell jb 10b 217551889a6SIan Campbell1: 218551889a6SIan Campbell movl %edi,pa(init_pg_tables_end) 2196af61a76SYinghai Lu shrl $12, %eax 2206af61a76SYinghai Lu movl %eax, pa(max_pfn_mapped) 221551889a6SIan Campbell 222551889a6SIan Campbell /* Do early initialization of the fixmap area */ 223b2bc2731SSuresh Siddha movl $pa(swapper_pg_fixmap)+PDE_IDENT_ATTR,%eax 224551889a6SIan Campbell movl %eax,pa(swapper_pg_pmd+0x1000*KPMDS-8) 225551889a6SIan Campbell#else /* Not PAE */ 226551889a6SIan Campbell 227551889a6SIan Campbellpage_pde_offset = (__PAGE_OFFSET >> 20); 228551889a6SIan Campbell 229551889a6SIan Campbell movl $pa(pg0), %edi 230f0d43100SYinghai Lu movl %edi, pa(init_pg_tables_start) 231551889a6SIan Campbell movl $pa(swapper_pg_dir), %edx 232b2bc2731SSuresh Siddha movl $PTE_IDENT_ATTR, %eax 233551889a6SIan Campbell10: 234b2bc2731SSuresh Siddha leal PDE_IDENT_ATTR(%edi),%ecx /* Create PDE entry */ 2359a163ed8SThomas Gleixner movl %ecx,(%edx) /* Store identity PDE entry */ 2369a163ed8SThomas Gleixner movl %ecx,page_pde_offset(%edx) /* Store kernel PDE entry */ 2379a163ed8SThomas Gleixner addl $4,%edx 2389a163ed8SThomas Gleixner movl $1024, %ecx 2399a163ed8SThomas Gleixner11: 2409a163ed8SThomas Gleixner stosl 2419a163ed8SThomas Gleixner addl $0x1000,%eax 2429a163ed8SThomas Gleixner loop 11b 243551889a6SIan Campbell /* 244551889a6SIan Campbell * End condition: we must map up to and including INIT_MAP_BEYOND_END 245551889a6SIan Campbell * bytes beyond the end of our own page tables; the +0x007 is 246551889a6SIan Campbell * the attribute bits 247551889a6SIan Campbell */ 248b2bc2731SSuresh Siddha leal (INIT_MAP_BEYOND_END+PTE_IDENT_ATTR)(%edi),%ebp 2499a163ed8SThomas Gleixner cmpl %ebp,%eax 2509a163ed8SThomas Gleixner jb 10b 251551889a6SIan Campbell movl %edi,pa(init_pg_tables_end) 2526af61a76SYinghai Lu shrl $12, %eax 2536af61a76SYinghai Lu movl %eax, pa(max_pfn_mapped) 2549a163ed8SThomas Gleixner 255551889a6SIan Campbell /* Do early initialization of the fixmap area */ 256b2bc2731SSuresh Siddha movl $pa(swapper_pg_fixmap)+PDE_IDENT_ATTR,%eax 257551889a6SIan Campbell movl %eax,pa(swapper_pg_dir+0xffc) 258551889a6SIan Campbell#endif 2599a163ed8SThomas Gleixner jmp 3f 2609a163ed8SThomas Gleixner/* 2619a163ed8SThomas Gleixner * Non-boot CPU entry point; entered from trampoline.S 2629a163ed8SThomas Gleixner * We can't lgdt here, because lgdt itself uses a data segment, but 2639a163ed8SThomas Gleixner * we know the trampoline has already loaded the boot_gdt for us. 2649a163ed8SThomas Gleixner * 2659a163ed8SThomas Gleixner * If cpu hotplug is not supported then this code can go in init section 2669a163ed8SThomas Gleixner * which will be freed later 2679a163ed8SThomas Gleixner */ 2689a163ed8SThomas Gleixner 2699a163ed8SThomas Gleixner#ifndef CONFIG_HOTPLUG_CPU 2709a163ed8SThomas Gleixner.section .init.text,"ax",@progbits 2719a163ed8SThomas Gleixner#endif 2729a163ed8SThomas Gleixner 2739a163ed8SThomas Gleixner#ifdef CONFIG_SMP 2749a163ed8SThomas GleixnerENTRY(startup_32_smp) 2759a163ed8SThomas Gleixner cld 2769a163ed8SThomas Gleixner movl $(__BOOT_DS),%eax 2779a163ed8SThomas Gleixner movl %eax,%ds 2789a163ed8SThomas Gleixner movl %eax,%es 2799a163ed8SThomas Gleixner movl %eax,%fs 2809a163ed8SThomas Gleixner movl %eax,%gs 2815756dd59SIan Campbell#endif /* CONFIG_SMP */ 2825756dd59SIan Campbell3: 2839a163ed8SThomas Gleixner 2849a163ed8SThomas Gleixner/* 2859a163ed8SThomas Gleixner * New page tables may be in 4Mbyte page mode and may 2869a163ed8SThomas Gleixner * be using the global pages. 2879a163ed8SThomas Gleixner * 2889a163ed8SThomas Gleixner * NOTE! If we are on a 486 we may have no cr4 at all! 2899a163ed8SThomas Gleixner * So we do not try to touch it unless we really have 2909a163ed8SThomas Gleixner * some bits in it to set. This won't work if the BSP 2919a163ed8SThomas Gleixner * implements cr4 but this AP does not -- very unlikely 2929a163ed8SThomas Gleixner * but be warned! The same applies to the pse feature 2939a163ed8SThomas Gleixner * if not equally supported. --macro 2949a163ed8SThomas Gleixner * 2959a163ed8SThomas Gleixner * NOTE! We have to correct for the fact that we're 2969a163ed8SThomas Gleixner * not yet offset PAGE_OFFSET.. 2979a163ed8SThomas Gleixner */ 298551889a6SIan Campbell#define cr4_bits pa(mmu_cr4_features) 2999a163ed8SThomas Gleixner movl cr4_bits,%edx 3009a163ed8SThomas Gleixner andl %edx,%edx 3019a163ed8SThomas Gleixner jz 6f 3029a163ed8SThomas Gleixner movl %cr4,%eax # Turn on paging options (PSE,PAE,..) 3039a163ed8SThomas Gleixner orl %edx,%eax 3049a163ed8SThomas Gleixner movl %eax,%cr4 3059a163ed8SThomas Gleixner 3069a163ed8SThomas Gleixner btl $5, %eax # check if PAE is enabled 3079a163ed8SThomas Gleixner jnc 6f 3089a163ed8SThomas Gleixner 3099a163ed8SThomas Gleixner /* Check if extended functions are implemented */ 3109a163ed8SThomas Gleixner movl $0x80000000, %eax 3119a163ed8SThomas Gleixner cpuid 3129a163ed8SThomas Gleixner cmpl $0x80000000, %eax 3139a163ed8SThomas Gleixner jbe 6f 3149a163ed8SThomas Gleixner mov $0x80000001, %eax 3159a163ed8SThomas Gleixner cpuid 3169a163ed8SThomas Gleixner /* Execute Disable bit supported? */ 3179a163ed8SThomas Gleixner btl $20, %edx 3189a163ed8SThomas Gleixner jnc 6f 3199a163ed8SThomas Gleixner 3209a163ed8SThomas Gleixner /* Setup EFER (Extended Feature Enable Register) */ 3219a163ed8SThomas Gleixner movl $0xc0000080, %ecx 3229a163ed8SThomas Gleixner rdmsr 3239a163ed8SThomas Gleixner 3249a163ed8SThomas Gleixner btsl $11, %eax 3259a163ed8SThomas Gleixner /* Make changes effective */ 3269a163ed8SThomas Gleixner wrmsr 3279a163ed8SThomas Gleixner 3289a163ed8SThomas Gleixner6: 3299a163ed8SThomas Gleixner 3309a163ed8SThomas Gleixner/* 3319a163ed8SThomas Gleixner * Enable paging 3329a163ed8SThomas Gleixner */ 333551889a6SIan Campbell movl $pa(swapper_pg_dir),%eax 3349a163ed8SThomas Gleixner movl %eax,%cr3 /* set the page table pointer.. */ 3359a163ed8SThomas Gleixner movl %cr0,%eax 336551889a6SIan Campbell orl $X86_CR0_PG,%eax 3379a163ed8SThomas Gleixner movl %eax,%cr0 /* ..and set paging (PG) bit */ 3389a163ed8SThomas Gleixner ljmp $__BOOT_CS,$1f /* Clear prefetch and normalize %eip */ 3399a163ed8SThomas Gleixner1: 3409a163ed8SThomas Gleixner /* Set up the stack pointer */ 3419a163ed8SThomas Gleixner lss stack_start,%esp 3429a163ed8SThomas Gleixner 3439a163ed8SThomas Gleixner/* 3449a163ed8SThomas Gleixner * Initialize eflags. Some BIOS's leave bits like NT set. This would 3459a163ed8SThomas Gleixner * confuse the debugger if this code is traced. 3469a163ed8SThomas Gleixner * XXX - best to initialize before switching to protected mode. 3479a163ed8SThomas Gleixner */ 3489a163ed8SThomas Gleixner pushl $0 3499a163ed8SThomas Gleixner popfl 3509a163ed8SThomas Gleixner 3519a163ed8SThomas Gleixner#ifdef CONFIG_SMP 35250359501SIan Campbell cmpb $0, ready 3539a163ed8SThomas Gleixner jz 1f /* Initial CPU cleans BSS */ 3549a163ed8SThomas Gleixner jmp checkCPUtype 3559a163ed8SThomas Gleixner1: 3569a163ed8SThomas Gleixner#endif /* CONFIG_SMP */ 3579a163ed8SThomas Gleixner 3589a163ed8SThomas Gleixner/* 3599a163ed8SThomas Gleixner * start system 32-bit setup. We need to re-do some of the things done 3609a163ed8SThomas Gleixner * in 16-bit mode for the "real" operations. 3619a163ed8SThomas Gleixner */ 3629a163ed8SThomas Gleixner call setup_idt 3639a163ed8SThomas Gleixner 3649a163ed8SThomas GleixnercheckCPUtype: 3659a163ed8SThomas Gleixner 3669a163ed8SThomas Gleixner movl $-1,X86_CPUID # -1 for no CPUID initially 3679a163ed8SThomas Gleixner 3689a163ed8SThomas Gleixner/* check if it is 486 or 386. */ 3699a163ed8SThomas Gleixner/* 3709a163ed8SThomas Gleixner * XXX - this does a lot of unnecessary setup. Alignment checks don't 3719a163ed8SThomas Gleixner * apply at our cpl of 0 and the stack ought to be aligned already, and 3729a163ed8SThomas Gleixner * we don't need to preserve eflags. 3739a163ed8SThomas Gleixner */ 3749a163ed8SThomas Gleixner 3759a163ed8SThomas Gleixner movb $3,X86 # at least 386 3769a163ed8SThomas Gleixner pushfl # push EFLAGS 3779a163ed8SThomas Gleixner popl %eax # get EFLAGS 3789a163ed8SThomas Gleixner movl %eax,%ecx # save original EFLAGS 3799a163ed8SThomas Gleixner xorl $0x240000,%eax # flip AC and ID bits in EFLAGS 3809a163ed8SThomas Gleixner pushl %eax # copy to EFLAGS 3819a163ed8SThomas Gleixner popfl # set EFLAGS 3829a163ed8SThomas Gleixner pushfl # get new EFLAGS 3839a163ed8SThomas Gleixner popl %eax # put it in eax 3849a163ed8SThomas Gleixner xorl %ecx,%eax # change in flags 3859a163ed8SThomas Gleixner pushl %ecx # restore original EFLAGS 3869a163ed8SThomas Gleixner popfl 3879a163ed8SThomas Gleixner testl $0x40000,%eax # check if AC bit changed 3889a163ed8SThomas Gleixner je is386 3899a163ed8SThomas Gleixner 3909a163ed8SThomas Gleixner movb $4,X86 # at least 486 3919a163ed8SThomas Gleixner testl $0x200000,%eax # check if ID bit changed 3929a163ed8SThomas Gleixner je is486 3939a163ed8SThomas Gleixner 3949a163ed8SThomas Gleixner /* get vendor info */ 3959a163ed8SThomas Gleixner xorl %eax,%eax # call CPUID with 0 -> return vendor ID 3969a163ed8SThomas Gleixner cpuid 3979a163ed8SThomas Gleixner movl %eax,X86_CPUID # save CPUID level 3989a163ed8SThomas Gleixner movl %ebx,X86_VENDOR_ID # lo 4 chars 3999a163ed8SThomas Gleixner movl %edx,X86_VENDOR_ID+4 # next 4 chars 4009a163ed8SThomas Gleixner movl %ecx,X86_VENDOR_ID+8 # last 4 chars 4019a163ed8SThomas Gleixner 4029a163ed8SThomas Gleixner orl %eax,%eax # do we have processor info as well? 4039a163ed8SThomas Gleixner je is486 4049a163ed8SThomas Gleixner 4059a163ed8SThomas Gleixner movl $1,%eax # Use the CPUID instruction to get CPU type 4069a163ed8SThomas Gleixner cpuid 4079a163ed8SThomas Gleixner movb %al,%cl # save reg for future use 4089a163ed8SThomas Gleixner andb $0x0f,%ah # mask processor family 4099a163ed8SThomas Gleixner movb %ah,X86 4109a163ed8SThomas Gleixner andb $0xf0,%al # mask model 4119a163ed8SThomas Gleixner shrb $4,%al 4129a163ed8SThomas Gleixner movb %al,X86_MODEL 4139a163ed8SThomas Gleixner andb $0x0f,%cl # mask mask revision 4149a163ed8SThomas Gleixner movb %cl,X86_MASK 4159a163ed8SThomas Gleixner movl %edx,X86_CAPABILITY 4169a163ed8SThomas Gleixner 4179a163ed8SThomas Gleixneris486: movl $0x50022,%ecx # set AM, WP, NE and MP 4189a163ed8SThomas Gleixner jmp 2f 4199a163ed8SThomas Gleixner 4209a163ed8SThomas Gleixneris386: movl $2,%ecx # set MP 4219a163ed8SThomas Gleixner2: movl %cr0,%eax 4229a163ed8SThomas Gleixner andl $0x80000011,%eax # Save PG,PE,ET 4239a163ed8SThomas Gleixner orl %ecx,%eax 4249a163ed8SThomas Gleixner movl %eax,%cr0 4259a163ed8SThomas Gleixner 4269a163ed8SThomas Gleixner call check_x87 4279a163ed8SThomas Gleixner lgdt early_gdt_descr 4289a163ed8SThomas Gleixner lidt idt_descr 4299a163ed8SThomas Gleixner ljmp $(__KERNEL_CS),$1f 4309a163ed8SThomas Gleixner1: movl $(__KERNEL_DS),%eax # reload all the segment registers 4319a163ed8SThomas Gleixner movl %eax,%ss # after changing gdt. 4329a163ed8SThomas Gleixner movl %eax,%fs # gets reset once there's real percpu 4339a163ed8SThomas Gleixner 4349a163ed8SThomas Gleixner movl $(__USER_DS),%eax # DS/ES contains default USER segment 4359a163ed8SThomas Gleixner movl %eax,%ds 4369a163ed8SThomas Gleixner movl %eax,%es 4379a163ed8SThomas Gleixner 4389a163ed8SThomas Gleixner xorl %eax,%eax # Clear GS and LDT 4399a163ed8SThomas Gleixner movl %eax,%gs 4409a163ed8SThomas Gleixner lldt %ax 4419a163ed8SThomas Gleixner 4429a163ed8SThomas Gleixner cld # gcc2 wants the direction flag cleared at all times 4439a163ed8SThomas Gleixner pushl $0 # fake return address for unwinder 4449a163ed8SThomas Gleixner#ifdef CONFIG_SMP 4459a163ed8SThomas Gleixner movb ready, %cl 4469a163ed8SThomas Gleixner movb $1, ready 4479a163ed8SThomas Gleixner cmpb $0,%cl # the first CPU calls start_kernel 4489a163ed8SThomas Gleixner je 1f 4499a163ed8SThomas Gleixner movl $(__KERNEL_PERCPU), %eax 4509a163ed8SThomas Gleixner movl %eax,%fs # set this cpu's percpu 4513e970473SGlauber Costa movl (stack_start), %esp 4529a163ed8SThomas Gleixner1: 4539a163ed8SThomas Gleixner#endif /* CONFIG_SMP */ 454e3f77edfSGlauber Costa jmp *(initial_code) 4559a163ed8SThomas Gleixner 4569a163ed8SThomas Gleixner/* 4579a163ed8SThomas Gleixner * We depend on ET to be correct. This checks for 287/387. 4589a163ed8SThomas Gleixner */ 4599a163ed8SThomas Gleixnercheck_x87: 4609a163ed8SThomas Gleixner movb $0,X86_HARD_MATH 4619a163ed8SThomas Gleixner clts 4629a163ed8SThomas Gleixner fninit 4639a163ed8SThomas Gleixner fstsw %ax 4649a163ed8SThomas Gleixner cmpb $0,%al 4659a163ed8SThomas Gleixner je 1f 4669a163ed8SThomas Gleixner movl %cr0,%eax /* no coprocessor: have to set bits */ 4679a163ed8SThomas Gleixner xorl $4,%eax /* set EM */ 4689a163ed8SThomas Gleixner movl %eax,%cr0 4699a163ed8SThomas Gleixner ret 4709a163ed8SThomas Gleixner ALIGN 4719a163ed8SThomas Gleixner1: movb $1,X86_HARD_MATH 4729a163ed8SThomas Gleixner .byte 0xDB,0xE4 /* fsetpm for 287, ignored by 387 */ 4739a163ed8SThomas Gleixner ret 4749a163ed8SThomas Gleixner 4759a163ed8SThomas Gleixner/* 4769a163ed8SThomas Gleixner * setup_idt 4779a163ed8SThomas Gleixner * 4789a163ed8SThomas Gleixner * sets up a idt with 256 entries pointing to 4799a163ed8SThomas Gleixner * ignore_int, interrupt gates. It doesn't actually load 4809a163ed8SThomas Gleixner * idt - that can be done only after paging has been enabled 4819a163ed8SThomas Gleixner * and the kernel moved to PAGE_OFFSET. Interrupts 4829a163ed8SThomas Gleixner * are enabled elsewhere, when we can be relatively 4839a163ed8SThomas Gleixner * sure everything is ok. 4849a163ed8SThomas Gleixner * 4859a163ed8SThomas Gleixner * Warning: %esi is live across this function. 4869a163ed8SThomas Gleixner */ 4879a163ed8SThomas Gleixnersetup_idt: 4889a163ed8SThomas Gleixner lea ignore_int,%edx 4899a163ed8SThomas Gleixner movl $(__KERNEL_CS << 16),%eax 4909a163ed8SThomas Gleixner movw %dx,%ax /* selector = 0x0010 = cs */ 4919a163ed8SThomas Gleixner movw $0x8E00,%dx /* interrupt gate - dpl=0, present */ 4929a163ed8SThomas Gleixner 4939a163ed8SThomas Gleixner lea idt_table,%edi 4949a163ed8SThomas Gleixner mov $256,%ecx 4959a163ed8SThomas Gleixnerrp_sidt: 4969a163ed8SThomas Gleixner movl %eax,(%edi) 4979a163ed8SThomas Gleixner movl %edx,4(%edi) 4989a163ed8SThomas Gleixner addl $8,%edi 4999a163ed8SThomas Gleixner dec %ecx 5009a163ed8SThomas Gleixner jne rp_sidt 5019a163ed8SThomas Gleixner 5029a163ed8SThomas Gleixner.macro set_early_handler handler,trapno 5039a163ed8SThomas Gleixner lea \handler,%edx 5049a163ed8SThomas Gleixner movl $(__KERNEL_CS << 16),%eax 5059a163ed8SThomas Gleixner movw %dx,%ax 5069a163ed8SThomas Gleixner movw $0x8E00,%dx /* interrupt gate - dpl=0, present */ 5079a163ed8SThomas Gleixner lea idt_table,%edi 5089a163ed8SThomas Gleixner movl %eax,8*\trapno(%edi) 5099a163ed8SThomas Gleixner movl %edx,8*\trapno+4(%edi) 5109a163ed8SThomas Gleixner.endm 5119a163ed8SThomas Gleixner 5129a163ed8SThomas Gleixner set_early_handler handler=early_divide_err,trapno=0 5139a163ed8SThomas Gleixner set_early_handler handler=early_illegal_opcode,trapno=6 5149a163ed8SThomas Gleixner set_early_handler handler=early_protection_fault,trapno=13 5159a163ed8SThomas Gleixner set_early_handler handler=early_page_fault,trapno=14 5169a163ed8SThomas Gleixner 5179a163ed8SThomas Gleixner ret 5189a163ed8SThomas Gleixner 5199a163ed8SThomas Gleixnerearly_divide_err: 5209a163ed8SThomas Gleixner xor %edx,%edx 5219a163ed8SThomas Gleixner pushl $0 /* fake errcode */ 5229a163ed8SThomas Gleixner jmp early_fault 5239a163ed8SThomas Gleixner 5249a163ed8SThomas Gleixnerearly_illegal_opcode: 5259a163ed8SThomas Gleixner movl $6,%edx 5269a163ed8SThomas Gleixner pushl $0 /* fake errcode */ 5279a163ed8SThomas Gleixner jmp early_fault 5289a163ed8SThomas Gleixner 5299a163ed8SThomas Gleixnerearly_protection_fault: 5309a163ed8SThomas Gleixner movl $13,%edx 5319a163ed8SThomas Gleixner jmp early_fault 5329a163ed8SThomas Gleixner 5339a163ed8SThomas Gleixnerearly_page_fault: 5349a163ed8SThomas Gleixner movl $14,%edx 5359a163ed8SThomas Gleixner jmp early_fault 5369a163ed8SThomas Gleixner 5379a163ed8SThomas Gleixnerearly_fault: 5389a163ed8SThomas Gleixner cld 5399a163ed8SThomas Gleixner#ifdef CONFIG_PRINTK 540382f64abSIngo Molnar pusha 5419a163ed8SThomas Gleixner movl $(__KERNEL_DS),%eax 5429a163ed8SThomas Gleixner movl %eax,%ds 5439a163ed8SThomas Gleixner movl %eax,%es 5449a163ed8SThomas Gleixner cmpl $2,early_recursion_flag 5459a163ed8SThomas Gleixner je hlt_loop 5469a163ed8SThomas Gleixner incl early_recursion_flag 5479a163ed8SThomas Gleixner movl %cr2,%eax 5489a163ed8SThomas Gleixner pushl %eax 5499a163ed8SThomas Gleixner pushl %edx /* trapno */ 5509a163ed8SThomas Gleixner pushl $fault_msg 5519a163ed8SThomas Gleixner call printk 5529a163ed8SThomas Gleixner#endif 55394878efdSIngo Molnar call dump_stack 5549a163ed8SThomas Gleixnerhlt_loop: 5559a163ed8SThomas Gleixner hlt 5569a163ed8SThomas Gleixner jmp hlt_loop 5579a163ed8SThomas Gleixner 5589a163ed8SThomas Gleixner/* This is the default interrupt "handler" :-) */ 5599a163ed8SThomas Gleixner ALIGN 5609a163ed8SThomas Gleixnerignore_int: 5619a163ed8SThomas Gleixner cld 5629a163ed8SThomas Gleixner#ifdef CONFIG_PRINTK 5639a163ed8SThomas Gleixner pushl %eax 5649a163ed8SThomas Gleixner pushl %ecx 5659a163ed8SThomas Gleixner pushl %edx 5669a163ed8SThomas Gleixner pushl %es 5679a163ed8SThomas Gleixner pushl %ds 5689a163ed8SThomas Gleixner movl $(__KERNEL_DS),%eax 5699a163ed8SThomas Gleixner movl %eax,%ds 5709a163ed8SThomas Gleixner movl %eax,%es 5719a163ed8SThomas Gleixner cmpl $2,early_recursion_flag 5729a163ed8SThomas Gleixner je hlt_loop 5739a163ed8SThomas Gleixner incl early_recursion_flag 5749a163ed8SThomas Gleixner pushl 16(%esp) 5759a163ed8SThomas Gleixner pushl 24(%esp) 5769a163ed8SThomas Gleixner pushl 32(%esp) 5779a163ed8SThomas Gleixner pushl 40(%esp) 5789a163ed8SThomas Gleixner pushl $int_msg 5799a163ed8SThomas Gleixner call printk 580d5e397cbSIngo Molnar 581d5e397cbSIngo Molnar call dump_stack 582d5e397cbSIngo Molnar 5839a163ed8SThomas Gleixner addl $(5*4),%esp 5849a163ed8SThomas Gleixner popl %ds 5859a163ed8SThomas Gleixner popl %es 5869a163ed8SThomas Gleixner popl %edx 5879a163ed8SThomas Gleixner popl %ecx 5889a163ed8SThomas Gleixner popl %eax 5899a163ed8SThomas Gleixner#endif 5909a163ed8SThomas Gleixner iret 5919a163ed8SThomas Gleixner 592583323b9SThomas Gleixner.section .cpuinit.data,"wa" 593583323b9SThomas Gleixner.align 4 594583323b9SThomas GleixnerENTRY(initial_code) 595583323b9SThomas Gleixner .long i386_start_kernel 596583323b9SThomas Gleixner 5979a163ed8SThomas Gleixner.section .text 5989a163ed8SThomas Gleixner/* 5999a163ed8SThomas Gleixner * Real beginning of normal "text" segment 6009a163ed8SThomas Gleixner */ 6019a163ed8SThomas GleixnerENTRY(stext) 6029a163ed8SThomas GleixnerENTRY(_stext) 6039a163ed8SThomas Gleixner 6049a163ed8SThomas Gleixner/* 6059a163ed8SThomas Gleixner * BSS section 6069a163ed8SThomas Gleixner */ 6079a163ed8SThomas Gleixner.section ".bss.page_aligned","wa" 6089a163ed8SThomas Gleixner .align PAGE_SIZE_asm 609551889a6SIan Campbell#ifdef CONFIG_X86_PAE 610ed2b7e2bSAdrian Bunkswapper_pg_pmd: 611551889a6SIan Campbell .fill 1024*KPMDS,4,0 612551889a6SIan Campbell#else 6139a163ed8SThomas GleixnerENTRY(swapper_pg_dir) 6149a163ed8SThomas Gleixner .fill 1024,4,0 615551889a6SIan Campbell#endif 616aa65af3fSAdrian Bunkswapper_pg_fixmap: 6179a163ed8SThomas Gleixner .fill 1024,4,0 6189a163ed8SThomas GleixnerENTRY(empty_zero_page) 6199a163ed8SThomas Gleixner .fill 4096,1,0 6209a163ed8SThomas Gleixner/* 6219a163ed8SThomas Gleixner * This starts the data section. 6229a163ed8SThomas Gleixner */ 623551889a6SIan Campbell#ifdef CONFIG_X86_PAE 624551889a6SIan Campbell.section ".data.page_aligned","wa" 625551889a6SIan Campbell /* Page-aligned for the benefit of paravirt? */ 626551889a6SIan Campbell .align PAGE_SIZE_asm 627551889a6SIan CampbellENTRY(swapper_pg_dir) 628b2bc2731SSuresh Siddha .long pa(swapper_pg_pmd+PGD_IDENT_ATTR),0 /* low identity map */ 629551889a6SIan Campbell# if KPMDS == 3 630b2bc2731SSuresh Siddha .long pa(swapper_pg_pmd+PGD_IDENT_ATTR),0 631b2bc2731SSuresh Siddha .long pa(swapper_pg_pmd+PGD_IDENT_ATTR+0x1000),0 632b2bc2731SSuresh Siddha .long pa(swapper_pg_pmd+PGD_IDENT_ATTR+0x2000),0 633551889a6SIan Campbell# elif KPMDS == 2 634551889a6SIan Campbell .long 0,0 635b2bc2731SSuresh Siddha .long pa(swapper_pg_pmd+PGD_IDENT_ATTR),0 636b2bc2731SSuresh Siddha .long pa(swapper_pg_pmd+PGD_IDENT_ATTR+0x1000),0 637551889a6SIan Campbell# elif KPMDS == 1 638551889a6SIan Campbell .long 0,0 639551889a6SIan Campbell .long 0,0 640b2bc2731SSuresh Siddha .long pa(swapper_pg_pmd+PGD_IDENT_ATTR),0 641551889a6SIan Campbell# else 642551889a6SIan Campbell# error "Kernel PMDs should be 1, 2 or 3" 643551889a6SIan Campbell# endif 644551889a6SIan Campbell .align PAGE_SIZE_asm /* needs to be page-sized too */ 645551889a6SIan Campbell#endif 646551889a6SIan Campbell 6479a163ed8SThomas Gleixner.data 6489a163ed8SThomas GleixnerENTRY(stack_start) 6499a163ed8SThomas Gleixner .long init_thread_union+THREAD_SIZE 6509a163ed8SThomas Gleixner .long __BOOT_DS 6519a163ed8SThomas Gleixner 6529a163ed8SThomas Gleixnerready: .byte 0 6539a163ed8SThomas Gleixner 6549a163ed8SThomas Gleixnerearly_recursion_flag: 6559a163ed8SThomas Gleixner .long 0 6569a163ed8SThomas Gleixner 6579a163ed8SThomas Gleixnerint_msg: 658d5e397cbSIngo Molnar .asciz "Unknown interrupt or fault at: %p %p %p\n" 6599a163ed8SThomas Gleixner 6609a163ed8SThomas Gleixnerfault_msg: 661575ca735SVegard Nossum/* fault info: */ 662575ca735SVegard Nossum .ascii "BUG: Int %d: CR2 %p\n" 663575ca735SVegard Nossum/* pusha regs: */ 664575ca735SVegard Nossum .ascii " EDI %p ESI %p EBP %p ESP %p\n" 665575ca735SVegard Nossum .ascii " EBX %p EDX %p ECX %p EAX %p\n" 666575ca735SVegard Nossum/* fault frame: */ 667575ca735SVegard Nossum .ascii " err %p EIP %p CS %p flg %p\n" 668575ca735SVegard Nossum .ascii "Stack: %p %p %p %p %p %p %p %p\n" 669575ca735SVegard Nossum .ascii " %p %p %p %p %p %p %p %p\n" 670575ca735SVegard Nossum .asciz " %p %p %p %p %p %p %p %p\n" 6719a163ed8SThomas Gleixner 6729a163ed8SThomas Gleixner#include "../../x86/xen/xen-head.S" 6739a163ed8SThomas Gleixner 6749a163ed8SThomas Gleixner/* 6759a163ed8SThomas Gleixner * The IDT and GDT 'descriptors' are a strange 48-bit object 6769a163ed8SThomas Gleixner * only used by the lidt and lgdt instructions. They are not 6779a163ed8SThomas Gleixner * like usual segment descriptors - they consist of a 16-bit 6789a163ed8SThomas Gleixner * segment size, and 32-bit linear address value: 6799a163ed8SThomas Gleixner */ 6809a163ed8SThomas Gleixner 6819a163ed8SThomas Gleixner.globl boot_gdt_descr 6829a163ed8SThomas Gleixner.globl idt_descr 6839a163ed8SThomas Gleixner 6849a163ed8SThomas Gleixner ALIGN 6859a163ed8SThomas Gleixner# early boot GDT descriptor (must use 1:1 address mapping) 6869a163ed8SThomas Gleixner .word 0 # 32 bit align gdt_desc.address 6879a163ed8SThomas Gleixnerboot_gdt_descr: 6889a163ed8SThomas Gleixner .word __BOOT_DS+7 6899a163ed8SThomas Gleixner .long boot_gdt - __PAGE_OFFSET 6909a163ed8SThomas Gleixner 6919a163ed8SThomas Gleixner .word 0 # 32-bit align idt_desc.address 6929a163ed8SThomas Gleixneridt_descr: 6939a163ed8SThomas Gleixner .word IDT_ENTRIES*8-1 # idt contains 256 entries 6949a163ed8SThomas Gleixner .long idt_table 6959a163ed8SThomas Gleixner 6969a163ed8SThomas Gleixner# boot GDT descriptor (later on used by CPU#0): 6979a163ed8SThomas Gleixner .word 0 # 32 bit align gdt_desc.address 6989a163ed8SThomas GleixnerENTRY(early_gdt_descr) 6999a163ed8SThomas Gleixner .word GDT_ENTRIES*8-1 7009a163ed8SThomas Gleixner .long per_cpu__gdt_page /* Overwritten for secondary CPUs */ 7019a163ed8SThomas Gleixner 7029a163ed8SThomas Gleixner/* 7039a163ed8SThomas Gleixner * The boot_gdt must mirror the equivalent in setup.S and is 7049a163ed8SThomas Gleixner * used only for booting. 7059a163ed8SThomas Gleixner */ 7069a163ed8SThomas Gleixner .align L1_CACHE_BYTES 7079a163ed8SThomas GleixnerENTRY(boot_gdt) 7089a163ed8SThomas Gleixner .fill GDT_ENTRY_BOOT_CS,8,0 7099a163ed8SThomas Gleixner .quad 0x00cf9a000000ffff /* kernel 4GB code at 0x00000000 */ 7109a163ed8SThomas Gleixner .quad 0x00cf92000000ffff /* kernel 4GB data at 0x00000000 */ 711