19a163ed8SThomas Gleixner/* 29a163ed8SThomas Gleixner * 39a163ed8SThomas Gleixner * Copyright (C) 1991, 1992 Linus Torvalds 49a163ed8SThomas Gleixner * 59a163ed8SThomas Gleixner * Enhanced CPU detection and feature setting code by Mike Jagdis 69a163ed8SThomas Gleixner * and Martin Mares, November 1997. 79a163ed8SThomas Gleixner */ 89a163ed8SThomas Gleixner 99a163ed8SThomas Gleixner.text 109a163ed8SThomas Gleixner#include <linux/threads.h> 118b2f7fffSSam Ravnborg#include <linux/init.h> 129a163ed8SThomas Gleixner#include <linux/linkage.h> 139a163ed8SThomas Gleixner#include <asm/segment.h> 140341c14dSJeremy Fitzhardinge#include <asm/page_types.h> 150341c14dSJeremy Fitzhardinge#include <asm/pgtable_types.h> 169a163ed8SThomas Gleixner#include <asm/cache.h> 179a163ed8SThomas Gleixner#include <asm/thread_info.h> 189a163ed8SThomas Gleixner#include <asm/asm-offsets.h> 199a163ed8SThomas Gleixner#include <asm/setup.h> 20551889a6SIan Campbell#include <asm/processor-flags.h> 218a50e513SH. Peter Anvin#include <asm/msr-index.h> 228a50e513SH. Peter Anvin#include <asm/cpufeature.h> 2360a5317fSTejun Heo#include <asm/percpu.h> 24551889a6SIan Campbell 25551889a6SIan Campbell/* Physical address */ 26551889a6SIan Campbell#define pa(X) ((X) - __PAGE_OFFSET) 279a163ed8SThomas Gleixner 289a163ed8SThomas Gleixner/* 299a163ed8SThomas Gleixner * References to members of the new_cpu_data structure. 309a163ed8SThomas Gleixner */ 319a163ed8SThomas Gleixner 329a163ed8SThomas Gleixner#define X86 new_cpu_data+CPUINFO_x86 339a163ed8SThomas Gleixner#define X86_VENDOR new_cpu_data+CPUINFO_x86_vendor 349a163ed8SThomas Gleixner#define X86_MODEL new_cpu_data+CPUINFO_x86_model 359a163ed8SThomas Gleixner#define X86_MASK new_cpu_data+CPUINFO_x86_mask 369a163ed8SThomas Gleixner#define X86_HARD_MATH new_cpu_data+CPUINFO_hard_math 379a163ed8SThomas Gleixner#define X86_CPUID new_cpu_data+CPUINFO_cpuid_level 389a163ed8SThomas Gleixner#define X86_CAPABILITY new_cpu_data+CPUINFO_x86_capability 399a163ed8SThomas Gleixner#define X86_VENDOR_ID new_cpu_data+CPUINFO_x86_vendor_id 409a163ed8SThomas Gleixner 419a163ed8SThomas Gleixner/* 42c090f532SJeremy Fitzhardinge * This is how much memory in addition to the memory covered up to 43c090f532SJeremy Fitzhardinge * and including _end we need mapped initially. 449a163ed8SThomas Gleixner * We need: 452bd2753fSYinghai Lu * (KERNEL_IMAGE_SIZE/4096) / 1024 pages (worst case, non PAE) 462bd2753fSYinghai Lu * (KERNEL_IMAGE_SIZE/4096) / 512 + 4 pages (worst case for PAE) 479a163ed8SThomas Gleixner * 489a163ed8SThomas Gleixner * Modulo rounding, each megabyte assigned here requires a kilobyte of 499a163ed8SThomas Gleixner * memory, which is currently unreclaimed. 509a163ed8SThomas Gleixner * 519a163ed8SThomas Gleixner * This should be a multiple of a page. 522bd2753fSYinghai Lu * 532bd2753fSYinghai Lu * KERNEL_IMAGE_SIZE should be greater than pa(_end) 542bd2753fSYinghai Lu * and small than max_low_pfn, otherwise will waste some page table entries 559a163ed8SThomas Gleixner */ 569a163ed8SThomas Gleixner 579a163ed8SThomas Gleixner#if PTRS_PER_PMD > 1 58c090f532SJeremy Fitzhardinge#define PAGE_TABLE_SIZE(pages) (((pages) / PTRS_PER_PMD) + PTRS_PER_PGD) 599a163ed8SThomas Gleixner#else 60c090f532SJeremy Fitzhardinge#define PAGE_TABLE_SIZE(pages) ((pages) / PTRS_PER_PGD) 619a163ed8SThomas Gleixner#endif 629a163ed8SThomas Gleixner 63c090f532SJeremy Fitzhardinge/* Enough space to fit pagetables for the low memory linear map */ 6460ac9821SH. Peter AnvinMAPPING_BEYOND_END = \ 6560ac9821SH. Peter Anvin PAGE_TABLE_SIZE(((1<<32) - __PAGE_OFFSET) >> PAGE_SHIFT) << PAGE_SHIFT 66c090f532SJeremy Fitzhardinge 67c090f532SJeremy Fitzhardinge/* 68c090f532SJeremy Fitzhardinge * Worst-case size of the kernel mapping we need to make: 69c090f532SJeremy Fitzhardinge * the worst-case size of the kernel itself, plus the extra we need 70c090f532SJeremy Fitzhardinge * to map for the linear map. 71c090f532SJeremy Fitzhardinge */ 72c090f532SJeremy FitzhardingeKERNEL_PAGES = (KERNEL_IMAGE_SIZE + MAPPING_BEYOND_END)>>PAGE_SHIFT 73c090f532SJeremy Fitzhardinge 74b8a22a62SJeremy FitzhardingeINIT_MAP_SIZE = PAGE_TABLE_SIZE(KERNEL_PAGES) * PAGE_SIZE_asm 752bd2753fSYinghai LuRESERVE_BRK(pagetables, INIT_MAP_SIZE) 76796216a5SJeremy Fitzhardinge 779a163ed8SThomas Gleixner/* 789a163ed8SThomas Gleixner * 32-bit kernel entrypoint; only used by the boot CPU. On entry, 799a163ed8SThomas Gleixner * %esi points to the real-mode code as a 32-bit pointer. 809a163ed8SThomas Gleixner * CS and DS must be 4 GB flat segments, but we don't depend on 819a163ed8SThomas Gleixner * any particular GDT layout, because we load our own as soon as we 829a163ed8SThomas Gleixner * can. 839a163ed8SThomas Gleixner */ 844ae59b91STim Abbott__HEAD 859a163ed8SThomas GleixnerENTRY(startup_32) 86a24e7851SRusty Russell /* test KEEP_SEGMENTS flag to see if the bootloader is asking 87a24e7851SRusty Russell us to not reload segments */ 88a24e7851SRusty Russell testb $(1<<6), BP_loadflags(%esi) 89a24e7851SRusty Russell jnz 2f 909a163ed8SThomas Gleixner 919a163ed8SThomas Gleixner/* 929a163ed8SThomas Gleixner * Set segments to known values. 939a163ed8SThomas Gleixner */ 94551889a6SIan Campbell lgdt pa(boot_gdt_descr) 959a163ed8SThomas Gleixner movl $(__BOOT_DS),%eax 969a163ed8SThomas Gleixner movl %eax,%ds 979a163ed8SThomas Gleixner movl %eax,%es 989a163ed8SThomas Gleixner movl %eax,%fs 999a163ed8SThomas Gleixner movl %eax,%gs 100a24e7851SRusty Russell2: 1019a163ed8SThomas Gleixner 1029a163ed8SThomas Gleixner/* 1039a163ed8SThomas Gleixner * Clear BSS first so that there are no surprises... 1049a163ed8SThomas Gleixner */ 105a24e7851SRusty Russell cld 1069a163ed8SThomas Gleixner xorl %eax,%eax 107551889a6SIan Campbell movl $pa(__bss_start),%edi 108551889a6SIan Campbell movl $pa(__bss_stop),%ecx 1099a163ed8SThomas Gleixner subl %edi,%ecx 1109a163ed8SThomas Gleixner shrl $2,%ecx 1119a163ed8SThomas Gleixner rep ; stosl 1129a163ed8SThomas Gleixner/* 1139a163ed8SThomas Gleixner * Copy bootup parameters out of the way. 1149a163ed8SThomas Gleixner * Note: %esi still has the pointer to the real-mode data. 1159a163ed8SThomas Gleixner * With the kexec as boot loader, parameter segment might be loaded beyond 1169a163ed8SThomas Gleixner * kernel image and might not even be addressable by early boot page tables. 1179a163ed8SThomas Gleixner * (kexec on panic case). Hence copy out the parameters before initializing 1189a163ed8SThomas Gleixner * page tables. 1199a163ed8SThomas Gleixner */ 120551889a6SIan Campbell movl $pa(boot_params),%edi 1219a163ed8SThomas Gleixner movl $(PARAM_SIZE/4),%ecx 1229a163ed8SThomas Gleixner cld 1239a163ed8SThomas Gleixner rep 1249a163ed8SThomas Gleixner movsl 125551889a6SIan Campbell movl pa(boot_params) + NEW_CL_POINTER,%esi 1269a163ed8SThomas Gleixner andl %esi,%esi 127b595076aSUwe Kleine-König jz 1f # No command line 128551889a6SIan Campbell movl $pa(boot_command_line),%edi 1299a163ed8SThomas Gleixner movl $(COMMAND_LINE_SIZE/4),%ecx 1309a163ed8SThomas Gleixner rep 1319a163ed8SThomas Gleixner movsl 1329a163ed8SThomas Gleixner1: 1339a163ed8SThomas Gleixner 134fd699c76SAndres Salomon#ifdef CONFIG_OLPC_OPENFIRMWARE 135fd699c76SAndres Salomon /* save OFW's pgdir table for later use when calling into OFW */ 136fd699c76SAndres Salomon movl %cr3, %eax 137fd699c76SAndres Salomon movl %eax, pa(olpc_ofw_pgd) 138fd699c76SAndres Salomon#endif 139fd699c76SAndres Salomon 140a24e7851SRusty Russell#ifdef CONFIG_PARAVIRT 141551889a6SIan Campbell /* This is can only trip for a broken bootloader... */ 142551889a6SIan Campbell cmpw $0x207, pa(boot_params + BP_version) 143a24e7851SRusty Russell jb default_entry 144a24e7851SRusty Russell 145a24e7851SRusty Russell /* Paravirt-compatible boot parameters. Look to see what architecture 146a24e7851SRusty Russell we're booting under. */ 147551889a6SIan Campbell movl pa(boot_params + BP_hardware_subarch), %eax 148a24e7851SRusty Russell cmpl $num_subarch_entries, %eax 149a24e7851SRusty Russell jae bad_subarch 150a24e7851SRusty Russell 151551889a6SIan Campbell movl pa(subarch_entries)(,%eax,4), %eax 152a24e7851SRusty Russell subl $__PAGE_OFFSET, %eax 153a24e7851SRusty Russell jmp *%eax 154a24e7851SRusty Russell 155a24e7851SRusty Russellbad_subarch: 156a24e7851SRusty RussellWEAK(lguest_entry) 157a24e7851SRusty RussellWEAK(xen_entry) 158a24e7851SRusty Russell /* Unknown implementation; there's really 159a24e7851SRusty Russell nothing we can do at this point. */ 160a24e7851SRusty Russell ud2a 1618b2f7fffSSam Ravnborg 1628b2f7fffSSam Ravnborg __INITDATA 1638b2f7fffSSam Ravnborg 164a24e7851SRusty Russellsubarch_entries: 165a24e7851SRusty Russell .long default_entry /* normal x86/PC */ 166a24e7851SRusty Russell .long lguest_entry /* lguest hypervisor */ 167a24e7851SRusty Russell .long xen_entry /* Xen hypervisor */ 168162bc7abSPan, Jacob jun .long default_entry /* Moorestown MID */ 169a24e7851SRusty Russellnum_subarch_entries = (. - subarch_entries) / 4 170a24e7851SRusty Russell.previous 171a24e7851SRusty Russell#endif /* CONFIG_PARAVIRT */ 172a24e7851SRusty Russell 1739a163ed8SThomas Gleixner/* 1749a163ed8SThomas Gleixner * Initialize page tables. This creates a PDE and a set of page 1752bd2753fSYinghai Lu * tables, which are located immediately beyond __brk_base. The variable 176ccf3fe02SJeremy Fitzhardinge * _brk_end is set up to point to the first "safe" location. 1779a163ed8SThomas Gleixner * Mappings are created both at virtual address 0 (identity mapping) 1782bd2753fSYinghai Lu * and PAGE_OFFSET for up to _end. 1799a163ed8SThomas Gleixner * 180551889a6SIan Campbell * Note that the stack is not yet set up! 1819a163ed8SThomas Gleixner */ 182a24e7851SRusty Russelldefault_entry: 183551889a6SIan Campbell#ifdef CONFIG_X86_PAE 184551889a6SIan Campbell 185551889a6SIan Campbell /* 186b40827faSBorislav Petkov * In PAE mode initial_page_table is statically defined to contain 187b40827faSBorislav Petkov * enough entries to cover the VMSPLIT option (that is the top 1, 2 or 3 188b40827faSBorislav Petkov * entries). The identity mapping is handled by pointing two PGD entries 189b40827faSBorislav Petkov * to the first kernel PMD. 190551889a6SIan Campbell * 191b40827faSBorislav Petkov * Note the upper half of each PMD or PTE are always zero at this stage. 192551889a6SIan Campbell */ 193551889a6SIan Campbell 19486b2b70eSJoe Korty#define KPMDS (((-__PAGE_OFFSET) >> 30) & 3) /* Number of kernel PMDs */ 195551889a6SIan Campbell 196551889a6SIan Campbell xorl %ebx,%ebx /* %ebx is kept at zero */ 197551889a6SIan Campbell 198ccf3fe02SJeremy Fitzhardinge movl $pa(__brk_base), %edi 199b40827faSBorislav Petkov movl $pa(initial_pg_pmd), %edx 200b2bc2731SSuresh Siddha movl $PTE_IDENT_ATTR, %eax 2019a163ed8SThomas Gleixner10: 202b2bc2731SSuresh Siddha leal PDE_IDENT_ATTR(%edi),%ecx /* Create PMD entry */ 203551889a6SIan Campbell movl %ecx,(%edx) /* Store PMD entry */ 204551889a6SIan Campbell /* Upper half already zero */ 205551889a6SIan Campbell addl $8,%edx 206551889a6SIan Campbell movl $512,%ecx 207551889a6SIan Campbell11: 208551889a6SIan Campbell stosl 209551889a6SIan Campbell xchgl %eax,%ebx 210551889a6SIan Campbell stosl 211551889a6SIan Campbell xchgl %eax,%ebx 212551889a6SIan Campbell addl $0x1000,%eax 213551889a6SIan Campbell loop 11b 214551889a6SIan Campbell 215551889a6SIan Campbell /* 216c090f532SJeremy Fitzhardinge * End condition: we must map up to the end + MAPPING_BEYOND_END. 217551889a6SIan Campbell */ 218c090f532SJeremy Fitzhardinge movl $pa(_end) + MAPPING_BEYOND_END + PTE_IDENT_ATTR, %ebp 219551889a6SIan Campbell cmpl %ebp,%eax 220551889a6SIan Campbell jb 10b 221551889a6SIan Campbell1: 222ccf3fe02SJeremy Fitzhardinge addl $__PAGE_OFFSET, %edi 223ccf3fe02SJeremy Fitzhardinge movl %edi, pa(_brk_end) 2246af61a76SYinghai Lu shrl $12, %eax 2256af61a76SYinghai Lu movl %eax, pa(max_pfn_mapped) 226551889a6SIan Campbell 227551889a6SIan Campbell /* Do early initialization of the fixmap area */ 228b40827faSBorislav Petkov movl $pa(initial_pg_fixmap)+PDE_IDENT_ATTR,%eax 229b40827faSBorislav Petkov movl %eax,pa(initial_pg_pmd+0x1000*KPMDS-8) 230551889a6SIan Campbell#else /* Not PAE */ 231551889a6SIan Campbell 232551889a6SIan Campbellpage_pde_offset = (__PAGE_OFFSET >> 20); 233551889a6SIan Campbell 234ccf3fe02SJeremy Fitzhardinge movl $pa(__brk_base), %edi 235b40827faSBorislav Petkov movl $pa(initial_page_table), %edx 236b2bc2731SSuresh Siddha movl $PTE_IDENT_ATTR, %eax 237551889a6SIan Campbell10: 238b2bc2731SSuresh Siddha leal PDE_IDENT_ATTR(%edi),%ecx /* Create PDE entry */ 2399a163ed8SThomas Gleixner movl %ecx,(%edx) /* Store identity PDE entry */ 2409a163ed8SThomas Gleixner movl %ecx,page_pde_offset(%edx) /* Store kernel PDE entry */ 2419a163ed8SThomas Gleixner addl $4,%edx 2429a163ed8SThomas Gleixner movl $1024, %ecx 2439a163ed8SThomas Gleixner11: 2449a163ed8SThomas Gleixner stosl 2459a163ed8SThomas Gleixner addl $0x1000,%eax 2469a163ed8SThomas Gleixner loop 11b 247551889a6SIan Campbell /* 248c090f532SJeremy Fitzhardinge * End condition: we must map up to the end + MAPPING_BEYOND_END. 249551889a6SIan Campbell */ 250c090f532SJeremy Fitzhardinge movl $pa(_end) + MAPPING_BEYOND_END + PTE_IDENT_ATTR, %ebp 2519a163ed8SThomas Gleixner cmpl %ebp,%eax 2529a163ed8SThomas Gleixner jb 10b 253ccf3fe02SJeremy Fitzhardinge addl $__PAGE_OFFSET, %edi 254ccf3fe02SJeremy Fitzhardinge movl %edi, pa(_brk_end) 2556af61a76SYinghai Lu shrl $12, %eax 2566af61a76SYinghai Lu movl %eax, pa(max_pfn_mapped) 2579a163ed8SThomas Gleixner 258551889a6SIan Campbell /* Do early initialization of the fixmap area */ 259b40827faSBorislav Petkov movl $pa(initial_pg_fixmap)+PDE_IDENT_ATTR,%eax 260b40827faSBorislav Petkov movl %eax,pa(initial_page_table+0xffc) 261551889a6SIan Campbell#endif 2629a163ed8SThomas Gleixner jmp 3f 2639a163ed8SThomas Gleixner/* 2649a163ed8SThomas Gleixner * Non-boot CPU entry point; entered from trampoline.S 2659a163ed8SThomas Gleixner * We can't lgdt here, because lgdt itself uses a data segment, but 2669a163ed8SThomas Gleixner * we know the trampoline has already loaded the boot_gdt for us. 2679a163ed8SThomas Gleixner * 2689a163ed8SThomas Gleixner * If cpu hotplug is not supported then this code can go in init section 2699a163ed8SThomas Gleixner * which will be freed later 2709a163ed8SThomas Gleixner */ 2719a163ed8SThomas Gleixner 27278b89ecdSJan Beulich__CPUINIT 2739a163ed8SThomas Gleixner 2749a163ed8SThomas Gleixner#ifdef CONFIG_SMP 2759a163ed8SThomas GleixnerENTRY(startup_32_smp) 2769a163ed8SThomas Gleixner cld 2779a163ed8SThomas Gleixner movl $(__BOOT_DS),%eax 2789a163ed8SThomas Gleixner movl %eax,%ds 2799a163ed8SThomas Gleixner movl %eax,%es 2809a163ed8SThomas Gleixner movl %eax,%fs 2819a163ed8SThomas Gleixner movl %eax,%gs 2825756dd59SIan Campbell#endif /* CONFIG_SMP */ 2835756dd59SIan Campbell3: 2849a163ed8SThomas Gleixner 2859a163ed8SThomas Gleixner/* 2869a163ed8SThomas Gleixner * New page tables may be in 4Mbyte page mode and may 2879a163ed8SThomas Gleixner * be using the global pages. 2889a163ed8SThomas Gleixner * 2899a163ed8SThomas Gleixner * NOTE! If we are on a 486 we may have no cr4 at all! 2909a163ed8SThomas Gleixner * So we do not try to touch it unless we really have 2919a163ed8SThomas Gleixner * some bits in it to set. This won't work if the BSP 2929a163ed8SThomas Gleixner * implements cr4 but this AP does not -- very unlikely 2939a163ed8SThomas Gleixner * but be warned! The same applies to the pse feature 2949a163ed8SThomas Gleixner * if not equally supported. --macro 2959a163ed8SThomas Gleixner * 2969a163ed8SThomas Gleixner * NOTE! We have to correct for the fact that we're 2979a163ed8SThomas Gleixner * not yet offset PAGE_OFFSET.. 2989a163ed8SThomas Gleixner */ 299551889a6SIan Campbell#define cr4_bits pa(mmu_cr4_features) 3009a163ed8SThomas Gleixner movl cr4_bits,%edx 3019a163ed8SThomas Gleixner andl %edx,%edx 3029a163ed8SThomas Gleixner jz 6f 3039a163ed8SThomas Gleixner movl %cr4,%eax # Turn on paging options (PSE,PAE,..) 3049a163ed8SThomas Gleixner orl %edx,%eax 3059a163ed8SThomas Gleixner movl %eax,%cr4 3069a163ed8SThomas Gleixner 3078a50e513SH. Peter Anvin testb $X86_CR4_PAE, %al # check if PAE is enabled 3088a50e513SH. Peter Anvin jz 6f 3099a163ed8SThomas Gleixner 3109a163ed8SThomas Gleixner /* Check if extended functions are implemented */ 3119a163ed8SThomas Gleixner movl $0x80000000, %eax 3129a163ed8SThomas Gleixner cpuid 3138a50e513SH. Peter Anvin /* Value must be in the range 0x80000001 to 0x8000ffff */ 3148a50e513SH. Peter Anvin subl $0x80000001, %eax 3158a50e513SH. Peter Anvin cmpl $(0x8000ffff-0x80000001), %eax 3168a50e513SH. Peter Anvin ja 6f 3179a163ed8SThomas Gleixner mov $0x80000001, %eax 3189a163ed8SThomas Gleixner cpuid 3199a163ed8SThomas Gleixner /* Execute Disable bit supported? */ 3208a50e513SH. Peter Anvin btl $(X86_FEATURE_NX & 31), %edx 3219a163ed8SThomas Gleixner jnc 6f 3229a163ed8SThomas Gleixner 3239a163ed8SThomas Gleixner /* Setup EFER (Extended Feature Enable Register) */ 3248a50e513SH. Peter Anvin movl $MSR_EFER, %ecx 3259a163ed8SThomas Gleixner rdmsr 3269a163ed8SThomas Gleixner 3278a50e513SH. Peter Anvin btsl $_EFER_NX, %eax 3289a163ed8SThomas Gleixner /* Make changes effective */ 3299a163ed8SThomas Gleixner wrmsr 3309a163ed8SThomas Gleixner 3319a163ed8SThomas Gleixner6: 3329a163ed8SThomas Gleixner 3339a163ed8SThomas Gleixner/* 3349a163ed8SThomas Gleixner * Enable paging 3359a163ed8SThomas Gleixner */ 336b40827faSBorislav Petkov movl $pa(initial_page_table), %eax 3379a163ed8SThomas Gleixner movl %eax,%cr3 /* set the page table pointer.. */ 3389a163ed8SThomas Gleixner movl %cr0,%eax 339551889a6SIan Campbell orl $X86_CR0_PG,%eax 3409a163ed8SThomas Gleixner movl %eax,%cr0 /* ..and set paging (PG) bit */ 3419a163ed8SThomas Gleixner ljmp $__BOOT_CS,$1f /* Clear prefetch and normalize %eip */ 3429a163ed8SThomas Gleixner1: 3439a163ed8SThomas Gleixner /* Set up the stack pointer */ 3449a163ed8SThomas Gleixner lss stack_start,%esp 3459a163ed8SThomas Gleixner 3469a163ed8SThomas Gleixner/* 3479a163ed8SThomas Gleixner * Initialize eflags. Some BIOS's leave bits like NT set. This would 3489a163ed8SThomas Gleixner * confuse the debugger if this code is traced. 3499a163ed8SThomas Gleixner * XXX - best to initialize before switching to protected mode. 3509a163ed8SThomas Gleixner */ 3519a163ed8SThomas Gleixner pushl $0 3529a163ed8SThomas Gleixner popfl 3539a163ed8SThomas Gleixner 3549a163ed8SThomas Gleixner#ifdef CONFIG_SMP 35550359501SIan Campbell cmpb $0, ready 3569a163ed8SThomas Gleixner jz 1f /* Initial CPU cleans BSS */ 3579a163ed8SThomas Gleixner jmp checkCPUtype 3589a163ed8SThomas Gleixner1: 3599a163ed8SThomas Gleixner#endif /* CONFIG_SMP */ 3609a163ed8SThomas Gleixner 3619a163ed8SThomas Gleixner/* 3629a163ed8SThomas Gleixner * start system 32-bit setup. We need to re-do some of the things done 3639a163ed8SThomas Gleixner * in 16-bit mode for the "real" operations. 3649a163ed8SThomas Gleixner */ 3659a163ed8SThomas Gleixner call setup_idt 3669a163ed8SThomas Gleixner 3679a163ed8SThomas GleixnercheckCPUtype: 3689a163ed8SThomas Gleixner 3699a163ed8SThomas Gleixner movl $-1,X86_CPUID # -1 for no CPUID initially 3709a163ed8SThomas Gleixner 3719a163ed8SThomas Gleixner/* check if it is 486 or 386. */ 3729a163ed8SThomas Gleixner/* 3739a163ed8SThomas Gleixner * XXX - this does a lot of unnecessary setup. Alignment checks don't 3749a163ed8SThomas Gleixner * apply at our cpl of 0 and the stack ought to be aligned already, and 3759a163ed8SThomas Gleixner * we don't need to preserve eflags. 3769a163ed8SThomas Gleixner */ 3779a163ed8SThomas Gleixner 3789a163ed8SThomas Gleixner movb $3,X86 # at least 386 3799a163ed8SThomas Gleixner pushfl # push EFLAGS 3809a163ed8SThomas Gleixner popl %eax # get EFLAGS 3819a163ed8SThomas Gleixner movl %eax,%ecx # save original EFLAGS 3829a163ed8SThomas Gleixner xorl $0x240000,%eax # flip AC and ID bits in EFLAGS 3839a163ed8SThomas Gleixner pushl %eax # copy to EFLAGS 3849a163ed8SThomas Gleixner popfl # set EFLAGS 3859a163ed8SThomas Gleixner pushfl # get new EFLAGS 3869a163ed8SThomas Gleixner popl %eax # put it in eax 3879a163ed8SThomas Gleixner xorl %ecx,%eax # change in flags 3889a163ed8SThomas Gleixner pushl %ecx # restore original EFLAGS 3899a163ed8SThomas Gleixner popfl 3909a163ed8SThomas Gleixner testl $0x40000,%eax # check if AC bit changed 3919a163ed8SThomas Gleixner je is386 3929a163ed8SThomas Gleixner 3939a163ed8SThomas Gleixner movb $4,X86 # at least 486 3949a163ed8SThomas Gleixner testl $0x200000,%eax # check if ID bit changed 3959a163ed8SThomas Gleixner je is486 3969a163ed8SThomas Gleixner 3979a163ed8SThomas Gleixner /* get vendor info */ 3989a163ed8SThomas Gleixner xorl %eax,%eax # call CPUID with 0 -> return vendor ID 3999a163ed8SThomas Gleixner cpuid 4009a163ed8SThomas Gleixner movl %eax,X86_CPUID # save CPUID level 4019a163ed8SThomas Gleixner movl %ebx,X86_VENDOR_ID # lo 4 chars 4029a163ed8SThomas Gleixner movl %edx,X86_VENDOR_ID+4 # next 4 chars 4039a163ed8SThomas Gleixner movl %ecx,X86_VENDOR_ID+8 # last 4 chars 4049a163ed8SThomas Gleixner 4059a163ed8SThomas Gleixner orl %eax,%eax # do we have processor info as well? 4069a163ed8SThomas Gleixner je is486 4079a163ed8SThomas Gleixner 4089a163ed8SThomas Gleixner movl $1,%eax # Use the CPUID instruction to get CPU type 4099a163ed8SThomas Gleixner cpuid 4109a163ed8SThomas Gleixner movb %al,%cl # save reg for future use 4119a163ed8SThomas Gleixner andb $0x0f,%ah # mask processor family 4129a163ed8SThomas Gleixner movb %ah,X86 4139a163ed8SThomas Gleixner andb $0xf0,%al # mask model 4149a163ed8SThomas Gleixner shrb $4,%al 4159a163ed8SThomas Gleixner movb %al,X86_MODEL 4169a163ed8SThomas Gleixner andb $0x0f,%cl # mask mask revision 4179a163ed8SThomas Gleixner movb %cl,X86_MASK 4189a163ed8SThomas Gleixner movl %edx,X86_CAPABILITY 4199a163ed8SThomas Gleixner 4209a163ed8SThomas Gleixneris486: movl $0x50022,%ecx # set AM, WP, NE and MP 4219a163ed8SThomas Gleixner jmp 2f 4229a163ed8SThomas Gleixner 4239a163ed8SThomas Gleixneris386: movl $2,%ecx # set MP 4249a163ed8SThomas Gleixner2: movl %cr0,%eax 4259a163ed8SThomas Gleixner andl $0x80000011,%eax # Save PG,PE,ET 4269a163ed8SThomas Gleixner orl %ecx,%eax 4279a163ed8SThomas Gleixner movl %eax,%cr0 4289a163ed8SThomas Gleixner 4299a163ed8SThomas Gleixner call check_x87 4309a163ed8SThomas Gleixner lgdt early_gdt_descr 4319a163ed8SThomas Gleixner lidt idt_descr 4329a163ed8SThomas Gleixner ljmp $(__KERNEL_CS),$1f 4339a163ed8SThomas Gleixner1: movl $(__KERNEL_DS),%eax # reload all the segment registers 4349a163ed8SThomas Gleixner movl %eax,%ss # after changing gdt. 4359a163ed8SThomas Gleixner 4369a163ed8SThomas Gleixner movl $(__USER_DS),%eax # DS/ES contains default USER segment 4379a163ed8SThomas Gleixner movl %eax,%ds 4389a163ed8SThomas Gleixner movl %eax,%es 4399a163ed8SThomas Gleixner 4400dd76d73SBrian Gerst movl $(__KERNEL_PERCPU), %eax 4410dd76d73SBrian Gerst movl %eax,%fs # set this cpu's percpu 4420dd76d73SBrian Gerst 44360a5317fSTejun Heo#ifdef CONFIG_CC_STACKPROTECTOR 44460a5317fSTejun Heo /* 44560a5317fSTejun Heo * The linker can't handle this by relocation. Manually set 44660a5317fSTejun Heo * base address in stack canary segment descriptor. 44760a5317fSTejun Heo */ 44860a5317fSTejun Heo cmpb $0,ready 44960a5317fSTejun Heo jne 1f 450dd17c8f7SRusty Russell movl $gdt_page,%eax 451dd17c8f7SRusty Russell movl $stack_canary,%ecx 45260a5317fSTejun Heo movw %cx, 8 * GDT_ENTRY_STACK_CANARY + 2(%eax) 45360a5317fSTejun Heo shrl $16, %ecx 45460a5317fSTejun Heo movb %cl, 8 * GDT_ENTRY_STACK_CANARY + 4(%eax) 45560a5317fSTejun Heo movb %ch, 8 * GDT_ENTRY_STACK_CANARY + 7(%eax) 45660a5317fSTejun Heo1: 45760a5317fSTejun Heo#endif 45860a5317fSTejun Heo movl $(__KERNEL_STACK_CANARY),%eax 4599a163ed8SThomas Gleixner movl %eax,%gs 46060a5317fSTejun Heo 46160a5317fSTejun Heo xorl %eax,%eax # Clear LDT 4629a163ed8SThomas Gleixner lldt %ax 4639a163ed8SThomas Gleixner 4649a163ed8SThomas Gleixner cld # gcc2 wants the direction flag cleared at all times 4659a163ed8SThomas Gleixner pushl $0 # fake return address for unwinder 4669a163ed8SThomas Gleixner#ifdef CONFIG_SMP 4679a163ed8SThomas Gleixner movb ready, %cl 4689a163ed8SThomas Gleixner movb $1, ready 4699a163ed8SThomas Gleixner cmpb $0,%cl # the first CPU calls start_kernel 4709a163ed8SThomas Gleixner je 1f 4713e970473SGlauber Costa movl (stack_start), %esp 4729a163ed8SThomas Gleixner1: 4739a163ed8SThomas Gleixner#endif /* CONFIG_SMP */ 474e3f77edfSGlauber Costa jmp *(initial_code) 4759a163ed8SThomas Gleixner 4769a163ed8SThomas Gleixner/* 4779a163ed8SThomas Gleixner * We depend on ET to be correct. This checks for 287/387. 4789a163ed8SThomas Gleixner */ 4799a163ed8SThomas Gleixnercheck_x87: 4809a163ed8SThomas Gleixner movb $0,X86_HARD_MATH 4819a163ed8SThomas Gleixner clts 4829a163ed8SThomas Gleixner fninit 4839a163ed8SThomas Gleixner fstsw %ax 4849a163ed8SThomas Gleixner cmpb $0,%al 4859a163ed8SThomas Gleixner je 1f 4869a163ed8SThomas Gleixner movl %cr0,%eax /* no coprocessor: have to set bits */ 4879a163ed8SThomas Gleixner xorl $4,%eax /* set EM */ 4889a163ed8SThomas Gleixner movl %eax,%cr0 4899a163ed8SThomas Gleixner ret 4909a163ed8SThomas Gleixner ALIGN 4919a163ed8SThomas Gleixner1: movb $1,X86_HARD_MATH 4929a163ed8SThomas Gleixner .byte 0xDB,0xE4 /* fsetpm for 287, ignored by 387 */ 4939a163ed8SThomas Gleixner ret 4949a163ed8SThomas Gleixner 4959a163ed8SThomas Gleixner/* 4969a163ed8SThomas Gleixner * setup_idt 4979a163ed8SThomas Gleixner * 4989a163ed8SThomas Gleixner * sets up a idt with 256 entries pointing to 4999a163ed8SThomas Gleixner * ignore_int, interrupt gates. It doesn't actually load 5009a163ed8SThomas Gleixner * idt - that can be done only after paging has been enabled 5019a163ed8SThomas Gleixner * and the kernel moved to PAGE_OFFSET. Interrupts 5029a163ed8SThomas Gleixner * are enabled elsewhere, when we can be relatively 5039a163ed8SThomas Gleixner * sure everything is ok. 5049a163ed8SThomas Gleixner * 5059a163ed8SThomas Gleixner * Warning: %esi is live across this function. 5069a163ed8SThomas Gleixner */ 5079a163ed8SThomas Gleixnersetup_idt: 5089a163ed8SThomas Gleixner lea ignore_int,%edx 5099a163ed8SThomas Gleixner movl $(__KERNEL_CS << 16),%eax 5109a163ed8SThomas Gleixner movw %dx,%ax /* selector = 0x0010 = cs */ 5119a163ed8SThomas Gleixner movw $0x8E00,%dx /* interrupt gate - dpl=0, present */ 5129a163ed8SThomas Gleixner 5139a163ed8SThomas Gleixner lea idt_table,%edi 5149a163ed8SThomas Gleixner mov $256,%ecx 5159a163ed8SThomas Gleixnerrp_sidt: 5169a163ed8SThomas Gleixner movl %eax,(%edi) 5179a163ed8SThomas Gleixner movl %edx,4(%edi) 5189a163ed8SThomas Gleixner addl $8,%edi 5199a163ed8SThomas Gleixner dec %ecx 5209a163ed8SThomas Gleixner jne rp_sidt 5219a163ed8SThomas Gleixner 5229a163ed8SThomas Gleixner.macro set_early_handler handler,trapno 5239a163ed8SThomas Gleixner lea \handler,%edx 5249a163ed8SThomas Gleixner movl $(__KERNEL_CS << 16),%eax 5259a163ed8SThomas Gleixner movw %dx,%ax 5269a163ed8SThomas Gleixner movw $0x8E00,%dx /* interrupt gate - dpl=0, present */ 5279a163ed8SThomas Gleixner lea idt_table,%edi 5289a163ed8SThomas Gleixner movl %eax,8*\trapno(%edi) 5299a163ed8SThomas Gleixner movl %edx,8*\trapno+4(%edi) 5309a163ed8SThomas Gleixner.endm 5319a163ed8SThomas Gleixner 5329a163ed8SThomas Gleixner set_early_handler handler=early_divide_err,trapno=0 5339a163ed8SThomas Gleixner set_early_handler handler=early_illegal_opcode,trapno=6 5349a163ed8SThomas Gleixner set_early_handler handler=early_protection_fault,trapno=13 5359a163ed8SThomas Gleixner set_early_handler handler=early_page_fault,trapno=14 5369a163ed8SThomas Gleixner 5379a163ed8SThomas Gleixner ret 5389a163ed8SThomas Gleixner 5399a163ed8SThomas Gleixnerearly_divide_err: 5409a163ed8SThomas Gleixner xor %edx,%edx 5419a163ed8SThomas Gleixner pushl $0 /* fake errcode */ 5429a163ed8SThomas Gleixner jmp early_fault 5439a163ed8SThomas Gleixner 5449a163ed8SThomas Gleixnerearly_illegal_opcode: 5459a163ed8SThomas Gleixner movl $6,%edx 5469a163ed8SThomas Gleixner pushl $0 /* fake errcode */ 5479a163ed8SThomas Gleixner jmp early_fault 5489a163ed8SThomas Gleixner 5499a163ed8SThomas Gleixnerearly_protection_fault: 5509a163ed8SThomas Gleixner movl $13,%edx 5519a163ed8SThomas Gleixner jmp early_fault 5529a163ed8SThomas Gleixner 5539a163ed8SThomas Gleixnerearly_page_fault: 5549a163ed8SThomas Gleixner movl $14,%edx 5559a163ed8SThomas Gleixner jmp early_fault 5569a163ed8SThomas Gleixner 5579a163ed8SThomas Gleixnerearly_fault: 5589a163ed8SThomas Gleixner cld 5599a163ed8SThomas Gleixner#ifdef CONFIG_PRINTK 560382f64abSIngo Molnar pusha 5619a163ed8SThomas Gleixner movl $(__KERNEL_DS),%eax 5629a163ed8SThomas Gleixner movl %eax,%ds 5639a163ed8SThomas Gleixner movl %eax,%es 5649a163ed8SThomas Gleixner cmpl $2,early_recursion_flag 5659a163ed8SThomas Gleixner je hlt_loop 5669a163ed8SThomas Gleixner incl early_recursion_flag 5679a163ed8SThomas Gleixner movl %cr2,%eax 5689a163ed8SThomas Gleixner pushl %eax 5699a163ed8SThomas Gleixner pushl %edx /* trapno */ 5709a163ed8SThomas Gleixner pushl $fault_msg 5719a163ed8SThomas Gleixner call printk 5729a163ed8SThomas Gleixner#endif 57394878efdSIngo Molnar call dump_stack 5749a163ed8SThomas Gleixnerhlt_loop: 5759a163ed8SThomas Gleixner hlt 5769a163ed8SThomas Gleixner jmp hlt_loop 5779a163ed8SThomas Gleixner 5789a163ed8SThomas Gleixner/* This is the default interrupt "handler" :-) */ 5799a163ed8SThomas Gleixner ALIGN 5809a163ed8SThomas Gleixnerignore_int: 5819a163ed8SThomas Gleixner cld 5829a163ed8SThomas Gleixner#ifdef CONFIG_PRINTK 5839a163ed8SThomas Gleixner pushl %eax 5849a163ed8SThomas Gleixner pushl %ecx 5859a163ed8SThomas Gleixner pushl %edx 5869a163ed8SThomas Gleixner pushl %es 5879a163ed8SThomas Gleixner pushl %ds 5889a163ed8SThomas Gleixner movl $(__KERNEL_DS),%eax 5899a163ed8SThomas Gleixner movl %eax,%ds 5909a163ed8SThomas Gleixner movl %eax,%es 5919a163ed8SThomas Gleixner cmpl $2,early_recursion_flag 5929a163ed8SThomas Gleixner je hlt_loop 5939a163ed8SThomas Gleixner incl early_recursion_flag 5949a163ed8SThomas Gleixner pushl 16(%esp) 5959a163ed8SThomas Gleixner pushl 24(%esp) 5969a163ed8SThomas Gleixner pushl 32(%esp) 5979a163ed8SThomas Gleixner pushl 40(%esp) 5989a163ed8SThomas Gleixner pushl $int_msg 5999a163ed8SThomas Gleixner call printk 600d5e397cbSIngo Molnar 601d5e397cbSIngo Molnar call dump_stack 602d5e397cbSIngo Molnar 6039a163ed8SThomas Gleixner addl $(5*4),%esp 6049a163ed8SThomas Gleixner popl %ds 6059a163ed8SThomas Gleixner popl %es 6069a163ed8SThomas Gleixner popl %edx 6079a163ed8SThomas Gleixner popl %ecx 6089a163ed8SThomas Gleixner popl %eax 6099a163ed8SThomas Gleixner#endif 6109a163ed8SThomas Gleixner iret 6119a163ed8SThomas Gleixner 6120e83815bSRobert Richter __REFDATA 613583323b9SThomas Gleixner.align 4 614583323b9SThomas GleixnerENTRY(initial_code) 615583323b9SThomas Gleixner .long i386_start_kernel 616583323b9SThomas Gleixner 6179a163ed8SThomas Gleixner/* 6189a163ed8SThomas Gleixner * BSS section 6199a163ed8SThomas Gleixner */ 62002b7da37STim Abbott__PAGE_ALIGNED_BSS 6219a163ed8SThomas Gleixner .align PAGE_SIZE_asm 622551889a6SIan Campbell#ifdef CONFIG_X86_PAE 623b40827faSBorislav Petkovinitial_pg_pmd: 624551889a6SIan Campbell .fill 1024*KPMDS,4,0 625551889a6SIan Campbell#else 626b40827faSBorislav PetkovENTRY(initial_page_table) 6279a163ed8SThomas Gleixner .fill 1024,4,0 628551889a6SIan Campbell#endif 629b40827faSBorislav Petkovinitial_pg_fixmap: 6309a163ed8SThomas Gleixner .fill 1024,4,0 6319a163ed8SThomas GleixnerENTRY(empty_zero_page) 6329a163ed8SThomas Gleixner .fill 4096,1,0 633b40827faSBorislav PetkovENTRY(swapper_pg_dir) 634b40827faSBorislav Petkov .fill 1024,4,0 6352bd2753fSYinghai Lu 6369a163ed8SThomas Gleixner/* 6379a163ed8SThomas Gleixner * This starts the data section. 6389a163ed8SThomas Gleixner */ 639551889a6SIan Campbell#ifdef CONFIG_X86_PAE 640abe1ee3aSTim Abbott__PAGE_ALIGNED_DATA 641551889a6SIan Campbell /* Page-aligned for the benefit of paravirt? */ 642551889a6SIan Campbell .align PAGE_SIZE_asm 643b40827faSBorislav PetkovENTRY(initial_page_table) 644b40827faSBorislav Petkov .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0 /* low identity map */ 645551889a6SIan Campbell# if KPMDS == 3 646b40827faSBorislav Petkov .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0 647b40827faSBorislav Petkov .long pa(initial_pg_pmd+PGD_IDENT_ATTR+0x1000),0 648b40827faSBorislav Petkov .long pa(initial_pg_pmd+PGD_IDENT_ATTR+0x2000),0 649551889a6SIan Campbell# elif KPMDS == 2 650551889a6SIan Campbell .long 0,0 651b40827faSBorislav Petkov .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0 652b40827faSBorislav Petkov .long pa(initial_pg_pmd+PGD_IDENT_ATTR+0x1000),0 653551889a6SIan Campbell# elif KPMDS == 1 654551889a6SIan Campbell .long 0,0 655551889a6SIan Campbell .long 0,0 656b40827faSBorislav Petkov .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0 657551889a6SIan Campbell# else 658551889a6SIan Campbell# error "Kernel PMDs should be 1, 2 or 3" 659551889a6SIan Campbell# endif 660551889a6SIan Campbell .align PAGE_SIZE_asm /* needs to be page-sized too */ 661551889a6SIan Campbell#endif 662551889a6SIan Campbell 6639a163ed8SThomas Gleixner.data 6649a163ed8SThomas GleixnerENTRY(stack_start) 6659a163ed8SThomas Gleixner .long init_thread_union+THREAD_SIZE 6669a163ed8SThomas Gleixner .long __BOOT_DS 6679a163ed8SThomas Gleixner 6689a163ed8SThomas Gleixnerready: .byte 0 6699a163ed8SThomas Gleixner 6709a163ed8SThomas Gleixnerearly_recursion_flag: 6719a163ed8SThomas Gleixner .long 0 6729a163ed8SThomas Gleixner 6739a163ed8SThomas Gleixnerint_msg: 674d5e397cbSIngo Molnar .asciz "Unknown interrupt or fault at: %p %p %p\n" 6759a163ed8SThomas Gleixner 6769a163ed8SThomas Gleixnerfault_msg: 677575ca735SVegard Nossum/* fault info: */ 678575ca735SVegard Nossum .ascii "BUG: Int %d: CR2 %p\n" 679575ca735SVegard Nossum/* pusha regs: */ 680575ca735SVegard Nossum .ascii " EDI %p ESI %p EBP %p ESP %p\n" 681575ca735SVegard Nossum .ascii " EBX %p EDX %p ECX %p EAX %p\n" 682575ca735SVegard Nossum/* fault frame: */ 683575ca735SVegard Nossum .ascii " err %p EIP %p CS %p flg %p\n" 684575ca735SVegard Nossum .ascii "Stack: %p %p %p %p %p %p %p %p\n" 685575ca735SVegard Nossum .ascii " %p %p %p %p %p %p %p %p\n" 686575ca735SVegard Nossum .asciz " %p %p %p %p %p %p %p %p\n" 6879a163ed8SThomas Gleixner 6889a163ed8SThomas Gleixner#include "../../x86/xen/xen-head.S" 6899a163ed8SThomas Gleixner 6909a163ed8SThomas Gleixner/* 6919a163ed8SThomas Gleixner * The IDT and GDT 'descriptors' are a strange 48-bit object 6929a163ed8SThomas Gleixner * only used by the lidt and lgdt instructions. They are not 6939a163ed8SThomas Gleixner * like usual segment descriptors - they consist of a 16-bit 6949a163ed8SThomas Gleixner * segment size, and 32-bit linear address value: 6959a163ed8SThomas Gleixner */ 6969a163ed8SThomas Gleixner 6979a163ed8SThomas Gleixner.globl boot_gdt_descr 6989a163ed8SThomas Gleixner.globl idt_descr 6999a163ed8SThomas Gleixner 7009a163ed8SThomas Gleixner ALIGN 7019a163ed8SThomas Gleixner# early boot GDT descriptor (must use 1:1 address mapping) 7029a163ed8SThomas Gleixner .word 0 # 32 bit align gdt_desc.address 7039a163ed8SThomas Gleixnerboot_gdt_descr: 7049a163ed8SThomas Gleixner .word __BOOT_DS+7 7059a163ed8SThomas Gleixner .long boot_gdt - __PAGE_OFFSET 7069a163ed8SThomas Gleixner 7079a163ed8SThomas Gleixner .word 0 # 32-bit align idt_desc.address 7089a163ed8SThomas Gleixneridt_descr: 7099a163ed8SThomas Gleixner .word IDT_ENTRIES*8-1 # idt contains 256 entries 7109a163ed8SThomas Gleixner .long idt_table 7119a163ed8SThomas Gleixner 7129a163ed8SThomas Gleixner# boot GDT descriptor (later on used by CPU#0): 7139a163ed8SThomas Gleixner .word 0 # 32 bit align gdt_desc.address 7149a163ed8SThomas GleixnerENTRY(early_gdt_descr) 7159a163ed8SThomas Gleixner .word GDT_ENTRIES*8-1 716dd17c8f7SRusty Russell .long gdt_page /* Overwritten for secondary CPUs */ 7179a163ed8SThomas Gleixner 7189a163ed8SThomas Gleixner/* 7199a163ed8SThomas Gleixner * The boot_gdt must mirror the equivalent in setup.S and is 7209a163ed8SThomas Gleixner * used only for booting. 7219a163ed8SThomas Gleixner */ 7229a163ed8SThomas Gleixner .align L1_CACHE_BYTES 7239a163ed8SThomas GleixnerENTRY(boot_gdt) 7249a163ed8SThomas Gleixner .fill GDT_ENTRY_BOOT_CS,8,0 7259a163ed8SThomas Gleixner .quad 0x00cf9a000000ffff /* kernel 4GB code at 0x00000000 */ 7269a163ed8SThomas Gleixner .quad 0x00cf92000000ffff /* kernel 4GB data at 0x00000000 */ 727