19a163ed8SThomas Gleixner/* 29a163ed8SThomas Gleixner * 39a163ed8SThomas Gleixner * Copyright (C) 1991, 1992 Linus Torvalds 49a163ed8SThomas Gleixner * 59a163ed8SThomas Gleixner * Enhanced CPU detection and feature setting code by Mike Jagdis 69a163ed8SThomas Gleixner * and Martin Mares, November 1997. 79a163ed8SThomas Gleixner */ 89a163ed8SThomas Gleixner 99a163ed8SThomas Gleixner.text 109a163ed8SThomas Gleixner#include <linux/threads.h> 118b2f7fffSSam Ravnborg#include <linux/init.h> 129a163ed8SThomas Gleixner#include <linux/linkage.h> 139a163ed8SThomas Gleixner#include <asm/segment.h> 149a163ed8SThomas Gleixner#include <asm/page.h> 159a163ed8SThomas Gleixner#include <asm/pgtable.h> 169a163ed8SThomas Gleixner#include <asm/desc.h> 179a163ed8SThomas Gleixner#include <asm/cache.h> 189a163ed8SThomas Gleixner#include <asm/thread_info.h> 199a163ed8SThomas Gleixner#include <asm/asm-offsets.h> 209a163ed8SThomas Gleixner#include <asm/setup.h> 21551889a6SIan Campbell#include <asm/processor-flags.h> 2260a5317fSTejun Heo#include <asm/percpu.h> 23551889a6SIan Campbell 24551889a6SIan Campbell/* Physical address */ 25551889a6SIan Campbell#define pa(X) ((X) - __PAGE_OFFSET) 269a163ed8SThomas Gleixner 279a163ed8SThomas Gleixner/* 289a163ed8SThomas Gleixner * References to members of the new_cpu_data structure. 299a163ed8SThomas Gleixner */ 309a163ed8SThomas Gleixner 319a163ed8SThomas Gleixner#define X86 new_cpu_data+CPUINFO_x86 329a163ed8SThomas Gleixner#define X86_VENDOR new_cpu_data+CPUINFO_x86_vendor 339a163ed8SThomas Gleixner#define X86_MODEL new_cpu_data+CPUINFO_x86_model 349a163ed8SThomas Gleixner#define X86_MASK new_cpu_data+CPUINFO_x86_mask 359a163ed8SThomas Gleixner#define X86_HARD_MATH new_cpu_data+CPUINFO_hard_math 369a163ed8SThomas Gleixner#define X86_CPUID new_cpu_data+CPUINFO_cpuid_level 379a163ed8SThomas Gleixner#define X86_CAPABILITY new_cpu_data+CPUINFO_x86_capability 389a163ed8SThomas Gleixner#define X86_VENDOR_ID new_cpu_data+CPUINFO_x86_vendor_id 399a163ed8SThomas Gleixner 409a163ed8SThomas Gleixner/* 419a163ed8SThomas Gleixner * This is how much memory *in addition to the memory covered up to 429a163ed8SThomas Gleixner * and including _end* we need mapped initially. 439a163ed8SThomas Gleixner * We need: 449a163ed8SThomas Gleixner * - one bit for each possible page, but only in low memory, which means 459a163ed8SThomas Gleixner * 2^32/4096/8 = 128K worst case (4G/4G split.) 469a163ed8SThomas Gleixner * - enough space to map all low memory, which means 479a163ed8SThomas Gleixner * (2^32/4096) / 1024 pages (worst case, non PAE) 489a163ed8SThomas Gleixner * (2^32/4096) / 512 + 4 pages (worst case for PAE) 499a163ed8SThomas Gleixner * - a few pages for allocator use before the kernel pagetable has 509a163ed8SThomas Gleixner * been set up 519a163ed8SThomas Gleixner * 529a163ed8SThomas Gleixner * Modulo rounding, each megabyte assigned here requires a kilobyte of 539a163ed8SThomas Gleixner * memory, which is currently unreclaimed. 549a163ed8SThomas Gleixner * 559a163ed8SThomas Gleixner * This should be a multiple of a page. 569a163ed8SThomas Gleixner */ 579a163ed8SThomas GleixnerLOW_PAGES = 1<<(32-PAGE_SHIFT_asm) 589a163ed8SThomas Gleixner 591e3e1972SIngo Molnar/* 601e3e1972SIngo Molnar * To preserve the DMA pool in PAGEALLOC kernels, we'll allocate 611e3e1972SIngo Molnar * pagetables from above the 16MB DMA limit, so we'll have to set 621e3e1972SIngo Molnar * up pagetables 16MB more (worst-case): 631e3e1972SIngo Molnar */ 641e3e1972SIngo Molnar#ifdef CONFIG_DEBUG_PAGEALLOC 651e3e1972SIngo MolnarLOW_PAGES = LOW_PAGES + 0x1000000 661e3e1972SIngo Molnar#endif 671e3e1972SIngo Molnar 689a163ed8SThomas Gleixner#if PTRS_PER_PMD > 1 699a163ed8SThomas GleixnerPAGE_TABLE_SIZE = (LOW_PAGES / PTRS_PER_PMD) + PTRS_PER_PGD 709a163ed8SThomas Gleixner#else 719a163ed8SThomas GleixnerPAGE_TABLE_SIZE = (LOW_PAGES / PTRS_PER_PGD) 729a163ed8SThomas Gleixner#endif 739a163ed8SThomas GleixnerBOOTBITMAP_SIZE = LOW_PAGES / 8 749a163ed8SThomas GleixnerALLOCATOR_SLOP = 4 759a163ed8SThomas Gleixner 769a163ed8SThomas GleixnerINIT_MAP_BEYOND_END = BOOTBITMAP_SIZE + (PAGE_TABLE_SIZE + ALLOCATOR_SLOP)*PAGE_SIZE_asm 779a163ed8SThomas Gleixner 789a163ed8SThomas Gleixner/* 799a163ed8SThomas Gleixner * 32-bit kernel entrypoint; only used by the boot CPU. On entry, 809a163ed8SThomas Gleixner * %esi points to the real-mode code as a 32-bit pointer. 819a163ed8SThomas Gleixner * CS and DS must be 4 GB flat segments, but we don't depend on 829a163ed8SThomas Gleixner * any particular GDT layout, because we load our own as soon as we 839a163ed8SThomas Gleixner * can. 849a163ed8SThomas Gleixner */ 859a163ed8SThomas Gleixner.section .text.head,"ax",@progbits 869a163ed8SThomas GleixnerENTRY(startup_32) 87a24e7851SRusty Russell /* test KEEP_SEGMENTS flag to see if the bootloader is asking 88a24e7851SRusty Russell us to not reload segments */ 89a24e7851SRusty Russell testb $(1<<6), BP_loadflags(%esi) 90a24e7851SRusty Russell jnz 2f 919a163ed8SThomas Gleixner 929a163ed8SThomas Gleixner/* 939a163ed8SThomas Gleixner * Set segments to known values. 949a163ed8SThomas Gleixner */ 95551889a6SIan Campbell lgdt pa(boot_gdt_descr) 969a163ed8SThomas Gleixner movl $(__BOOT_DS),%eax 979a163ed8SThomas Gleixner movl %eax,%ds 989a163ed8SThomas Gleixner movl %eax,%es 999a163ed8SThomas Gleixner movl %eax,%fs 1009a163ed8SThomas Gleixner movl %eax,%gs 101a24e7851SRusty Russell2: 1029a163ed8SThomas Gleixner 1039a163ed8SThomas Gleixner/* 1049a163ed8SThomas Gleixner * Clear BSS first so that there are no surprises... 1059a163ed8SThomas Gleixner */ 106a24e7851SRusty Russell cld 1079a163ed8SThomas Gleixner xorl %eax,%eax 108551889a6SIan Campbell movl $pa(__bss_start),%edi 109551889a6SIan Campbell movl $pa(__bss_stop),%ecx 1109a163ed8SThomas Gleixner subl %edi,%ecx 1119a163ed8SThomas Gleixner shrl $2,%ecx 1129a163ed8SThomas Gleixner rep ; stosl 1139a163ed8SThomas Gleixner/* 1149a163ed8SThomas Gleixner * Copy bootup parameters out of the way. 1159a163ed8SThomas Gleixner * Note: %esi still has the pointer to the real-mode data. 1169a163ed8SThomas Gleixner * With the kexec as boot loader, parameter segment might be loaded beyond 1179a163ed8SThomas Gleixner * kernel image and might not even be addressable by early boot page tables. 1189a163ed8SThomas Gleixner * (kexec on panic case). Hence copy out the parameters before initializing 1199a163ed8SThomas Gleixner * page tables. 1209a163ed8SThomas Gleixner */ 121551889a6SIan Campbell movl $pa(boot_params),%edi 1229a163ed8SThomas Gleixner movl $(PARAM_SIZE/4),%ecx 1239a163ed8SThomas Gleixner cld 1249a163ed8SThomas Gleixner rep 1259a163ed8SThomas Gleixner movsl 126551889a6SIan Campbell movl pa(boot_params) + NEW_CL_POINTER,%esi 1279a163ed8SThomas Gleixner andl %esi,%esi 128fa76dab9SH. Peter Anvin jz 1f # No comand line 129551889a6SIan Campbell movl $pa(boot_command_line),%edi 1309a163ed8SThomas Gleixner movl $(COMMAND_LINE_SIZE/4),%ecx 1319a163ed8SThomas Gleixner rep 1329a163ed8SThomas Gleixner movsl 1339a163ed8SThomas Gleixner1: 1349a163ed8SThomas Gleixner 135a24e7851SRusty Russell#ifdef CONFIG_PARAVIRT 136551889a6SIan Campbell /* This is can only trip for a broken bootloader... */ 137551889a6SIan Campbell cmpw $0x207, pa(boot_params + BP_version) 138a24e7851SRusty Russell jb default_entry 139a24e7851SRusty Russell 140a24e7851SRusty Russell /* Paravirt-compatible boot parameters. Look to see what architecture 141a24e7851SRusty Russell we're booting under. */ 142551889a6SIan Campbell movl pa(boot_params + BP_hardware_subarch), %eax 143a24e7851SRusty Russell cmpl $num_subarch_entries, %eax 144a24e7851SRusty Russell jae bad_subarch 145a24e7851SRusty Russell 146551889a6SIan Campbell movl pa(subarch_entries)(,%eax,4), %eax 147a24e7851SRusty Russell subl $__PAGE_OFFSET, %eax 148a24e7851SRusty Russell jmp *%eax 149a24e7851SRusty Russell 150a24e7851SRusty Russellbad_subarch: 151a24e7851SRusty RussellWEAK(lguest_entry) 152a24e7851SRusty RussellWEAK(xen_entry) 153a24e7851SRusty Russell /* Unknown implementation; there's really 154a24e7851SRusty Russell nothing we can do at this point. */ 155a24e7851SRusty Russell ud2a 1568b2f7fffSSam Ravnborg 1578b2f7fffSSam Ravnborg __INITDATA 1588b2f7fffSSam Ravnborg 159a24e7851SRusty Russellsubarch_entries: 160a24e7851SRusty Russell .long default_entry /* normal x86/PC */ 161a24e7851SRusty Russell .long lguest_entry /* lguest hypervisor */ 162a24e7851SRusty Russell .long xen_entry /* Xen hypervisor */ 163a24e7851SRusty Russellnum_subarch_entries = (. - subarch_entries) / 4 164a24e7851SRusty Russell.previous 165a24e7851SRusty Russell#endif /* CONFIG_PARAVIRT */ 166a24e7851SRusty Russell 1679a163ed8SThomas Gleixner/* 1689a163ed8SThomas Gleixner * Initialize page tables. This creates a PDE and a set of page 1699a163ed8SThomas Gleixner * tables, which are located immediately beyond _end. The variable 1709a163ed8SThomas Gleixner * init_pg_tables_end is set up to point to the first "safe" location. 1719a163ed8SThomas Gleixner * Mappings are created both at virtual address 0 (identity mapping) 1729a163ed8SThomas Gleixner * and PAGE_OFFSET for up to _end+sizeof(page tables)+INIT_MAP_BEYOND_END. 1739a163ed8SThomas Gleixner * 174551889a6SIan Campbell * Note that the stack is not yet set up! 1759a163ed8SThomas Gleixner */ 176a24e7851SRusty Russelldefault_entry: 177551889a6SIan Campbell#ifdef CONFIG_X86_PAE 178551889a6SIan Campbell 179551889a6SIan Campbell /* 180551889a6SIan Campbell * In PAE mode swapper_pg_dir is statically defined to contain enough 181551889a6SIan Campbell * entries to cover the VMSPLIT option (that is the top 1, 2 or 3 182551889a6SIan Campbell * entries). The identity mapping is handled by pointing two PGD 183551889a6SIan Campbell * entries to the first kernel PMD. 184551889a6SIan Campbell * 185551889a6SIan Campbell * Note the upper half of each PMD or PTE are always zero at 186551889a6SIan Campbell * this stage. 187551889a6SIan Campbell */ 188551889a6SIan Campbell 18986b2b70eSJoe Korty#define KPMDS (((-__PAGE_OFFSET) >> 30) & 3) /* Number of kernel PMDs */ 190551889a6SIan Campbell 191551889a6SIan Campbell xorl %ebx,%ebx /* %ebx is kept at zero */ 192551889a6SIan Campbell 193551889a6SIan Campbell movl $pa(pg0), %edi 194f0d43100SYinghai Lu movl %edi, pa(init_pg_tables_start) 195551889a6SIan Campbell movl $pa(swapper_pg_pmd), %edx 196b2bc2731SSuresh Siddha movl $PTE_IDENT_ATTR, %eax 1979a163ed8SThomas Gleixner10: 198b2bc2731SSuresh Siddha leal PDE_IDENT_ATTR(%edi),%ecx /* Create PMD entry */ 199551889a6SIan Campbell movl %ecx,(%edx) /* Store PMD entry */ 200551889a6SIan Campbell /* Upper half already zero */ 201551889a6SIan Campbell addl $8,%edx 202551889a6SIan Campbell movl $512,%ecx 203551889a6SIan Campbell11: 204551889a6SIan Campbell stosl 205551889a6SIan Campbell xchgl %eax,%ebx 206551889a6SIan Campbell stosl 207551889a6SIan Campbell xchgl %eax,%ebx 208551889a6SIan Campbell addl $0x1000,%eax 209551889a6SIan Campbell loop 11b 210551889a6SIan Campbell 211551889a6SIan Campbell /* 212551889a6SIan Campbell * End condition: we must map up to and including INIT_MAP_BEYOND_END 213551889a6SIan Campbell * bytes beyond the end of our own page tables. 214551889a6SIan Campbell */ 215b2bc2731SSuresh Siddha leal (INIT_MAP_BEYOND_END+PTE_IDENT_ATTR)(%edi),%ebp 216551889a6SIan Campbell cmpl %ebp,%eax 217551889a6SIan Campbell jb 10b 218551889a6SIan Campbell1: 219551889a6SIan Campbell movl %edi,pa(init_pg_tables_end) 2206af61a76SYinghai Lu shrl $12, %eax 2216af61a76SYinghai Lu movl %eax, pa(max_pfn_mapped) 222551889a6SIan Campbell 223551889a6SIan Campbell /* Do early initialization of the fixmap area */ 224b2bc2731SSuresh Siddha movl $pa(swapper_pg_fixmap)+PDE_IDENT_ATTR,%eax 225551889a6SIan Campbell movl %eax,pa(swapper_pg_pmd+0x1000*KPMDS-8) 226551889a6SIan Campbell#else /* Not PAE */ 227551889a6SIan Campbell 228551889a6SIan Campbellpage_pde_offset = (__PAGE_OFFSET >> 20); 229551889a6SIan Campbell 230551889a6SIan Campbell movl $pa(pg0), %edi 231f0d43100SYinghai Lu movl %edi, pa(init_pg_tables_start) 232551889a6SIan Campbell movl $pa(swapper_pg_dir), %edx 233b2bc2731SSuresh Siddha movl $PTE_IDENT_ATTR, %eax 234551889a6SIan Campbell10: 235b2bc2731SSuresh Siddha leal PDE_IDENT_ATTR(%edi),%ecx /* Create PDE entry */ 2369a163ed8SThomas Gleixner movl %ecx,(%edx) /* Store identity PDE entry */ 2379a163ed8SThomas Gleixner movl %ecx,page_pde_offset(%edx) /* Store kernel PDE entry */ 2389a163ed8SThomas Gleixner addl $4,%edx 2399a163ed8SThomas Gleixner movl $1024, %ecx 2409a163ed8SThomas Gleixner11: 2419a163ed8SThomas Gleixner stosl 2429a163ed8SThomas Gleixner addl $0x1000,%eax 2439a163ed8SThomas Gleixner loop 11b 244551889a6SIan Campbell /* 245551889a6SIan Campbell * End condition: we must map up to and including INIT_MAP_BEYOND_END 246551889a6SIan Campbell * bytes beyond the end of our own page tables; the +0x007 is 247551889a6SIan Campbell * the attribute bits 248551889a6SIan Campbell */ 249b2bc2731SSuresh Siddha leal (INIT_MAP_BEYOND_END+PTE_IDENT_ATTR)(%edi),%ebp 2509a163ed8SThomas Gleixner cmpl %ebp,%eax 2519a163ed8SThomas Gleixner jb 10b 252551889a6SIan Campbell movl %edi,pa(init_pg_tables_end) 2536af61a76SYinghai Lu shrl $12, %eax 2546af61a76SYinghai Lu movl %eax, pa(max_pfn_mapped) 2559a163ed8SThomas Gleixner 256551889a6SIan Campbell /* Do early initialization of the fixmap area */ 257b2bc2731SSuresh Siddha movl $pa(swapper_pg_fixmap)+PDE_IDENT_ATTR,%eax 258551889a6SIan Campbell movl %eax,pa(swapper_pg_dir+0xffc) 259551889a6SIan Campbell#endif 2609a163ed8SThomas Gleixner jmp 3f 2619a163ed8SThomas Gleixner/* 2629a163ed8SThomas Gleixner * Non-boot CPU entry point; entered from trampoline.S 2639a163ed8SThomas Gleixner * We can't lgdt here, because lgdt itself uses a data segment, but 2649a163ed8SThomas Gleixner * we know the trampoline has already loaded the boot_gdt for us. 2659a163ed8SThomas Gleixner * 2669a163ed8SThomas Gleixner * If cpu hotplug is not supported then this code can go in init section 2679a163ed8SThomas Gleixner * which will be freed later 2689a163ed8SThomas Gleixner */ 2699a163ed8SThomas Gleixner 2709a163ed8SThomas Gleixner#ifndef CONFIG_HOTPLUG_CPU 2719a163ed8SThomas Gleixner.section .init.text,"ax",@progbits 2729a163ed8SThomas Gleixner#endif 2739a163ed8SThomas Gleixner 2749a163ed8SThomas Gleixner#ifdef CONFIG_SMP 2759a163ed8SThomas GleixnerENTRY(startup_32_smp) 2769a163ed8SThomas Gleixner cld 2779a163ed8SThomas Gleixner movl $(__BOOT_DS),%eax 2789a163ed8SThomas Gleixner movl %eax,%ds 2799a163ed8SThomas Gleixner movl %eax,%es 2809a163ed8SThomas Gleixner movl %eax,%fs 2819a163ed8SThomas Gleixner movl %eax,%gs 2825756dd59SIan Campbell#endif /* CONFIG_SMP */ 2835756dd59SIan Campbell3: 2849a163ed8SThomas Gleixner 2859a163ed8SThomas Gleixner/* 2869a163ed8SThomas Gleixner * New page tables may be in 4Mbyte page mode and may 2879a163ed8SThomas Gleixner * be using the global pages. 2889a163ed8SThomas Gleixner * 2899a163ed8SThomas Gleixner * NOTE! If we are on a 486 we may have no cr4 at all! 2909a163ed8SThomas Gleixner * So we do not try to touch it unless we really have 2919a163ed8SThomas Gleixner * some bits in it to set. This won't work if the BSP 2929a163ed8SThomas Gleixner * implements cr4 but this AP does not -- very unlikely 2939a163ed8SThomas Gleixner * but be warned! The same applies to the pse feature 2949a163ed8SThomas Gleixner * if not equally supported. --macro 2959a163ed8SThomas Gleixner * 2969a163ed8SThomas Gleixner * NOTE! We have to correct for the fact that we're 2979a163ed8SThomas Gleixner * not yet offset PAGE_OFFSET.. 2989a163ed8SThomas Gleixner */ 299551889a6SIan Campbell#define cr4_bits pa(mmu_cr4_features) 3009a163ed8SThomas Gleixner movl cr4_bits,%edx 3019a163ed8SThomas Gleixner andl %edx,%edx 3029a163ed8SThomas Gleixner jz 6f 3039a163ed8SThomas Gleixner movl %cr4,%eax # Turn on paging options (PSE,PAE,..) 3049a163ed8SThomas Gleixner orl %edx,%eax 3059a163ed8SThomas Gleixner movl %eax,%cr4 3069a163ed8SThomas Gleixner 3079a163ed8SThomas Gleixner btl $5, %eax # check if PAE is enabled 3089a163ed8SThomas Gleixner jnc 6f 3099a163ed8SThomas Gleixner 3109a163ed8SThomas Gleixner /* Check if extended functions are implemented */ 3119a163ed8SThomas Gleixner movl $0x80000000, %eax 3129a163ed8SThomas Gleixner cpuid 3139a163ed8SThomas Gleixner cmpl $0x80000000, %eax 3149a163ed8SThomas Gleixner jbe 6f 3159a163ed8SThomas Gleixner mov $0x80000001, %eax 3169a163ed8SThomas Gleixner cpuid 3179a163ed8SThomas Gleixner /* Execute Disable bit supported? */ 3189a163ed8SThomas Gleixner btl $20, %edx 3199a163ed8SThomas Gleixner jnc 6f 3209a163ed8SThomas Gleixner 3219a163ed8SThomas Gleixner /* Setup EFER (Extended Feature Enable Register) */ 3229a163ed8SThomas Gleixner movl $0xc0000080, %ecx 3239a163ed8SThomas Gleixner rdmsr 3249a163ed8SThomas Gleixner 3259a163ed8SThomas Gleixner btsl $11, %eax 3269a163ed8SThomas Gleixner /* Make changes effective */ 3279a163ed8SThomas Gleixner wrmsr 3289a163ed8SThomas Gleixner 3299a163ed8SThomas Gleixner6: 3309a163ed8SThomas Gleixner 3319a163ed8SThomas Gleixner/* 3329a163ed8SThomas Gleixner * Enable paging 3339a163ed8SThomas Gleixner */ 334551889a6SIan Campbell movl $pa(swapper_pg_dir),%eax 3359a163ed8SThomas Gleixner movl %eax,%cr3 /* set the page table pointer.. */ 3369a163ed8SThomas Gleixner movl %cr0,%eax 337551889a6SIan Campbell orl $X86_CR0_PG,%eax 3389a163ed8SThomas Gleixner movl %eax,%cr0 /* ..and set paging (PG) bit */ 3399a163ed8SThomas Gleixner ljmp $__BOOT_CS,$1f /* Clear prefetch and normalize %eip */ 3409a163ed8SThomas Gleixner1: 3419a163ed8SThomas Gleixner /* Set up the stack pointer */ 3429a163ed8SThomas Gleixner lss stack_start,%esp 3439a163ed8SThomas Gleixner 3449a163ed8SThomas Gleixner/* 3459a163ed8SThomas Gleixner * Initialize eflags. Some BIOS's leave bits like NT set. This would 3469a163ed8SThomas Gleixner * confuse the debugger if this code is traced. 3479a163ed8SThomas Gleixner * XXX - best to initialize before switching to protected mode. 3489a163ed8SThomas Gleixner */ 3499a163ed8SThomas Gleixner pushl $0 3509a163ed8SThomas Gleixner popfl 3519a163ed8SThomas Gleixner 3529a163ed8SThomas Gleixner#ifdef CONFIG_SMP 35350359501SIan Campbell cmpb $0, ready 3549a163ed8SThomas Gleixner jz 1f /* Initial CPU cleans BSS */ 3559a163ed8SThomas Gleixner jmp checkCPUtype 3569a163ed8SThomas Gleixner1: 3579a163ed8SThomas Gleixner#endif /* CONFIG_SMP */ 3589a163ed8SThomas Gleixner 3599a163ed8SThomas Gleixner/* 3609a163ed8SThomas Gleixner * start system 32-bit setup. We need to re-do some of the things done 3619a163ed8SThomas Gleixner * in 16-bit mode for the "real" operations. 3629a163ed8SThomas Gleixner */ 3639a163ed8SThomas Gleixner call setup_idt 3649a163ed8SThomas Gleixner 3659a163ed8SThomas GleixnercheckCPUtype: 3669a163ed8SThomas Gleixner 3679a163ed8SThomas Gleixner movl $-1,X86_CPUID # -1 for no CPUID initially 3689a163ed8SThomas Gleixner 3699a163ed8SThomas Gleixner/* check if it is 486 or 386. */ 3709a163ed8SThomas Gleixner/* 3719a163ed8SThomas Gleixner * XXX - this does a lot of unnecessary setup. Alignment checks don't 3729a163ed8SThomas Gleixner * apply at our cpl of 0 and the stack ought to be aligned already, and 3739a163ed8SThomas Gleixner * we don't need to preserve eflags. 3749a163ed8SThomas Gleixner */ 3759a163ed8SThomas Gleixner 3769a163ed8SThomas Gleixner movb $3,X86 # at least 386 3779a163ed8SThomas Gleixner pushfl # push EFLAGS 3789a163ed8SThomas Gleixner popl %eax # get EFLAGS 3799a163ed8SThomas Gleixner movl %eax,%ecx # save original EFLAGS 3809a163ed8SThomas Gleixner xorl $0x240000,%eax # flip AC and ID bits in EFLAGS 3819a163ed8SThomas Gleixner pushl %eax # copy to EFLAGS 3829a163ed8SThomas Gleixner popfl # set EFLAGS 3839a163ed8SThomas Gleixner pushfl # get new EFLAGS 3849a163ed8SThomas Gleixner popl %eax # put it in eax 3859a163ed8SThomas Gleixner xorl %ecx,%eax # change in flags 3869a163ed8SThomas Gleixner pushl %ecx # restore original EFLAGS 3879a163ed8SThomas Gleixner popfl 3889a163ed8SThomas Gleixner testl $0x40000,%eax # check if AC bit changed 3899a163ed8SThomas Gleixner je is386 3909a163ed8SThomas Gleixner 3919a163ed8SThomas Gleixner movb $4,X86 # at least 486 3929a163ed8SThomas Gleixner testl $0x200000,%eax # check if ID bit changed 3939a163ed8SThomas Gleixner je is486 3949a163ed8SThomas Gleixner 3959a163ed8SThomas Gleixner /* get vendor info */ 3969a163ed8SThomas Gleixner xorl %eax,%eax # call CPUID with 0 -> return vendor ID 3979a163ed8SThomas Gleixner cpuid 3989a163ed8SThomas Gleixner movl %eax,X86_CPUID # save CPUID level 3999a163ed8SThomas Gleixner movl %ebx,X86_VENDOR_ID # lo 4 chars 4009a163ed8SThomas Gleixner movl %edx,X86_VENDOR_ID+4 # next 4 chars 4019a163ed8SThomas Gleixner movl %ecx,X86_VENDOR_ID+8 # last 4 chars 4029a163ed8SThomas Gleixner 4039a163ed8SThomas Gleixner orl %eax,%eax # do we have processor info as well? 4049a163ed8SThomas Gleixner je is486 4059a163ed8SThomas Gleixner 4069a163ed8SThomas Gleixner movl $1,%eax # Use the CPUID instruction to get CPU type 4079a163ed8SThomas Gleixner cpuid 4089a163ed8SThomas Gleixner movb %al,%cl # save reg for future use 4099a163ed8SThomas Gleixner andb $0x0f,%ah # mask processor family 4109a163ed8SThomas Gleixner movb %ah,X86 4119a163ed8SThomas Gleixner andb $0xf0,%al # mask model 4129a163ed8SThomas Gleixner shrb $4,%al 4139a163ed8SThomas Gleixner movb %al,X86_MODEL 4149a163ed8SThomas Gleixner andb $0x0f,%cl # mask mask revision 4159a163ed8SThomas Gleixner movb %cl,X86_MASK 4169a163ed8SThomas Gleixner movl %edx,X86_CAPABILITY 4179a163ed8SThomas Gleixner 4189a163ed8SThomas Gleixneris486: movl $0x50022,%ecx # set AM, WP, NE and MP 4199a163ed8SThomas Gleixner jmp 2f 4209a163ed8SThomas Gleixner 4219a163ed8SThomas Gleixneris386: movl $2,%ecx # set MP 4229a163ed8SThomas Gleixner2: movl %cr0,%eax 4239a163ed8SThomas Gleixner andl $0x80000011,%eax # Save PG,PE,ET 4249a163ed8SThomas Gleixner orl %ecx,%eax 4259a163ed8SThomas Gleixner movl %eax,%cr0 4269a163ed8SThomas Gleixner 4279a163ed8SThomas Gleixner call check_x87 4289a163ed8SThomas Gleixner lgdt early_gdt_descr 4299a163ed8SThomas Gleixner lidt idt_descr 4309a163ed8SThomas Gleixner ljmp $(__KERNEL_CS),$1f 4319a163ed8SThomas Gleixner1: movl $(__KERNEL_DS),%eax # reload all the segment registers 4329a163ed8SThomas Gleixner movl %eax,%ss # after changing gdt. 4339a163ed8SThomas Gleixner 4349a163ed8SThomas Gleixner movl $(__USER_DS),%eax # DS/ES contains default USER segment 4359a163ed8SThomas Gleixner movl %eax,%ds 4369a163ed8SThomas Gleixner movl %eax,%es 4379a163ed8SThomas Gleixner 4380dd76d73SBrian Gerst movl $(__KERNEL_PERCPU), %eax 4390dd76d73SBrian Gerst movl %eax,%fs # set this cpu's percpu 4400dd76d73SBrian Gerst 44160a5317fSTejun Heo#ifdef CONFIG_CC_STACKPROTECTOR 44260a5317fSTejun Heo /* 44360a5317fSTejun Heo * The linker can't handle this by relocation. Manually set 44460a5317fSTejun Heo * base address in stack canary segment descriptor. 44560a5317fSTejun Heo */ 44660a5317fSTejun Heo cmpb $0,ready 44760a5317fSTejun Heo jne 1f 44860a5317fSTejun Heo movl $per_cpu__gdt_page,%eax 44960a5317fSTejun Heo movl $per_cpu__stack_canary,%ecx 4505c79d2a5STejun Heo subl $20, %ecx 45160a5317fSTejun Heo movw %cx, 8 * GDT_ENTRY_STACK_CANARY + 2(%eax) 45260a5317fSTejun Heo shrl $16, %ecx 45360a5317fSTejun Heo movb %cl, 8 * GDT_ENTRY_STACK_CANARY + 4(%eax) 45460a5317fSTejun Heo movb %ch, 8 * GDT_ENTRY_STACK_CANARY + 7(%eax) 45560a5317fSTejun Heo1: 45660a5317fSTejun Heo#endif 45760a5317fSTejun Heo movl $(__KERNEL_STACK_CANARY),%eax 4589a163ed8SThomas Gleixner movl %eax,%gs 45960a5317fSTejun Heo 46060a5317fSTejun Heo xorl %eax,%eax # Clear LDT 4619a163ed8SThomas Gleixner lldt %ax 4629a163ed8SThomas Gleixner 4639a163ed8SThomas Gleixner cld # gcc2 wants the direction flag cleared at all times 4649a163ed8SThomas Gleixner pushl $0 # fake return address for unwinder 4659a163ed8SThomas Gleixner#ifdef CONFIG_SMP 4669a163ed8SThomas Gleixner movb ready, %cl 4679a163ed8SThomas Gleixner movb $1, ready 4689a163ed8SThomas Gleixner cmpb $0,%cl # the first CPU calls start_kernel 4699a163ed8SThomas Gleixner je 1f 4703e970473SGlauber Costa movl (stack_start), %esp 4719a163ed8SThomas Gleixner1: 4729a163ed8SThomas Gleixner#endif /* CONFIG_SMP */ 473e3f77edfSGlauber Costa jmp *(initial_code) 4749a163ed8SThomas Gleixner 4759a163ed8SThomas Gleixner/* 4769a163ed8SThomas Gleixner * We depend on ET to be correct. This checks for 287/387. 4779a163ed8SThomas Gleixner */ 4789a163ed8SThomas Gleixnercheck_x87: 4799a163ed8SThomas Gleixner movb $0,X86_HARD_MATH 4809a163ed8SThomas Gleixner clts 4819a163ed8SThomas Gleixner fninit 4829a163ed8SThomas Gleixner fstsw %ax 4839a163ed8SThomas Gleixner cmpb $0,%al 4849a163ed8SThomas Gleixner je 1f 4859a163ed8SThomas Gleixner movl %cr0,%eax /* no coprocessor: have to set bits */ 4869a163ed8SThomas Gleixner xorl $4,%eax /* set EM */ 4879a163ed8SThomas Gleixner movl %eax,%cr0 4889a163ed8SThomas Gleixner ret 4899a163ed8SThomas Gleixner ALIGN 4909a163ed8SThomas Gleixner1: movb $1,X86_HARD_MATH 4919a163ed8SThomas Gleixner .byte 0xDB,0xE4 /* fsetpm for 287, ignored by 387 */ 4929a163ed8SThomas Gleixner ret 4939a163ed8SThomas Gleixner 4949a163ed8SThomas Gleixner/* 4959a163ed8SThomas Gleixner * setup_idt 4969a163ed8SThomas Gleixner * 4979a163ed8SThomas Gleixner * sets up a idt with 256 entries pointing to 4989a163ed8SThomas Gleixner * ignore_int, interrupt gates. It doesn't actually load 4999a163ed8SThomas Gleixner * idt - that can be done only after paging has been enabled 5009a163ed8SThomas Gleixner * and the kernel moved to PAGE_OFFSET. Interrupts 5019a163ed8SThomas Gleixner * are enabled elsewhere, when we can be relatively 5029a163ed8SThomas Gleixner * sure everything is ok. 5039a163ed8SThomas Gleixner * 5049a163ed8SThomas Gleixner * Warning: %esi is live across this function. 5059a163ed8SThomas Gleixner */ 5069a163ed8SThomas Gleixnersetup_idt: 5079a163ed8SThomas Gleixner lea ignore_int,%edx 5089a163ed8SThomas Gleixner movl $(__KERNEL_CS << 16),%eax 5099a163ed8SThomas Gleixner movw %dx,%ax /* selector = 0x0010 = cs */ 5109a163ed8SThomas Gleixner movw $0x8E00,%dx /* interrupt gate - dpl=0, present */ 5119a163ed8SThomas Gleixner 5129a163ed8SThomas Gleixner lea idt_table,%edi 5139a163ed8SThomas Gleixner mov $256,%ecx 5149a163ed8SThomas Gleixnerrp_sidt: 5159a163ed8SThomas Gleixner movl %eax,(%edi) 5169a163ed8SThomas Gleixner movl %edx,4(%edi) 5179a163ed8SThomas Gleixner addl $8,%edi 5189a163ed8SThomas Gleixner dec %ecx 5199a163ed8SThomas Gleixner jne rp_sidt 5209a163ed8SThomas Gleixner 5219a163ed8SThomas Gleixner.macro set_early_handler handler,trapno 5229a163ed8SThomas Gleixner lea \handler,%edx 5239a163ed8SThomas Gleixner movl $(__KERNEL_CS << 16),%eax 5249a163ed8SThomas Gleixner movw %dx,%ax 5259a163ed8SThomas Gleixner movw $0x8E00,%dx /* interrupt gate - dpl=0, present */ 5269a163ed8SThomas Gleixner lea idt_table,%edi 5279a163ed8SThomas Gleixner movl %eax,8*\trapno(%edi) 5289a163ed8SThomas Gleixner movl %edx,8*\trapno+4(%edi) 5299a163ed8SThomas Gleixner.endm 5309a163ed8SThomas Gleixner 5319a163ed8SThomas Gleixner set_early_handler handler=early_divide_err,trapno=0 5329a163ed8SThomas Gleixner set_early_handler handler=early_illegal_opcode,trapno=6 5339a163ed8SThomas Gleixner set_early_handler handler=early_protection_fault,trapno=13 5349a163ed8SThomas Gleixner set_early_handler handler=early_page_fault,trapno=14 5359a163ed8SThomas Gleixner 5369a163ed8SThomas Gleixner ret 5379a163ed8SThomas Gleixner 5389a163ed8SThomas Gleixnerearly_divide_err: 5399a163ed8SThomas Gleixner xor %edx,%edx 5409a163ed8SThomas Gleixner pushl $0 /* fake errcode */ 5419a163ed8SThomas Gleixner jmp early_fault 5429a163ed8SThomas Gleixner 5439a163ed8SThomas Gleixnerearly_illegal_opcode: 5449a163ed8SThomas Gleixner movl $6,%edx 5459a163ed8SThomas Gleixner pushl $0 /* fake errcode */ 5469a163ed8SThomas Gleixner jmp early_fault 5479a163ed8SThomas Gleixner 5489a163ed8SThomas Gleixnerearly_protection_fault: 5499a163ed8SThomas Gleixner movl $13,%edx 5509a163ed8SThomas Gleixner jmp early_fault 5519a163ed8SThomas Gleixner 5529a163ed8SThomas Gleixnerearly_page_fault: 5539a163ed8SThomas Gleixner movl $14,%edx 5549a163ed8SThomas Gleixner jmp early_fault 5559a163ed8SThomas Gleixner 5569a163ed8SThomas Gleixnerearly_fault: 5579a163ed8SThomas Gleixner cld 5589a163ed8SThomas Gleixner#ifdef CONFIG_PRINTK 559382f64abSIngo Molnar pusha 5609a163ed8SThomas Gleixner movl $(__KERNEL_DS),%eax 5619a163ed8SThomas Gleixner movl %eax,%ds 5629a163ed8SThomas Gleixner movl %eax,%es 5639a163ed8SThomas Gleixner cmpl $2,early_recursion_flag 5649a163ed8SThomas Gleixner je hlt_loop 5659a163ed8SThomas Gleixner incl early_recursion_flag 5669a163ed8SThomas Gleixner movl %cr2,%eax 5679a163ed8SThomas Gleixner pushl %eax 5689a163ed8SThomas Gleixner pushl %edx /* trapno */ 5699a163ed8SThomas Gleixner pushl $fault_msg 5709a163ed8SThomas Gleixner#ifdef CONFIG_EARLY_PRINTK 5719a163ed8SThomas Gleixner call early_printk 5729a163ed8SThomas Gleixner#else 5739a163ed8SThomas Gleixner call printk 5749a163ed8SThomas Gleixner#endif 5759a163ed8SThomas Gleixner#endif 57694878efdSIngo Molnar call dump_stack 5779a163ed8SThomas Gleixnerhlt_loop: 5789a163ed8SThomas Gleixner hlt 5799a163ed8SThomas Gleixner jmp hlt_loop 5809a163ed8SThomas Gleixner 5819a163ed8SThomas Gleixner/* This is the default interrupt "handler" :-) */ 5829a163ed8SThomas Gleixner ALIGN 5839a163ed8SThomas Gleixnerignore_int: 5849a163ed8SThomas Gleixner cld 5859a163ed8SThomas Gleixner#ifdef CONFIG_PRINTK 5869a163ed8SThomas Gleixner pushl %eax 5879a163ed8SThomas Gleixner pushl %ecx 5889a163ed8SThomas Gleixner pushl %edx 5899a163ed8SThomas Gleixner pushl %es 5909a163ed8SThomas Gleixner pushl %ds 5919a163ed8SThomas Gleixner movl $(__KERNEL_DS),%eax 5929a163ed8SThomas Gleixner movl %eax,%ds 5939a163ed8SThomas Gleixner movl %eax,%es 5949a163ed8SThomas Gleixner cmpl $2,early_recursion_flag 5959a163ed8SThomas Gleixner je hlt_loop 5969a163ed8SThomas Gleixner incl early_recursion_flag 5979a163ed8SThomas Gleixner pushl 16(%esp) 5989a163ed8SThomas Gleixner pushl 24(%esp) 5999a163ed8SThomas Gleixner pushl 32(%esp) 6009a163ed8SThomas Gleixner pushl 40(%esp) 6019a163ed8SThomas Gleixner pushl $int_msg 6029a163ed8SThomas Gleixner#ifdef CONFIG_EARLY_PRINTK 6039a163ed8SThomas Gleixner call early_printk 6049a163ed8SThomas Gleixner#else 6059a163ed8SThomas Gleixner call printk 6069a163ed8SThomas Gleixner#endif 6079a163ed8SThomas Gleixner addl $(5*4),%esp 6089a163ed8SThomas Gleixner popl %ds 6099a163ed8SThomas Gleixner popl %es 6109a163ed8SThomas Gleixner popl %edx 6119a163ed8SThomas Gleixner popl %ecx 6129a163ed8SThomas Gleixner popl %eax 6139a163ed8SThomas Gleixner#endif 6149a163ed8SThomas Gleixner iret 6159a163ed8SThomas Gleixner 616583323b9SThomas Gleixner.section .cpuinit.data,"wa" 617583323b9SThomas Gleixner.align 4 618583323b9SThomas GleixnerENTRY(initial_code) 619583323b9SThomas Gleixner .long i386_start_kernel 620583323b9SThomas Gleixner 6219a163ed8SThomas Gleixner.section .text 6229a163ed8SThomas Gleixner/* 6239a163ed8SThomas Gleixner * Real beginning of normal "text" segment 6249a163ed8SThomas Gleixner */ 6259a163ed8SThomas GleixnerENTRY(stext) 6269a163ed8SThomas GleixnerENTRY(_stext) 6279a163ed8SThomas Gleixner 6289a163ed8SThomas Gleixner/* 6299a163ed8SThomas Gleixner * BSS section 6309a163ed8SThomas Gleixner */ 6319a163ed8SThomas Gleixner.section ".bss.page_aligned","wa" 6329a163ed8SThomas Gleixner .align PAGE_SIZE_asm 633551889a6SIan Campbell#ifdef CONFIG_X86_PAE 634ed2b7e2bSAdrian Bunkswapper_pg_pmd: 635551889a6SIan Campbell .fill 1024*KPMDS,4,0 636551889a6SIan Campbell#else 6379a163ed8SThomas GleixnerENTRY(swapper_pg_dir) 6389a163ed8SThomas Gleixner .fill 1024,4,0 639551889a6SIan Campbell#endif 640aa65af3fSAdrian Bunkswapper_pg_fixmap: 6419a163ed8SThomas Gleixner .fill 1024,4,0 6429a163ed8SThomas GleixnerENTRY(empty_zero_page) 6439a163ed8SThomas Gleixner .fill 4096,1,0 6449a163ed8SThomas Gleixner/* 6459a163ed8SThomas Gleixner * This starts the data section. 6469a163ed8SThomas Gleixner */ 647551889a6SIan Campbell#ifdef CONFIG_X86_PAE 648551889a6SIan Campbell.section ".data.page_aligned","wa" 649551889a6SIan Campbell /* Page-aligned for the benefit of paravirt? */ 650551889a6SIan Campbell .align PAGE_SIZE_asm 651551889a6SIan CampbellENTRY(swapper_pg_dir) 652b2bc2731SSuresh Siddha .long pa(swapper_pg_pmd+PGD_IDENT_ATTR),0 /* low identity map */ 653551889a6SIan Campbell# if KPMDS == 3 654b2bc2731SSuresh Siddha .long pa(swapper_pg_pmd+PGD_IDENT_ATTR),0 655b2bc2731SSuresh Siddha .long pa(swapper_pg_pmd+PGD_IDENT_ATTR+0x1000),0 656b2bc2731SSuresh Siddha .long pa(swapper_pg_pmd+PGD_IDENT_ATTR+0x2000),0 657551889a6SIan Campbell# elif KPMDS == 2 658551889a6SIan Campbell .long 0,0 659b2bc2731SSuresh Siddha .long pa(swapper_pg_pmd+PGD_IDENT_ATTR),0 660b2bc2731SSuresh Siddha .long pa(swapper_pg_pmd+PGD_IDENT_ATTR+0x1000),0 661551889a6SIan Campbell# elif KPMDS == 1 662551889a6SIan Campbell .long 0,0 663551889a6SIan Campbell .long 0,0 664b2bc2731SSuresh Siddha .long pa(swapper_pg_pmd+PGD_IDENT_ATTR),0 665551889a6SIan Campbell# else 666551889a6SIan Campbell# error "Kernel PMDs should be 1, 2 or 3" 667551889a6SIan Campbell# endif 668551889a6SIan Campbell .align PAGE_SIZE_asm /* needs to be page-sized too */ 669551889a6SIan Campbell#endif 670551889a6SIan Campbell 6719a163ed8SThomas Gleixner.data 6729a163ed8SThomas GleixnerENTRY(stack_start) 6739a163ed8SThomas Gleixner .long init_thread_union+THREAD_SIZE 6749a163ed8SThomas Gleixner .long __BOOT_DS 6759a163ed8SThomas Gleixner 6769a163ed8SThomas Gleixnerready: .byte 0 6779a163ed8SThomas Gleixner 6789a163ed8SThomas Gleixnerearly_recursion_flag: 6799a163ed8SThomas Gleixner .long 0 6809a163ed8SThomas Gleixner 6819a163ed8SThomas Gleixnerint_msg: 6829a163ed8SThomas Gleixner .asciz "Unknown interrupt or fault at EIP %p %p %p\n" 6839a163ed8SThomas Gleixner 6849a163ed8SThomas Gleixnerfault_msg: 685575ca735SVegard Nossum/* fault info: */ 686575ca735SVegard Nossum .ascii "BUG: Int %d: CR2 %p\n" 687575ca735SVegard Nossum/* pusha regs: */ 688575ca735SVegard Nossum .ascii " EDI %p ESI %p EBP %p ESP %p\n" 689575ca735SVegard Nossum .ascii " EBX %p EDX %p ECX %p EAX %p\n" 690575ca735SVegard Nossum/* fault frame: */ 691575ca735SVegard Nossum .ascii " err %p EIP %p CS %p flg %p\n" 692575ca735SVegard Nossum .ascii "Stack: %p %p %p %p %p %p %p %p\n" 693575ca735SVegard Nossum .ascii " %p %p %p %p %p %p %p %p\n" 694575ca735SVegard Nossum .asciz " %p %p %p %p %p %p %p %p\n" 6959a163ed8SThomas Gleixner 6969a163ed8SThomas Gleixner#include "../../x86/xen/xen-head.S" 6979a163ed8SThomas Gleixner 6989a163ed8SThomas Gleixner/* 6999a163ed8SThomas Gleixner * The IDT and GDT 'descriptors' are a strange 48-bit object 7009a163ed8SThomas Gleixner * only used by the lidt and lgdt instructions. They are not 7019a163ed8SThomas Gleixner * like usual segment descriptors - they consist of a 16-bit 7029a163ed8SThomas Gleixner * segment size, and 32-bit linear address value: 7039a163ed8SThomas Gleixner */ 7049a163ed8SThomas Gleixner 7059a163ed8SThomas Gleixner.globl boot_gdt_descr 7069a163ed8SThomas Gleixner.globl idt_descr 7079a163ed8SThomas Gleixner 7089a163ed8SThomas Gleixner ALIGN 7099a163ed8SThomas Gleixner# early boot GDT descriptor (must use 1:1 address mapping) 7109a163ed8SThomas Gleixner .word 0 # 32 bit align gdt_desc.address 7119a163ed8SThomas Gleixnerboot_gdt_descr: 7129a163ed8SThomas Gleixner .word __BOOT_DS+7 7139a163ed8SThomas Gleixner .long boot_gdt - __PAGE_OFFSET 7149a163ed8SThomas Gleixner 7159a163ed8SThomas Gleixner .word 0 # 32-bit align idt_desc.address 7169a163ed8SThomas Gleixneridt_descr: 7179a163ed8SThomas Gleixner .word IDT_ENTRIES*8-1 # idt contains 256 entries 7189a163ed8SThomas Gleixner .long idt_table 7199a163ed8SThomas Gleixner 7209a163ed8SThomas Gleixner# boot GDT descriptor (later on used by CPU#0): 7219a163ed8SThomas Gleixner .word 0 # 32 bit align gdt_desc.address 7229a163ed8SThomas GleixnerENTRY(early_gdt_descr) 7239a163ed8SThomas Gleixner .word GDT_ENTRIES*8-1 7249a163ed8SThomas Gleixner .long per_cpu__gdt_page /* Overwritten for secondary CPUs */ 7259a163ed8SThomas Gleixner 7269a163ed8SThomas Gleixner/* 7279a163ed8SThomas Gleixner * The boot_gdt must mirror the equivalent in setup.S and is 7289a163ed8SThomas Gleixner * used only for booting. 7299a163ed8SThomas Gleixner */ 7309a163ed8SThomas Gleixner .align L1_CACHE_BYTES 7319a163ed8SThomas GleixnerENTRY(boot_gdt) 7329a163ed8SThomas Gleixner .fill GDT_ENTRY_BOOT_CS,8,0 7339a163ed8SThomas Gleixner .quad 0x00cf9a000000ffff /* kernel 4GB code at 0x00000000 */ 7349a163ed8SThomas Gleixner .quad 0x00cf92000000ffff /* kernel 4GB data at 0x00000000 */ 735