1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * prepare to run common code 4 * 5 * Copyright (C) 2000 Andrea Arcangeli <andrea@suse.de> SuSE 6 */ 7 8 #define DISABLE_BRANCH_PROFILING 9 10 /* cpu_feature_enabled() cannot be used this early */ 11 #define USE_EARLY_PGTABLE_L5 12 13 #include <linux/init.h> 14 #include <linux/linkage.h> 15 #include <linux/types.h> 16 #include <linux/kernel.h> 17 #include <linux/string.h> 18 #include <linux/percpu.h> 19 #include <linux/start_kernel.h> 20 #include <linux/io.h> 21 #include <linux/memblock.h> 22 #include <linux/cc_platform.h> 23 #include <linux/pgtable.h> 24 25 #include <asm/processor.h> 26 #include <asm/proto.h> 27 #include <asm/smp.h> 28 #include <asm/setup.h> 29 #include <asm/desc.h> 30 #include <asm/tlbflush.h> 31 #include <asm/sections.h> 32 #include <asm/kdebug.h> 33 #include <asm/e820/api.h> 34 #include <asm/bios_ebda.h> 35 #include <asm/bootparam_utils.h> 36 #include <asm/microcode.h> 37 #include <asm/kasan.h> 38 #include <asm/fixmap.h> 39 #include <asm/realmode.h> 40 #include <asm/extable.h> 41 #include <asm/trapnr.h> 42 #include <asm/sev.h> 43 #include <asm/tdx.h> 44 45 /* 46 * Manage page tables very early on. 47 */ 48 extern pmd_t early_dynamic_pgts[EARLY_DYNAMIC_PAGE_TABLES][PTRS_PER_PMD]; 49 static unsigned int __initdata next_early_pgt; 50 pmdval_t early_pmd_flags = __PAGE_KERNEL_LARGE & ~(_PAGE_GLOBAL | _PAGE_NX); 51 52 #ifdef CONFIG_X86_5LEVEL 53 unsigned int __pgtable_l5_enabled __ro_after_init; 54 unsigned int pgdir_shift __ro_after_init = 39; 55 EXPORT_SYMBOL(pgdir_shift); 56 unsigned int ptrs_per_p4d __ro_after_init = 1; 57 EXPORT_SYMBOL(ptrs_per_p4d); 58 #endif 59 60 #ifdef CONFIG_DYNAMIC_MEMORY_LAYOUT 61 unsigned long page_offset_base __ro_after_init = __PAGE_OFFSET_BASE_L4; 62 EXPORT_SYMBOL(page_offset_base); 63 unsigned long vmalloc_base __ro_after_init = __VMALLOC_BASE_L4; 64 EXPORT_SYMBOL(vmalloc_base); 65 unsigned long vmemmap_base __ro_after_init = __VMEMMAP_BASE_L4; 66 EXPORT_SYMBOL(vmemmap_base); 67 #endif 68 69 /* 70 * GDT used on the boot CPU before switching to virtual addresses. 71 */ 72 static struct desc_struct startup_gdt[GDT_ENTRIES] = { 73 [GDT_ENTRY_KERNEL32_CS] = GDT_ENTRY_INIT(0xc09b, 0, 0xfffff), 74 [GDT_ENTRY_KERNEL_CS] = GDT_ENTRY_INIT(0xa09b, 0, 0xfffff), 75 [GDT_ENTRY_KERNEL_DS] = GDT_ENTRY_INIT(0xc093, 0, 0xfffff), 76 }; 77 78 /* 79 * Address needs to be set at runtime because it references the startup_gdt 80 * while the kernel still uses a direct mapping. 81 */ 82 static struct desc_ptr startup_gdt_descr = { 83 .size = sizeof(startup_gdt)-1, 84 .address = 0, 85 }; 86 87 #define __head __section(".head.text") 88 89 static void __head *fixup_pointer(void *ptr, unsigned long physaddr) 90 { 91 return ptr - (void *)_text + (void *)physaddr; 92 } 93 94 static unsigned long __head *fixup_long(void *ptr, unsigned long physaddr) 95 { 96 return fixup_pointer(ptr, physaddr); 97 } 98 99 #ifdef CONFIG_X86_5LEVEL 100 static unsigned int __head *fixup_int(void *ptr, unsigned long physaddr) 101 { 102 return fixup_pointer(ptr, physaddr); 103 } 104 105 static bool __head check_la57_support(unsigned long physaddr) 106 { 107 /* 108 * 5-level paging is detected and enabled at kernel decompression 109 * stage. Only check if it has been enabled there. 110 */ 111 if (!(native_read_cr4() & X86_CR4_LA57)) 112 return false; 113 114 *fixup_int(&__pgtable_l5_enabled, physaddr) = 1; 115 *fixup_int(&pgdir_shift, physaddr) = 48; 116 *fixup_int(&ptrs_per_p4d, physaddr) = 512; 117 *fixup_long(&page_offset_base, physaddr) = __PAGE_OFFSET_BASE_L5; 118 *fixup_long(&vmalloc_base, physaddr) = __VMALLOC_BASE_L5; 119 *fixup_long(&vmemmap_base, physaddr) = __VMEMMAP_BASE_L5; 120 121 return true; 122 } 123 #else 124 static bool __head check_la57_support(unsigned long physaddr) 125 { 126 return false; 127 } 128 #endif 129 130 static unsigned long __head sme_postprocess_startup(struct boot_params *bp, pmdval_t *pmd) 131 { 132 unsigned long vaddr, vaddr_end; 133 int i; 134 135 /* Encrypt the kernel and related (if SME is active) */ 136 sme_encrypt_kernel(bp); 137 138 /* 139 * Clear the memory encryption mask from the .bss..decrypted section. 140 * The bss section will be memset to zero later in the initialization so 141 * there is no need to zero it after changing the memory encryption 142 * attribute. 143 */ 144 if (sme_get_me_mask()) { 145 vaddr = (unsigned long)__start_bss_decrypted; 146 vaddr_end = (unsigned long)__end_bss_decrypted; 147 148 for (; vaddr < vaddr_end; vaddr += PMD_SIZE) { 149 /* 150 * On SNP, transition the page to shared in the RMP table so that 151 * it is consistent with the page table attribute change. 152 * 153 * __start_bss_decrypted has a virtual address in the high range 154 * mapping (kernel .text). PVALIDATE, by way of 155 * early_snp_set_memory_shared(), requires a valid virtual 156 * address but the kernel is currently running off of the identity 157 * mapping so use __pa() to get a *currently* valid virtual address. 158 */ 159 early_snp_set_memory_shared(__pa(vaddr), __pa(vaddr), PTRS_PER_PMD); 160 161 i = pmd_index(vaddr); 162 pmd[i] -= sme_get_me_mask(); 163 } 164 } 165 166 /* 167 * Return the SME encryption mask (if SME is active) to be used as a 168 * modifier for the initial pgdir entry programmed into CR3. 169 */ 170 return sme_get_me_mask(); 171 } 172 173 /* Code in __startup_64() can be relocated during execution, but the compiler 174 * doesn't have to generate PC-relative relocations when accessing globals from 175 * that function. Clang actually does not generate them, which leads to 176 * boot-time crashes. To work around this problem, every global pointer must 177 * be adjusted using fixup_pointer(). 178 */ 179 unsigned long __head __startup_64(unsigned long physaddr, 180 struct boot_params *bp) 181 { 182 unsigned long load_delta, *p; 183 unsigned long pgtable_flags; 184 pgdval_t *pgd; 185 p4dval_t *p4d; 186 pudval_t *pud; 187 pmdval_t *pmd, pmd_entry; 188 pteval_t *mask_ptr; 189 bool la57; 190 int i; 191 unsigned int *next_pgt_ptr; 192 193 la57 = check_la57_support(physaddr); 194 195 /* Is the address too large? */ 196 if (physaddr >> MAX_PHYSMEM_BITS) 197 for (;;); 198 199 /* 200 * Compute the delta between the address I am compiled to run at 201 * and the address I am actually running at. 202 */ 203 load_delta = physaddr - (unsigned long)(_text - __START_KERNEL_map); 204 205 /* Is the address not 2M aligned? */ 206 if (load_delta & ~PMD_MASK) 207 for (;;); 208 209 /* Include the SME encryption mask in the fixup value */ 210 load_delta += sme_get_me_mask(); 211 212 /* Fixup the physical addresses in the page table */ 213 214 pgd = fixup_pointer(&early_top_pgt, physaddr); 215 p = pgd + pgd_index(__START_KERNEL_map); 216 if (la57) 217 *p = (unsigned long)level4_kernel_pgt; 218 else 219 *p = (unsigned long)level3_kernel_pgt; 220 *p += _PAGE_TABLE_NOENC - __START_KERNEL_map + load_delta; 221 222 if (la57) { 223 p4d = fixup_pointer(&level4_kernel_pgt, physaddr); 224 p4d[511] += load_delta; 225 } 226 227 pud = fixup_pointer(&level3_kernel_pgt, physaddr); 228 pud[510] += load_delta; 229 pud[511] += load_delta; 230 231 pmd = fixup_pointer(level2_fixmap_pgt, physaddr); 232 for (i = FIXMAP_PMD_TOP; i > FIXMAP_PMD_TOP - FIXMAP_PMD_NUM; i--) 233 pmd[i] += load_delta; 234 235 /* 236 * Set up the identity mapping for the switchover. These 237 * entries should *NOT* have the global bit set! This also 238 * creates a bunch of nonsense entries but that is fine -- 239 * it avoids problems around wraparound. 240 */ 241 242 next_pgt_ptr = fixup_pointer(&next_early_pgt, physaddr); 243 pud = fixup_pointer(early_dynamic_pgts[(*next_pgt_ptr)++], physaddr); 244 pmd = fixup_pointer(early_dynamic_pgts[(*next_pgt_ptr)++], physaddr); 245 246 pgtable_flags = _KERNPG_TABLE_NOENC + sme_get_me_mask(); 247 248 if (la57) { 249 p4d = fixup_pointer(early_dynamic_pgts[(*next_pgt_ptr)++], 250 physaddr); 251 252 i = (physaddr >> PGDIR_SHIFT) % PTRS_PER_PGD; 253 pgd[i + 0] = (pgdval_t)p4d + pgtable_flags; 254 pgd[i + 1] = (pgdval_t)p4d + pgtable_flags; 255 256 i = physaddr >> P4D_SHIFT; 257 p4d[(i + 0) % PTRS_PER_P4D] = (pgdval_t)pud + pgtable_flags; 258 p4d[(i + 1) % PTRS_PER_P4D] = (pgdval_t)pud + pgtable_flags; 259 } else { 260 i = (physaddr >> PGDIR_SHIFT) % PTRS_PER_PGD; 261 pgd[i + 0] = (pgdval_t)pud + pgtable_flags; 262 pgd[i + 1] = (pgdval_t)pud + pgtable_flags; 263 } 264 265 i = physaddr >> PUD_SHIFT; 266 pud[(i + 0) % PTRS_PER_PUD] = (pudval_t)pmd + pgtable_flags; 267 pud[(i + 1) % PTRS_PER_PUD] = (pudval_t)pmd + pgtable_flags; 268 269 pmd_entry = __PAGE_KERNEL_LARGE_EXEC & ~_PAGE_GLOBAL; 270 /* Filter out unsupported __PAGE_KERNEL_* bits: */ 271 mask_ptr = fixup_pointer(&__supported_pte_mask, physaddr); 272 pmd_entry &= *mask_ptr; 273 pmd_entry += sme_get_me_mask(); 274 pmd_entry += physaddr; 275 276 for (i = 0; i < DIV_ROUND_UP(_end - _text, PMD_SIZE); i++) { 277 int idx = i + (physaddr >> PMD_SHIFT); 278 279 pmd[idx % PTRS_PER_PMD] = pmd_entry + i * PMD_SIZE; 280 } 281 282 /* 283 * Fixup the kernel text+data virtual addresses. Note that 284 * we might write invalid pmds, when the kernel is relocated 285 * cleanup_highmap() fixes this up along with the mappings 286 * beyond _end. 287 * 288 * Only the region occupied by the kernel image has so far 289 * been checked against the table of usable memory regions 290 * provided by the firmware, so invalidate pages outside that 291 * region. A page table entry that maps to a reserved area of 292 * memory would allow processor speculation into that area, 293 * and on some hardware (particularly the UV platform) even 294 * speculative access to some reserved areas is caught as an 295 * error, causing the BIOS to halt the system. 296 */ 297 298 pmd = fixup_pointer(level2_kernel_pgt, physaddr); 299 300 /* invalidate pages before the kernel image */ 301 for (i = 0; i < pmd_index((unsigned long)_text); i++) 302 pmd[i] &= ~_PAGE_PRESENT; 303 304 /* fixup pages that are part of the kernel image */ 305 for (; i <= pmd_index((unsigned long)_end); i++) 306 if (pmd[i] & _PAGE_PRESENT) 307 pmd[i] += load_delta; 308 309 /* invalidate pages after the kernel image */ 310 for (; i < PTRS_PER_PMD; i++) 311 pmd[i] &= ~_PAGE_PRESENT; 312 313 /* 314 * Fixup phys_base - remove the memory encryption mask to obtain 315 * the true physical address. 316 */ 317 *fixup_long(&phys_base, physaddr) += load_delta - sme_get_me_mask(); 318 319 return sme_postprocess_startup(bp, pmd); 320 } 321 322 /* Wipe all early page tables except for the kernel symbol map */ 323 static void __init reset_early_page_tables(void) 324 { 325 memset(early_top_pgt, 0, sizeof(pgd_t)*(PTRS_PER_PGD-1)); 326 next_early_pgt = 0; 327 write_cr3(__sme_pa_nodebug(early_top_pgt)); 328 } 329 330 /* Create a new PMD entry */ 331 bool __init __early_make_pgtable(unsigned long address, pmdval_t pmd) 332 { 333 unsigned long physaddr = address - __PAGE_OFFSET; 334 pgdval_t pgd, *pgd_p; 335 p4dval_t p4d, *p4d_p; 336 pudval_t pud, *pud_p; 337 pmdval_t *pmd_p; 338 339 /* Invalid address or early pgt is done ? */ 340 if (physaddr >= MAXMEM || read_cr3_pa() != __pa_nodebug(early_top_pgt)) 341 return false; 342 343 again: 344 pgd_p = &early_top_pgt[pgd_index(address)].pgd; 345 pgd = *pgd_p; 346 347 /* 348 * The use of __START_KERNEL_map rather than __PAGE_OFFSET here is 349 * critical -- __PAGE_OFFSET would point us back into the dynamic 350 * range and we might end up looping forever... 351 */ 352 if (!pgtable_l5_enabled()) 353 p4d_p = pgd_p; 354 else if (pgd) 355 p4d_p = (p4dval_t *)((pgd & PTE_PFN_MASK) + __START_KERNEL_map - phys_base); 356 else { 357 if (next_early_pgt >= EARLY_DYNAMIC_PAGE_TABLES) { 358 reset_early_page_tables(); 359 goto again; 360 } 361 362 p4d_p = (p4dval_t *)early_dynamic_pgts[next_early_pgt++]; 363 memset(p4d_p, 0, sizeof(*p4d_p) * PTRS_PER_P4D); 364 *pgd_p = (pgdval_t)p4d_p - __START_KERNEL_map + phys_base + _KERNPG_TABLE; 365 } 366 p4d_p += p4d_index(address); 367 p4d = *p4d_p; 368 369 if (p4d) 370 pud_p = (pudval_t *)((p4d & PTE_PFN_MASK) + __START_KERNEL_map - phys_base); 371 else { 372 if (next_early_pgt >= EARLY_DYNAMIC_PAGE_TABLES) { 373 reset_early_page_tables(); 374 goto again; 375 } 376 377 pud_p = (pudval_t *)early_dynamic_pgts[next_early_pgt++]; 378 memset(pud_p, 0, sizeof(*pud_p) * PTRS_PER_PUD); 379 *p4d_p = (p4dval_t)pud_p - __START_KERNEL_map + phys_base + _KERNPG_TABLE; 380 } 381 pud_p += pud_index(address); 382 pud = *pud_p; 383 384 if (pud) 385 pmd_p = (pmdval_t *)((pud & PTE_PFN_MASK) + __START_KERNEL_map - phys_base); 386 else { 387 if (next_early_pgt >= EARLY_DYNAMIC_PAGE_TABLES) { 388 reset_early_page_tables(); 389 goto again; 390 } 391 392 pmd_p = (pmdval_t *)early_dynamic_pgts[next_early_pgt++]; 393 memset(pmd_p, 0, sizeof(*pmd_p) * PTRS_PER_PMD); 394 *pud_p = (pudval_t)pmd_p - __START_KERNEL_map + phys_base + _KERNPG_TABLE; 395 } 396 pmd_p[pmd_index(address)] = pmd; 397 398 return true; 399 } 400 401 static bool __init early_make_pgtable(unsigned long address) 402 { 403 unsigned long physaddr = address - __PAGE_OFFSET; 404 pmdval_t pmd; 405 406 pmd = (physaddr & PMD_MASK) + early_pmd_flags; 407 408 return __early_make_pgtable(address, pmd); 409 } 410 411 void __init do_early_exception(struct pt_regs *regs, int trapnr) 412 { 413 if (trapnr == X86_TRAP_PF && 414 early_make_pgtable(native_read_cr2())) 415 return; 416 417 if (IS_ENABLED(CONFIG_AMD_MEM_ENCRYPT) && 418 trapnr == X86_TRAP_VC && handle_vc_boot_ghcb(regs)) 419 return; 420 421 if (trapnr == X86_TRAP_VE && tdx_early_handle_ve(regs)) 422 return; 423 424 early_fixup_exception(regs, trapnr); 425 } 426 427 /* Don't add a printk in there. printk relies on the PDA which is not initialized 428 yet. */ 429 void __init clear_bss(void) 430 { 431 memset(__bss_start, 0, 432 (unsigned long) __bss_stop - (unsigned long) __bss_start); 433 memset(__brk_base, 0, 434 (unsigned long) __brk_limit - (unsigned long) __brk_base); 435 } 436 437 static unsigned long get_cmd_line_ptr(void) 438 { 439 unsigned long cmd_line_ptr = boot_params.hdr.cmd_line_ptr; 440 441 cmd_line_ptr |= (u64)boot_params.ext_cmd_line_ptr << 32; 442 443 return cmd_line_ptr; 444 } 445 446 static void __init copy_bootdata(char *real_mode_data) 447 { 448 char * command_line; 449 unsigned long cmd_line_ptr; 450 451 /* 452 * If SME is active, this will create decrypted mappings of the 453 * boot data in advance of the copy operations. 454 */ 455 sme_map_bootdata(real_mode_data); 456 457 memcpy(&boot_params, real_mode_data, sizeof(boot_params)); 458 sanitize_boot_params(&boot_params); 459 cmd_line_ptr = get_cmd_line_ptr(); 460 if (cmd_line_ptr) { 461 command_line = __va(cmd_line_ptr); 462 memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE); 463 } 464 465 /* 466 * The old boot data is no longer needed and won't be reserved, 467 * freeing up that memory for use by the system. If SME is active, 468 * we need to remove the mappings that were created so that the 469 * memory doesn't remain mapped as decrypted. 470 */ 471 sme_unmap_bootdata(real_mode_data); 472 } 473 474 asmlinkage __visible void __init __noreturn x86_64_start_kernel(char * real_mode_data) 475 { 476 /* 477 * Build-time sanity checks on the kernel image and module 478 * area mappings. (these are purely build-time and produce no code) 479 */ 480 BUILD_BUG_ON(MODULES_VADDR < __START_KERNEL_map); 481 BUILD_BUG_ON(MODULES_VADDR - __START_KERNEL_map < KERNEL_IMAGE_SIZE); 482 BUILD_BUG_ON(MODULES_LEN + KERNEL_IMAGE_SIZE > 2*PUD_SIZE); 483 BUILD_BUG_ON((__START_KERNEL_map & ~PMD_MASK) != 0); 484 BUILD_BUG_ON((MODULES_VADDR & ~PMD_MASK) != 0); 485 BUILD_BUG_ON(!(MODULES_VADDR > __START_KERNEL)); 486 MAYBE_BUILD_BUG_ON(!(((MODULES_END - 1) & PGDIR_MASK) == 487 (__START_KERNEL & PGDIR_MASK))); 488 BUILD_BUG_ON(__fix_to_virt(__end_of_fixed_addresses) <= MODULES_END); 489 490 cr4_init_shadow(); 491 492 /* Kill off the identity-map trampoline */ 493 reset_early_page_tables(); 494 495 clear_bss(); 496 497 /* 498 * This needs to happen *before* kasan_early_init() because latter maps stuff 499 * into that page. 500 */ 501 clear_page(init_top_pgt); 502 503 /* 504 * SME support may update early_pmd_flags to include the memory 505 * encryption mask, so it needs to be called before anything 506 * that may generate a page fault. 507 */ 508 sme_early_init(); 509 510 kasan_early_init(); 511 512 /* 513 * Flush global TLB entries which could be left over from the trampoline page 514 * table. 515 * 516 * This needs to happen *after* kasan_early_init() as KASAN-enabled .configs 517 * instrument native_write_cr4() so KASAN must be initialized for that 518 * instrumentation to work. 519 */ 520 __native_tlb_flush_global(this_cpu_read(cpu_tlbstate.cr4)); 521 522 idt_setup_early_handler(); 523 524 /* Needed before cc_platform_has() can be used for TDX */ 525 tdx_early_init(); 526 527 copy_bootdata(__va(real_mode_data)); 528 529 /* 530 * Load microcode early on BSP. 531 */ 532 load_ucode_bsp(); 533 534 /* set init_top_pgt kernel high mapping*/ 535 init_top_pgt[511] = early_top_pgt[511]; 536 537 x86_64_start_reservations(real_mode_data); 538 } 539 540 void __init __noreturn x86_64_start_reservations(char *real_mode_data) 541 { 542 /* version is always not zero if it is copied */ 543 if (!boot_params.hdr.version) 544 copy_bootdata(__va(real_mode_data)); 545 546 x86_early_init_platform_quirks(); 547 548 switch (boot_params.hdr.hardware_subarch) { 549 case X86_SUBARCH_INTEL_MID: 550 x86_intel_mid_early_setup(); 551 break; 552 default: 553 break; 554 } 555 556 start_kernel(); 557 } 558 559 /* 560 * Data structures and code used for IDT setup in head_64.S. The bringup-IDT is 561 * used until the idt_table takes over. On the boot CPU this happens in 562 * x86_64_start_kernel(), on secondary CPUs in start_secondary(). In both cases 563 * this happens in the functions called from head_64.S. 564 * 565 * The idt_table can't be used that early because all the code modifying it is 566 * in idt.c and can be instrumented by tracing or KASAN, which both don't work 567 * during early CPU bringup. Also the idt_table has the runtime vectors 568 * configured which require certain CPU state to be setup already (like TSS), 569 * which also hasn't happened yet in early CPU bringup. 570 */ 571 static gate_desc bringup_idt_table[NUM_EXCEPTION_VECTORS] __page_aligned_data; 572 573 static struct desc_ptr bringup_idt_descr = { 574 .size = (NUM_EXCEPTION_VECTORS * sizeof(gate_desc)) - 1, 575 .address = 0, /* Set at runtime */ 576 }; 577 578 static void set_bringup_idt_handler(gate_desc *idt, int n, void *handler) 579 { 580 #ifdef CONFIG_AMD_MEM_ENCRYPT 581 struct idt_data data; 582 gate_desc desc; 583 584 init_idt_data(&data, n, handler); 585 idt_init_desc(&desc, &data); 586 native_write_idt_entry(idt, n, &desc); 587 #endif 588 } 589 590 /* This runs while still in the direct mapping */ 591 static void startup_64_load_idt(unsigned long physbase) 592 { 593 struct desc_ptr *desc = fixup_pointer(&bringup_idt_descr, physbase); 594 gate_desc *idt = fixup_pointer(bringup_idt_table, physbase); 595 596 597 if (IS_ENABLED(CONFIG_AMD_MEM_ENCRYPT)) { 598 void *handler; 599 600 /* VMM Communication Exception */ 601 handler = fixup_pointer(vc_no_ghcb, physbase); 602 set_bringup_idt_handler(idt, X86_TRAP_VC, handler); 603 } 604 605 desc->address = (unsigned long)idt; 606 native_load_idt(desc); 607 } 608 609 /* This is used when running on kernel addresses */ 610 void early_setup_idt(void) 611 { 612 /* VMM Communication Exception */ 613 if (IS_ENABLED(CONFIG_AMD_MEM_ENCRYPT)) { 614 setup_ghcb(); 615 set_bringup_idt_handler(bringup_idt_table, X86_TRAP_VC, vc_boot_ghcb); 616 } 617 618 bringup_idt_descr.address = (unsigned long)bringup_idt_table; 619 native_load_idt(&bringup_idt_descr); 620 } 621 622 /* 623 * Setup boot CPU state needed before kernel switches to virtual addresses. 624 */ 625 void __head startup_64_setup_env(unsigned long physbase) 626 { 627 /* Load GDT */ 628 startup_gdt_descr.address = (unsigned long)fixup_pointer(startup_gdt, physbase); 629 native_load_gdt(&startup_gdt_descr); 630 631 /* New GDT is live - reload data segment registers */ 632 asm volatile("movl %%eax, %%ds\n" 633 "movl %%eax, %%ss\n" 634 "movl %%eax, %%es\n" : : "a"(__KERNEL_DS) : "memory"); 635 636 startup_64_load_idt(physbase); 637 } 638