1 /* 2 * xsave/xrstor support. 3 * 4 * Author: Suresh Siddha <suresh.b.siddha@intel.com> 5 */ 6 #include <linux/compat.h> 7 #include <linux/cpu.h> 8 #include <linux/mman.h> 9 #include <linux/pkeys.h> 10 11 #include <asm/fpu/api.h> 12 #include <asm/fpu/internal.h> 13 #include <asm/fpu/signal.h> 14 #include <asm/fpu/regset.h> 15 #include <asm/fpu/xstate.h> 16 17 #include <asm/tlbflush.h> 18 19 /* 20 * Although we spell it out in here, the Processor Trace 21 * xfeature is completely unused. We use other mechanisms 22 * to save/restore PT state in Linux. 23 */ 24 static const char *xfeature_names[] = 25 { 26 "x87 floating point registers" , 27 "SSE registers" , 28 "AVX registers" , 29 "MPX bounds registers" , 30 "MPX CSR" , 31 "AVX-512 opmask" , 32 "AVX-512 Hi256" , 33 "AVX-512 ZMM_Hi256" , 34 "Processor Trace (unused)" , 35 "Protection Keys User registers", 36 "unknown xstate feature" , 37 }; 38 39 /* 40 * Mask of xstate features supported by the CPU and the kernel: 41 */ 42 u64 xfeatures_mask __read_mostly; 43 44 static unsigned int xstate_offsets[XFEATURE_MAX] = { [ 0 ... XFEATURE_MAX - 1] = -1}; 45 static unsigned int xstate_sizes[XFEATURE_MAX] = { [ 0 ... XFEATURE_MAX - 1] = -1}; 46 static unsigned int xstate_comp_offsets[sizeof(xfeatures_mask)*8]; 47 48 /* 49 * The XSAVE area of kernel can be in standard or compacted format; 50 * it is always in standard format for user mode. This is the user 51 * mode standard format size used for signal and ptrace frames. 52 */ 53 unsigned int fpu_user_xstate_size; 54 55 /* 56 * Clear all of the X86_FEATURE_* bits that are unavailable 57 * when the CPU has no XSAVE support. 58 */ 59 void fpu__xstate_clear_all_cpu_caps(void) 60 { 61 setup_clear_cpu_cap(X86_FEATURE_XSAVE); 62 setup_clear_cpu_cap(X86_FEATURE_XSAVEOPT); 63 setup_clear_cpu_cap(X86_FEATURE_XSAVEC); 64 setup_clear_cpu_cap(X86_FEATURE_XSAVES); 65 setup_clear_cpu_cap(X86_FEATURE_AVX); 66 setup_clear_cpu_cap(X86_FEATURE_AVX2); 67 setup_clear_cpu_cap(X86_FEATURE_AVX512F); 68 setup_clear_cpu_cap(X86_FEATURE_AVX512PF); 69 setup_clear_cpu_cap(X86_FEATURE_AVX512ER); 70 setup_clear_cpu_cap(X86_FEATURE_AVX512CD); 71 setup_clear_cpu_cap(X86_FEATURE_AVX512DQ); 72 setup_clear_cpu_cap(X86_FEATURE_AVX512BW); 73 setup_clear_cpu_cap(X86_FEATURE_AVX512VL); 74 setup_clear_cpu_cap(X86_FEATURE_MPX); 75 setup_clear_cpu_cap(X86_FEATURE_XGETBV1); 76 setup_clear_cpu_cap(X86_FEATURE_PKU); 77 } 78 79 /* 80 * Return whether the system supports a given xfeature. 81 * 82 * Also return the name of the (most advanced) feature that the caller requested: 83 */ 84 int cpu_has_xfeatures(u64 xfeatures_needed, const char **feature_name) 85 { 86 u64 xfeatures_missing = xfeatures_needed & ~xfeatures_mask; 87 88 if (unlikely(feature_name)) { 89 long xfeature_idx, max_idx; 90 u64 xfeatures_print; 91 /* 92 * So we use FLS here to be able to print the most advanced 93 * feature that was requested but is missing. So if a driver 94 * asks about "XFEATURE_MASK_SSE | XFEATURE_MASK_YMM" we'll print the 95 * missing AVX feature - this is the most informative message 96 * to users: 97 */ 98 if (xfeatures_missing) 99 xfeatures_print = xfeatures_missing; 100 else 101 xfeatures_print = xfeatures_needed; 102 103 xfeature_idx = fls64(xfeatures_print)-1; 104 max_idx = ARRAY_SIZE(xfeature_names)-1; 105 xfeature_idx = min(xfeature_idx, max_idx); 106 107 *feature_name = xfeature_names[xfeature_idx]; 108 } 109 110 if (xfeatures_missing) 111 return 0; 112 113 return 1; 114 } 115 EXPORT_SYMBOL_GPL(cpu_has_xfeatures); 116 117 static int xfeature_is_supervisor(int xfeature_nr) 118 { 119 /* 120 * We currently do not support supervisor states, but if 121 * we did, we could find out like this. 122 * 123 * SDM says: If state component 'i' is a user state component, 124 * ECX[0] return 0; if state component i is a supervisor 125 * state component, ECX[0] returns 1. 126 */ 127 u32 eax, ebx, ecx, edx; 128 129 cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx); 130 return !!(ecx & 1); 131 } 132 133 static int xfeature_is_user(int xfeature_nr) 134 { 135 return !xfeature_is_supervisor(xfeature_nr); 136 } 137 138 /* 139 * When executing XSAVEOPT (or other optimized XSAVE instructions), if 140 * a processor implementation detects that an FPU state component is still 141 * (or is again) in its initialized state, it may clear the corresponding 142 * bit in the header.xfeatures field, and can skip the writeout of registers 143 * to the corresponding memory layout. 144 * 145 * This means that when the bit is zero, the state component might still contain 146 * some previous - non-initialized register state. 147 * 148 * Before writing xstate information to user-space we sanitize those components, 149 * to always ensure that the memory layout of a feature will be in the init state 150 * if the corresponding header bit is zero. This is to ensure that user-space doesn't 151 * see some stale state in the memory layout during signal handling, debugging etc. 152 */ 153 void fpstate_sanitize_xstate(struct fpu *fpu) 154 { 155 struct fxregs_state *fx = &fpu->state.fxsave; 156 int feature_bit; 157 u64 xfeatures; 158 159 if (!use_xsaveopt()) 160 return; 161 162 xfeatures = fpu->state.xsave.header.xfeatures; 163 164 /* 165 * None of the feature bits are in init state. So nothing else 166 * to do for us, as the memory layout is up to date. 167 */ 168 if ((xfeatures & xfeatures_mask) == xfeatures_mask) 169 return; 170 171 /* 172 * FP is in init state 173 */ 174 if (!(xfeatures & XFEATURE_MASK_FP)) { 175 fx->cwd = 0x37f; 176 fx->swd = 0; 177 fx->twd = 0; 178 fx->fop = 0; 179 fx->rip = 0; 180 fx->rdp = 0; 181 memset(&fx->st_space[0], 0, 128); 182 } 183 184 /* 185 * SSE is in init state 186 */ 187 if (!(xfeatures & XFEATURE_MASK_SSE)) 188 memset(&fx->xmm_space[0], 0, 256); 189 190 /* 191 * First two features are FPU and SSE, which above we handled 192 * in a special way already: 193 */ 194 feature_bit = 0x2; 195 xfeatures = (xfeatures_mask & ~xfeatures) >> 2; 196 197 /* 198 * Update all the remaining memory layouts according to their 199 * standard xstate layout, if their header bit is in the init 200 * state: 201 */ 202 while (xfeatures) { 203 if (xfeatures & 0x1) { 204 int offset = xstate_comp_offsets[feature_bit]; 205 int size = xstate_sizes[feature_bit]; 206 207 memcpy((void *)fx + offset, 208 (void *)&init_fpstate.xsave + offset, 209 size); 210 } 211 212 xfeatures >>= 1; 213 feature_bit++; 214 } 215 } 216 217 /* 218 * Enable the extended processor state save/restore feature. 219 * Called once per CPU onlining. 220 */ 221 void fpu__init_cpu_xstate(void) 222 { 223 if (!boot_cpu_has(X86_FEATURE_XSAVE) || !xfeatures_mask) 224 return; 225 /* 226 * Make it clear that XSAVES supervisor states are not yet 227 * implemented should anyone expect it to work by changing 228 * bits in XFEATURE_MASK_* macros and XCR0. 229 */ 230 WARN_ONCE((xfeatures_mask & XFEATURE_MASK_SUPERVISOR), 231 "x86/fpu: XSAVES supervisor states are not yet implemented.\n"); 232 233 xfeatures_mask &= ~XFEATURE_MASK_SUPERVISOR; 234 235 cr4_set_bits(X86_CR4_OSXSAVE); 236 xsetbv(XCR_XFEATURE_ENABLED_MASK, xfeatures_mask); 237 } 238 239 /* 240 * Note that in the future we will likely need a pair of 241 * functions here: one for user xstates and the other for 242 * system xstates. For now, they are the same. 243 */ 244 static int xfeature_enabled(enum xfeature xfeature) 245 { 246 return !!(xfeatures_mask & (1UL << xfeature)); 247 } 248 249 /* 250 * Record the offsets and sizes of various xstates contained 251 * in the XSAVE state memory layout. 252 */ 253 static void __init setup_xstate_features(void) 254 { 255 u32 eax, ebx, ecx, edx, i; 256 /* start at the beginnning of the "extended state" */ 257 unsigned int last_good_offset = offsetof(struct xregs_state, 258 extended_state_area); 259 /* 260 * The FP xstates and SSE xstates are legacy states. They are always 261 * in the fixed offsets in the xsave area in either compacted form 262 * or standard form. 263 */ 264 xstate_offsets[0] = 0; 265 xstate_sizes[0] = offsetof(struct fxregs_state, xmm_space); 266 xstate_offsets[1] = xstate_sizes[0]; 267 xstate_sizes[1] = FIELD_SIZEOF(struct fxregs_state, xmm_space); 268 269 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) { 270 if (!xfeature_enabled(i)) 271 continue; 272 273 cpuid_count(XSTATE_CPUID, i, &eax, &ebx, &ecx, &edx); 274 275 /* 276 * If an xfeature is supervisor state, the offset 277 * in EBX is invalid. We leave it to -1. 278 */ 279 if (xfeature_is_user(i)) 280 xstate_offsets[i] = ebx; 281 282 xstate_sizes[i] = eax; 283 /* 284 * In our xstate size checks, we assume that the 285 * highest-numbered xstate feature has the 286 * highest offset in the buffer. Ensure it does. 287 */ 288 WARN_ONCE(last_good_offset > xstate_offsets[i], 289 "x86/fpu: misordered xstate at %d\n", last_good_offset); 290 last_good_offset = xstate_offsets[i]; 291 } 292 } 293 294 static void __init print_xstate_feature(u64 xstate_mask) 295 { 296 const char *feature_name; 297 298 if (cpu_has_xfeatures(xstate_mask, &feature_name)) 299 pr_info("x86/fpu: Supporting XSAVE feature 0x%03Lx: '%s'\n", xstate_mask, feature_name); 300 } 301 302 /* 303 * Print out all the supported xstate features: 304 */ 305 static void __init print_xstate_features(void) 306 { 307 print_xstate_feature(XFEATURE_MASK_FP); 308 print_xstate_feature(XFEATURE_MASK_SSE); 309 print_xstate_feature(XFEATURE_MASK_YMM); 310 print_xstate_feature(XFEATURE_MASK_BNDREGS); 311 print_xstate_feature(XFEATURE_MASK_BNDCSR); 312 print_xstate_feature(XFEATURE_MASK_OPMASK); 313 print_xstate_feature(XFEATURE_MASK_ZMM_Hi256); 314 print_xstate_feature(XFEATURE_MASK_Hi16_ZMM); 315 print_xstate_feature(XFEATURE_MASK_PKRU); 316 } 317 318 /* 319 * This check is important because it is easy to get XSTATE_* 320 * confused with XSTATE_BIT_*. 321 */ 322 #define CHECK_XFEATURE(nr) do { \ 323 WARN_ON(nr < FIRST_EXTENDED_XFEATURE); \ 324 WARN_ON(nr >= XFEATURE_MAX); \ 325 } while (0) 326 327 /* 328 * We could cache this like xstate_size[], but we only use 329 * it here, so it would be a waste of space. 330 */ 331 static int xfeature_is_aligned(int xfeature_nr) 332 { 333 u32 eax, ebx, ecx, edx; 334 335 CHECK_XFEATURE(xfeature_nr); 336 cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx); 337 /* 338 * The value returned by ECX[1] indicates the alignment 339 * of state component 'i' when the compacted format 340 * of the extended region of an XSAVE area is used: 341 */ 342 return !!(ecx & 2); 343 } 344 345 /* 346 * This function sets up offsets and sizes of all extended states in 347 * xsave area. This supports both standard format and compacted format 348 * of the xsave aread. 349 */ 350 static void __init setup_xstate_comp(void) 351 { 352 unsigned int xstate_comp_sizes[sizeof(xfeatures_mask)*8]; 353 int i; 354 355 /* 356 * The FP xstates and SSE xstates are legacy states. They are always 357 * in the fixed offsets in the xsave area in either compacted form 358 * or standard form. 359 */ 360 xstate_comp_offsets[0] = 0; 361 xstate_comp_offsets[1] = offsetof(struct fxregs_state, xmm_space); 362 363 if (!boot_cpu_has(X86_FEATURE_XSAVES)) { 364 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) { 365 if (xfeature_enabled(i)) { 366 xstate_comp_offsets[i] = xstate_offsets[i]; 367 xstate_comp_sizes[i] = xstate_sizes[i]; 368 } 369 } 370 return; 371 } 372 373 xstate_comp_offsets[FIRST_EXTENDED_XFEATURE] = 374 FXSAVE_SIZE + XSAVE_HDR_SIZE; 375 376 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) { 377 if (xfeature_enabled(i)) 378 xstate_comp_sizes[i] = xstate_sizes[i]; 379 else 380 xstate_comp_sizes[i] = 0; 381 382 if (i > FIRST_EXTENDED_XFEATURE) { 383 xstate_comp_offsets[i] = xstate_comp_offsets[i-1] 384 + xstate_comp_sizes[i-1]; 385 386 if (xfeature_is_aligned(i)) 387 xstate_comp_offsets[i] = 388 ALIGN(xstate_comp_offsets[i], 64); 389 } 390 } 391 } 392 393 /* 394 * Print out xstate component offsets and sizes 395 */ 396 static void __init print_xstate_offset_size(void) 397 { 398 int i; 399 400 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) { 401 if (!xfeature_enabled(i)) 402 continue; 403 pr_info("x86/fpu: xstate_offset[%d]: %4d, xstate_sizes[%d]: %4d\n", 404 i, xstate_comp_offsets[i], i, xstate_sizes[i]); 405 } 406 } 407 408 /* 409 * setup the xstate image representing the init state 410 */ 411 static void __init setup_init_fpu_buf(void) 412 { 413 static int on_boot_cpu __initdata = 1; 414 415 WARN_ON_FPU(!on_boot_cpu); 416 on_boot_cpu = 0; 417 418 if (!boot_cpu_has(X86_FEATURE_XSAVE)) 419 return; 420 421 setup_xstate_features(); 422 print_xstate_features(); 423 424 if (boot_cpu_has(X86_FEATURE_XSAVES)) 425 init_fpstate.xsave.header.xcomp_bv = (u64)1 << 63 | xfeatures_mask; 426 427 /* 428 * Init all the features state with header.xfeatures being 0x0 429 */ 430 copy_kernel_to_xregs_booting(&init_fpstate.xsave); 431 432 /* 433 * Dump the init state again. This is to identify the init state 434 * of any feature which is not represented by all zero's. 435 */ 436 copy_xregs_to_kernel_booting(&init_fpstate.xsave); 437 } 438 439 static int xfeature_uncompacted_offset(int xfeature_nr) 440 { 441 u32 eax, ebx, ecx, edx; 442 443 /* 444 * Only XSAVES supports supervisor states and it uses compacted 445 * format. Checking a supervisor state's uncompacted offset is 446 * an error. 447 */ 448 if (XFEATURE_MASK_SUPERVISOR & (1 << xfeature_nr)) { 449 WARN_ONCE(1, "No fixed offset for xstate %d\n", xfeature_nr); 450 return -1; 451 } 452 453 CHECK_XFEATURE(xfeature_nr); 454 cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx); 455 return ebx; 456 } 457 458 static int xfeature_size(int xfeature_nr) 459 { 460 u32 eax, ebx, ecx, edx; 461 462 CHECK_XFEATURE(xfeature_nr); 463 cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx); 464 return eax; 465 } 466 467 /* 468 * 'XSAVES' implies two different things: 469 * 1. saving of supervisor/system state 470 * 2. using the compacted format 471 * 472 * Use this function when dealing with the compacted format so 473 * that it is obvious which aspect of 'XSAVES' is being handled 474 * by the calling code. 475 */ 476 int using_compacted_format(void) 477 { 478 return boot_cpu_has(X86_FEATURE_XSAVES); 479 } 480 481 static void __xstate_dump_leaves(void) 482 { 483 int i; 484 u32 eax, ebx, ecx, edx; 485 static int should_dump = 1; 486 487 if (!should_dump) 488 return; 489 should_dump = 0; 490 /* 491 * Dump out a few leaves past the ones that we support 492 * just in case there are some goodies up there 493 */ 494 for (i = 0; i < XFEATURE_MAX + 10; i++) { 495 cpuid_count(XSTATE_CPUID, i, &eax, &ebx, &ecx, &edx); 496 pr_warn("CPUID[%02x, %02x]: eax=%08x ebx=%08x ecx=%08x edx=%08x\n", 497 XSTATE_CPUID, i, eax, ebx, ecx, edx); 498 } 499 } 500 501 #define XSTATE_WARN_ON(x) do { \ 502 if (WARN_ONCE(x, "XSAVE consistency problem, dumping leaves")) { \ 503 __xstate_dump_leaves(); \ 504 } \ 505 } while (0) 506 507 #define XCHECK_SZ(sz, nr, nr_macro, __struct) do { \ 508 if ((nr == nr_macro) && \ 509 WARN_ONCE(sz != sizeof(__struct), \ 510 "%s: struct is %zu bytes, cpu state %d bytes\n", \ 511 __stringify(nr_macro), sizeof(__struct), sz)) { \ 512 __xstate_dump_leaves(); \ 513 } \ 514 } while (0) 515 516 /* 517 * We have a C struct for each 'xstate'. We need to ensure 518 * that our software representation matches what the CPU 519 * tells us about the state's size. 520 */ 521 static void check_xstate_against_struct(int nr) 522 { 523 /* 524 * Ask the CPU for the size of the state. 525 */ 526 int sz = xfeature_size(nr); 527 /* 528 * Match each CPU state with the corresponding software 529 * structure. 530 */ 531 XCHECK_SZ(sz, nr, XFEATURE_YMM, struct ymmh_struct); 532 XCHECK_SZ(sz, nr, XFEATURE_BNDREGS, struct mpx_bndreg_state); 533 XCHECK_SZ(sz, nr, XFEATURE_BNDCSR, struct mpx_bndcsr_state); 534 XCHECK_SZ(sz, nr, XFEATURE_OPMASK, struct avx_512_opmask_state); 535 XCHECK_SZ(sz, nr, XFEATURE_ZMM_Hi256, struct avx_512_zmm_uppers_state); 536 XCHECK_SZ(sz, nr, XFEATURE_Hi16_ZMM, struct avx_512_hi16_state); 537 XCHECK_SZ(sz, nr, XFEATURE_PKRU, struct pkru_state); 538 539 /* 540 * Make *SURE* to add any feature numbers in below if 541 * there are "holes" in the xsave state component 542 * numbers. 543 */ 544 if ((nr < XFEATURE_YMM) || 545 (nr >= XFEATURE_MAX) || 546 (nr == XFEATURE_PT_UNIMPLEMENTED_SO_FAR)) { 547 WARN_ONCE(1, "no structure for xstate: %d\n", nr); 548 XSTATE_WARN_ON(1); 549 } 550 } 551 552 /* 553 * This essentially double-checks what the cpu told us about 554 * how large the XSAVE buffer needs to be. We are recalculating 555 * it to be safe. 556 */ 557 static void do_extra_xstate_size_checks(void) 558 { 559 int paranoid_xstate_size = FXSAVE_SIZE + XSAVE_HDR_SIZE; 560 int i; 561 562 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) { 563 if (!xfeature_enabled(i)) 564 continue; 565 566 check_xstate_against_struct(i); 567 /* 568 * Supervisor state components can be managed only by 569 * XSAVES, which is compacted-format only. 570 */ 571 if (!using_compacted_format()) 572 XSTATE_WARN_ON(xfeature_is_supervisor(i)); 573 574 /* Align from the end of the previous feature */ 575 if (xfeature_is_aligned(i)) 576 paranoid_xstate_size = ALIGN(paranoid_xstate_size, 64); 577 /* 578 * The offset of a given state in the non-compacted 579 * format is given to us in a CPUID leaf. We check 580 * them for being ordered (increasing offsets) in 581 * setup_xstate_features(). 582 */ 583 if (!using_compacted_format()) 584 paranoid_xstate_size = xfeature_uncompacted_offset(i); 585 /* 586 * The compacted-format offset always depends on where 587 * the previous state ended. 588 */ 589 paranoid_xstate_size += xfeature_size(i); 590 } 591 XSTATE_WARN_ON(paranoid_xstate_size != fpu_kernel_xstate_size); 592 } 593 594 595 /* 596 * Get total size of enabled xstates in XCR0/xfeatures_mask. 597 * 598 * Note the SDM's wording here. "sub-function 0" only enumerates 599 * the size of the *user* states. If we use it to size a buffer 600 * that we use 'XSAVES' on, we could potentially overflow the 601 * buffer because 'XSAVES' saves system states too. 602 * 603 * Note that we do not currently set any bits on IA32_XSS so 604 * 'XCR0 | IA32_XSS == XCR0' for now. 605 */ 606 static unsigned int __init get_xsaves_size(void) 607 { 608 unsigned int eax, ebx, ecx, edx; 609 /* 610 * - CPUID function 0DH, sub-function 1: 611 * EBX enumerates the size (in bytes) required by 612 * the XSAVES instruction for an XSAVE area 613 * containing all the state components 614 * corresponding to bits currently set in 615 * XCR0 | IA32_XSS. 616 */ 617 cpuid_count(XSTATE_CPUID, 1, &eax, &ebx, &ecx, &edx); 618 return ebx; 619 } 620 621 static unsigned int __init get_xsave_size(void) 622 { 623 unsigned int eax, ebx, ecx, edx; 624 /* 625 * - CPUID function 0DH, sub-function 0: 626 * EBX enumerates the size (in bytes) required by 627 * the XSAVE instruction for an XSAVE area 628 * containing all the *user* state components 629 * corresponding to bits currently set in XCR0. 630 */ 631 cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx); 632 return ebx; 633 } 634 635 /* 636 * Will the runtime-enumerated 'xstate_size' fit in the init 637 * task's statically-allocated buffer? 638 */ 639 static bool is_supported_xstate_size(unsigned int test_xstate_size) 640 { 641 if (test_xstate_size <= sizeof(union fpregs_state)) 642 return true; 643 644 pr_warn("x86/fpu: xstate buffer too small (%zu < %d), disabling xsave\n", 645 sizeof(union fpregs_state), test_xstate_size); 646 return false; 647 } 648 649 static int init_xstate_size(void) 650 { 651 /* Recompute the context size for enabled features: */ 652 unsigned int possible_xstate_size; 653 unsigned int xsave_size; 654 655 xsave_size = get_xsave_size(); 656 657 if (boot_cpu_has(X86_FEATURE_XSAVES)) 658 possible_xstate_size = get_xsaves_size(); 659 else 660 possible_xstate_size = xsave_size; 661 662 /* Ensure we have the space to store all enabled: */ 663 if (!is_supported_xstate_size(possible_xstate_size)) 664 return -EINVAL; 665 666 /* 667 * The size is OK, we are definitely going to use xsave, 668 * make it known to the world that we need more space. 669 */ 670 fpu_kernel_xstate_size = possible_xstate_size; 671 do_extra_xstate_size_checks(); 672 673 /* 674 * User space is always in standard format. 675 */ 676 fpu_user_xstate_size = xsave_size; 677 return 0; 678 } 679 680 /* 681 * We enabled the XSAVE hardware, but something went wrong and 682 * we can not use it. Disable it. 683 */ 684 static void fpu__init_disable_system_xstate(void) 685 { 686 xfeatures_mask = 0; 687 cr4_clear_bits(X86_CR4_OSXSAVE); 688 fpu__xstate_clear_all_cpu_caps(); 689 } 690 691 /* 692 * Enable and initialize the xsave feature. 693 * Called once per system bootup. 694 */ 695 void __init fpu__init_system_xstate(void) 696 { 697 unsigned int eax, ebx, ecx, edx; 698 static int on_boot_cpu __initdata = 1; 699 int err; 700 701 WARN_ON_FPU(!on_boot_cpu); 702 on_boot_cpu = 0; 703 704 if (!boot_cpu_has(X86_FEATURE_XSAVE)) { 705 pr_info("x86/fpu: Legacy x87 FPU detected.\n"); 706 return; 707 } 708 709 if (boot_cpu_data.cpuid_level < XSTATE_CPUID) { 710 WARN_ON_FPU(1); 711 return; 712 } 713 714 cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx); 715 xfeatures_mask = eax + ((u64)edx << 32); 716 717 if ((xfeatures_mask & XFEATURE_MASK_FPSSE) != XFEATURE_MASK_FPSSE) { 718 /* 719 * This indicates that something really unexpected happened 720 * with the enumeration. Disable XSAVE and try to continue 721 * booting without it. This is too early to BUG(). 722 */ 723 pr_err("x86/fpu: FP/SSE not present amongst the CPU's xstate features: 0x%llx.\n", xfeatures_mask); 724 goto out_disable; 725 } 726 727 xfeatures_mask &= fpu__get_supported_xfeatures_mask(); 728 729 /* Enable xstate instructions to be able to continue with initialization: */ 730 fpu__init_cpu_xstate(); 731 err = init_xstate_size(); 732 if (err) 733 goto out_disable; 734 735 /* 736 * Update info used for ptrace frames; use standard-format size and no 737 * supervisor xstates: 738 */ 739 update_regset_xstate_info(fpu_user_xstate_size, xfeatures_mask & ~XFEATURE_MASK_SUPERVISOR); 740 741 fpu__init_prepare_fx_sw_frame(); 742 setup_init_fpu_buf(); 743 setup_xstate_comp(); 744 print_xstate_offset_size(); 745 746 pr_info("x86/fpu: Enabled xstate features 0x%llx, context size is %d bytes, using '%s' format.\n", 747 xfeatures_mask, 748 fpu_kernel_xstate_size, 749 boot_cpu_has(X86_FEATURE_XSAVES) ? "compacted" : "standard"); 750 return; 751 752 out_disable: 753 /* something went wrong, try to boot without any XSAVE support */ 754 fpu__init_disable_system_xstate(); 755 } 756 757 /* 758 * Restore minimal FPU state after suspend: 759 */ 760 void fpu__resume_cpu(void) 761 { 762 /* 763 * Restore XCR0 on xsave capable CPUs: 764 */ 765 if (boot_cpu_has(X86_FEATURE_XSAVE)) 766 xsetbv(XCR_XFEATURE_ENABLED_MASK, xfeatures_mask); 767 } 768 769 /* 770 * Given an xstate feature mask, calculate where in the xsave 771 * buffer the state is. Callers should ensure that the buffer 772 * is valid. 773 * 774 * Note: does not work for compacted buffers. 775 */ 776 void *__raw_xsave_addr(struct xregs_state *xsave, int xstate_feature_mask) 777 { 778 int feature_nr = fls64(xstate_feature_mask) - 1; 779 780 if (!xfeature_enabled(feature_nr)) { 781 WARN_ON_FPU(1); 782 return NULL; 783 } 784 785 return (void *)xsave + xstate_comp_offsets[feature_nr]; 786 } 787 /* 788 * Given the xsave area and a state inside, this function returns the 789 * address of the state. 790 * 791 * This is the API that is called to get xstate address in either 792 * standard format or compacted format of xsave area. 793 * 794 * Note that if there is no data for the field in the xsave buffer 795 * this will return NULL. 796 * 797 * Inputs: 798 * xstate: the thread's storage area for all FPU data 799 * xstate_feature: state which is defined in xsave.h (e.g. 800 * XFEATURE_MASK_FP, XFEATURE_MASK_SSE, etc...) 801 * Output: 802 * address of the state in the xsave area, or NULL if the 803 * field is not present in the xsave buffer. 804 */ 805 void *get_xsave_addr(struct xregs_state *xsave, int xstate_feature) 806 { 807 /* 808 * Do we even *have* xsave state? 809 */ 810 if (!boot_cpu_has(X86_FEATURE_XSAVE)) 811 return NULL; 812 813 /* 814 * We should not ever be requesting features that we 815 * have not enabled. Remember that pcntxt_mask is 816 * what we write to the XCR0 register. 817 */ 818 WARN_ONCE(!(xfeatures_mask & xstate_feature), 819 "get of unsupported state"); 820 /* 821 * This assumes the last 'xsave*' instruction to 822 * have requested that 'xstate_feature' be saved. 823 * If it did not, we might be seeing and old value 824 * of the field in the buffer. 825 * 826 * This can happen because the last 'xsave' did not 827 * request that this feature be saved (unlikely) 828 * or because the "init optimization" caused it 829 * to not be saved. 830 */ 831 if (!(xsave->header.xfeatures & xstate_feature)) 832 return NULL; 833 834 return __raw_xsave_addr(xsave, xstate_feature); 835 } 836 EXPORT_SYMBOL_GPL(get_xsave_addr); 837 838 /* 839 * This wraps up the common operations that need to occur when retrieving 840 * data from xsave state. It first ensures that the current task was 841 * using the FPU and retrieves the data in to a buffer. It then calculates 842 * the offset of the requested field in the buffer. 843 * 844 * This function is safe to call whether the FPU is in use or not. 845 * 846 * Note that this only works on the current task. 847 * 848 * Inputs: 849 * @xsave_state: state which is defined in xsave.h (e.g. XFEATURE_MASK_FP, 850 * XFEATURE_MASK_SSE, etc...) 851 * Output: 852 * address of the state in the xsave area or NULL if the state 853 * is not present or is in its 'init state'. 854 */ 855 const void *get_xsave_field_ptr(int xsave_state) 856 { 857 struct fpu *fpu = ¤t->thread.fpu; 858 859 if (!fpu->fpstate_active) 860 return NULL; 861 /* 862 * fpu__save() takes the CPU's xstate registers 863 * and saves them off to the 'fpu memory buffer. 864 */ 865 fpu__save(fpu); 866 867 return get_xsave_addr(&fpu->state.xsave, xsave_state); 868 } 869 870 #ifdef CONFIG_ARCH_HAS_PKEYS 871 872 #define NR_VALID_PKRU_BITS (CONFIG_NR_PROTECTION_KEYS * 2) 873 #define PKRU_VALID_MASK (NR_VALID_PKRU_BITS - 1) 874 /* 875 * This will go out and modify PKRU register to set the access 876 * rights for @pkey to @init_val. 877 */ 878 int arch_set_user_pkey_access(struct task_struct *tsk, int pkey, 879 unsigned long init_val) 880 { 881 u32 old_pkru; 882 int pkey_shift = (pkey * PKRU_BITS_PER_PKEY); 883 u32 new_pkru_bits = 0; 884 885 /* 886 * This check implies XSAVE support. OSPKE only gets 887 * set if we enable XSAVE and we enable PKU in XCR0. 888 */ 889 if (!boot_cpu_has(X86_FEATURE_OSPKE)) 890 return -EINVAL; 891 /* 892 * For most XSAVE components, this would be an arduous task: 893 * brining fpstate up to date with fpregs, updating fpstate, 894 * then re-populating fpregs. But, for components that are 895 * never lazily managed, we can just access the fpregs 896 * directly. PKRU is never managed lazily, so we can just 897 * manipulate it directly. Make sure it stays that way. 898 */ 899 WARN_ON_ONCE(!use_eager_fpu()); 900 901 /* Set the bits we need in PKRU: */ 902 if (init_val & PKEY_DISABLE_ACCESS) 903 new_pkru_bits |= PKRU_AD_BIT; 904 if (init_val & PKEY_DISABLE_WRITE) 905 new_pkru_bits |= PKRU_WD_BIT; 906 907 /* Shift the bits in to the correct place in PKRU for pkey: */ 908 new_pkru_bits <<= pkey_shift; 909 910 /* Get old PKRU and mask off any old bits in place: */ 911 old_pkru = read_pkru(); 912 old_pkru &= ~((PKRU_AD_BIT|PKRU_WD_BIT) << pkey_shift); 913 914 /* Write old part along with new part: */ 915 write_pkru(old_pkru | new_pkru_bits); 916 917 return 0; 918 } 919 #endif /* ! CONFIG_ARCH_HAS_PKEYS */ 920 921 /* 922 * This is similar to user_regset_copyout(), but will not add offset to 923 * the source data pointer or increment pos, count, kbuf, and ubuf. 924 */ 925 static inline int xstate_copyout(unsigned int pos, unsigned int count, 926 void *kbuf, void __user *ubuf, 927 const void *data, const int start_pos, 928 const int end_pos) 929 { 930 if ((count == 0) || (pos < start_pos)) 931 return 0; 932 933 if (end_pos < 0 || pos < end_pos) { 934 unsigned int copy = (end_pos < 0 ? count : min(count, end_pos - pos)); 935 936 if (kbuf) { 937 memcpy(kbuf + pos, data, copy); 938 } else { 939 if (__copy_to_user(ubuf + pos, data, copy)) 940 return -EFAULT; 941 } 942 } 943 return 0; 944 } 945 946 /* 947 * Convert from kernel XSAVES compacted format to standard format and copy 948 * to a ptrace buffer. It supports partial copy but pos always starts from 949 * zero. This is called from xstateregs_get() and there we check the CPU 950 * has XSAVES. 951 */ 952 int copyout_from_xsaves(unsigned int pos, unsigned int count, void *kbuf, 953 void __user *ubuf, struct xregs_state *xsave) 954 { 955 unsigned int offset, size; 956 int ret, i; 957 struct xstate_header header; 958 959 /* 960 * Currently copy_regset_to_user() starts from pos 0: 961 */ 962 if (unlikely(pos != 0)) 963 return -EFAULT; 964 965 /* 966 * The destination is a ptrace buffer; we put in only user xstates: 967 */ 968 memset(&header, 0, sizeof(header)); 969 header.xfeatures = xsave->header.xfeatures; 970 header.xfeatures &= ~XFEATURE_MASK_SUPERVISOR; 971 972 /* 973 * Copy xregs_state->header: 974 */ 975 offset = offsetof(struct xregs_state, header); 976 size = sizeof(header); 977 978 ret = xstate_copyout(offset, size, kbuf, ubuf, &header, 0, count); 979 980 if (ret) 981 return ret; 982 983 for (i = 0; i < XFEATURE_MAX; i++) { 984 /* 985 * Copy only in-use xstates: 986 */ 987 if ((header.xfeatures >> i) & 1) { 988 void *src = __raw_xsave_addr(xsave, 1 << i); 989 990 offset = xstate_offsets[i]; 991 size = xstate_sizes[i]; 992 993 ret = xstate_copyout(offset, size, kbuf, ubuf, src, 0, count); 994 995 if (ret) 996 return ret; 997 998 if (offset + size >= count) 999 break; 1000 } 1001 1002 } 1003 1004 /* 1005 * Fill xsave->i387.sw_reserved value for ptrace frame: 1006 */ 1007 offset = offsetof(struct fxregs_state, sw_reserved); 1008 size = sizeof(xstate_fx_sw_bytes); 1009 1010 ret = xstate_copyout(offset, size, kbuf, ubuf, xstate_fx_sw_bytes, 0, count); 1011 1012 if (ret) 1013 return ret; 1014 1015 return 0; 1016 } 1017 1018 /* 1019 * Convert from a ptrace standard-format buffer to kernel XSAVES format 1020 * and copy to the target thread. This is called from xstateregs_set() and 1021 * there we check the CPU has XSAVES and a whole standard-sized buffer 1022 * exists. 1023 */ 1024 int copyin_to_xsaves(const void *kbuf, const void __user *ubuf, 1025 struct xregs_state *xsave) 1026 { 1027 unsigned int offset, size; 1028 int i; 1029 u64 xfeatures; 1030 u64 allowed_features; 1031 1032 offset = offsetof(struct xregs_state, header); 1033 size = sizeof(xfeatures); 1034 1035 if (kbuf) { 1036 memcpy(&xfeatures, kbuf + offset, size); 1037 } else { 1038 if (__copy_from_user(&xfeatures, ubuf + offset, size)) 1039 return -EFAULT; 1040 } 1041 1042 /* 1043 * Reject if the user sets any disabled or supervisor features: 1044 */ 1045 allowed_features = xfeatures_mask & ~XFEATURE_MASK_SUPERVISOR; 1046 1047 if (xfeatures & ~allowed_features) 1048 return -EINVAL; 1049 1050 for (i = 0; i < XFEATURE_MAX; i++) { 1051 u64 mask = ((u64)1 << i); 1052 1053 if (xfeatures & mask) { 1054 void *dst = __raw_xsave_addr(xsave, 1 << i); 1055 1056 offset = xstate_offsets[i]; 1057 size = xstate_sizes[i]; 1058 1059 if (kbuf) { 1060 memcpy(dst, kbuf + offset, size); 1061 } else { 1062 if (__copy_from_user(dst, ubuf + offset, size)) 1063 return -EFAULT; 1064 } 1065 } 1066 } 1067 1068 /* 1069 * The state that came in from userspace was user-state only. 1070 * Mask all the user states out of 'xfeatures': 1071 */ 1072 xsave->header.xfeatures &= XFEATURE_MASK_SUPERVISOR; 1073 1074 /* 1075 * Add back in the features that came in from userspace: 1076 */ 1077 xsave->header.xfeatures |= xfeatures; 1078 1079 return 0; 1080 } 1081