1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * xsave/xrstor support. 4 * 5 * Author: Suresh Siddha <suresh.b.siddha@intel.com> 6 */ 7 #include <linux/compat.h> 8 #include <linux/cpu.h> 9 #include <linux/mman.h> 10 #include <linux/pkeys.h> 11 #include <linux/seq_file.h> 12 #include <linux/proc_fs.h> 13 14 #include <asm/fpu/api.h> 15 #include <asm/fpu/internal.h> 16 #include <asm/fpu/signal.h> 17 #include <asm/fpu/regset.h> 18 #include <asm/fpu/xstate.h> 19 20 #include <asm/tlbflush.h> 21 #include <asm/cpufeature.h> 22 23 /* 24 * Although we spell it out in here, the Processor Trace 25 * xfeature is completely unused. We use other mechanisms 26 * to save/restore PT state in Linux. 27 */ 28 static const char *xfeature_names[] = 29 { 30 "x87 floating point registers" , 31 "SSE registers" , 32 "AVX registers" , 33 "MPX bounds registers" , 34 "MPX CSR" , 35 "AVX-512 opmask" , 36 "AVX-512 Hi256" , 37 "AVX-512 ZMM_Hi256" , 38 "Processor Trace (unused)" , 39 "Protection Keys User registers", 40 "unknown xstate feature" , 41 }; 42 43 static short xsave_cpuid_features[] __initdata = { 44 X86_FEATURE_FPU, 45 X86_FEATURE_XMM, 46 X86_FEATURE_AVX, 47 X86_FEATURE_MPX, 48 X86_FEATURE_MPX, 49 X86_FEATURE_AVX512F, 50 X86_FEATURE_AVX512F, 51 X86_FEATURE_AVX512F, 52 X86_FEATURE_INTEL_PT, 53 X86_FEATURE_PKU, 54 }; 55 56 /* 57 * This represents the full set of bits that should ever be set in a kernel 58 * XSAVE buffer, both supervisor and user xstates. 59 */ 60 u64 xfeatures_mask_all __read_mostly; 61 62 static unsigned int xstate_offsets[XFEATURE_MAX] = { [ 0 ... XFEATURE_MAX - 1] = -1}; 63 static unsigned int xstate_sizes[XFEATURE_MAX] = { [ 0 ... XFEATURE_MAX - 1] = -1}; 64 static unsigned int xstate_comp_offsets[XFEATURE_MAX] = { [ 0 ... XFEATURE_MAX - 1] = -1}; 65 static unsigned int xstate_supervisor_only_offsets[XFEATURE_MAX] = { [ 0 ... XFEATURE_MAX - 1] = -1}; 66 67 /* 68 * The XSAVE area of kernel can be in standard or compacted format; 69 * it is always in standard format for user mode. This is the user 70 * mode standard format size used for signal and ptrace frames. 71 */ 72 unsigned int fpu_user_xstate_size; 73 74 /* 75 * Return whether the system supports a given xfeature. 76 * 77 * Also return the name of the (most advanced) feature that the caller requested: 78 */ 79 int cpu_has_xfeatures(u64 xfeatures_needed, const char **feature_name) 80 { 81 u64 xfeatures_missing = xfeatures_needed & ~xfeatures_mask_all; 82 83 if (unlikely(feature_name)) { 84 long xfeature_idx, max_idx; 85 u64 xfeatures_print; 86 /* 87 * So we use FLS here to be able to print the most advanced 88 * feature that was requested but is missing. So if a driver 89 * asks about "XFEATURE_MASK_SSE | XFEATURE_MASK_YMM" we'll print the 90 * missing AVX feature - this is the most informative message 91 * to users: 92 */ 93 if (xfeatures_missing) 94 xfeatures_print = xfeatures_missing; 95 else 96 xfeatures_print = xfeatures_needed; 97 98 xfeature_idx = fls64(xfeatures_print)-1; 99 max_idx = ARRAY_SIZE(xfeature_names)-1; 100 xfeature_idx = min(xfeature_idx, max_idx); 101 102 *feature_name = xfeature_names[xfeature_idx]; 103 } 104 105 if (xfeatures_missing) 106 return 0; 107 108 return 1; 109 } 110 EXPORT_SYMBOL_GPL(cpu_has_xfeatures); 111 112 static bool xfeature_is_supervisor(int xfeature_nr) 113 { 114 /* 115 * Extended State Enumeration Sub-leaves (EAX = 0DH, ECX = n, n > 1) 116 * returns ECX[0] set to (1) for a supervisor state, and cleared (0) 117 * for a user state. 118 */ 119 u32 eax, ebx, ecx, edx; 120 121 cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx); 122 return ecx & 1; 123 } 124 125 /* 126 * When executing XSAVEOPT (or other optimized XSAVE instructions), if 127 * a processor implementation detects that an FPU state component is still 128 * (or is again) in its initialized state, it may clear the corresponding 129 * bit in the header.xfeatures field, and can skip the writeout of registers 130 * to the corresponding memory layout. 131 * 132 * This means that when the bit is zero, the state component might still contain 133 * some previous - non-initialized register state. 134 * 135 * Before writing xstate information to user-space we sanitize those components, 136 * to always ensure that the memory layout of a feature will be in the init state 137 * if the corresponding header bit is zero. This is to ensure that user-space doesn't 138 * see some stale state in the memory layout during signal handling, debugging etc. 139 */ 140 void fpstate_sanitize_xstate(struct fpu *fpu) 141 { 142 struct fxregs_state *fx = &fpu->state.fxsave; 143 int feature_bit; 144 u64 xfeatures; 145 146 if (!use_xsaveopt()) 147 return; 148 149 xfeatures = fpu->state.xsave.header.xfeatures; 150 151 /* 152 * None of the feature bits are in init state. So nothing else 153 * to do for us, as the memory layout is up to date. 154 */ 155 if ((xfeatures & xfeatures_mask_all) == xfeatures_mask_all) 156 return; 157 158 /* 159 * FP is in init state 160 */ 161 if (!(xfeatures & XFEATURE_MASK_FP)) { 162 fx->cwd = 0x37f; 163 fx->swd = 0; 164 fx->twd = 0; 165 fx->fop = 0; 166 fx->rip = 0; 167 fx->rdp = 0; 168 memset(&fx->st_space[0], 0, 128); 169 } 170 171 /* 172 * SSE is in init state 173 */ 174 if (!(xfeatures & XFEATURE_MASK_SSE)) 175 memset(&fx->xmm_space[0], 0, 256); 176 177 /* 178 * First two features are FPU and SSE, which above we handled 179 * in a special way already: 180 */ 181 feature_bit = 0x2; 182 xfeatures = (xfeatures_mask_user() & ~xfeatures) >> 2; 183 184 /* 185 * Update all the remaining memory layouts according to their 186 * standard xstate layout, if their header bit is in the init 187 * state: 188 */ 189 while (xfeatures) { 190 if (xfeatures & 0x1) { 191 int offset = xstate_comp_offsets[feature_bit]; 192 int size = xstate_sizes[feature_bit]; 193 194 memcpy((void *)fx + offset, 195 (void *)&init_fpstate.xsave + offset, 196 size); 197 } 198 199 xfeatures >>= 1; 200 feature_bit++; 201 } 202 } 203 204 /* 205 * Enable the extended processor state save/restore feature. 206 * Called once per CPU onlining. 207 */ 208 void fpu__init_cpu_xstate(void) 209 { 210 u64 unsup_bits; 211 212 if (!boot_cpu_has(X86_FEATURE_XSAVE) || !xfeatures_mask_all) 213 return; 214 /* 215 * Unsupported supervisor xstates should not be found in 216 * the xfeatures mask. 217 */ 218 unsup_bits = xfeatures_mask_all & XFEATURE_MASK_SUPERVISOR_UNSUPPORTED; 219 WARN_ONCE(unsup_bits, "x86/fpu: Found unsupported supervisor xstates: 0x%llx\n", 220 unsup_bits); 221 222 xfeatures_mask_all &= ~XFEATURE_MASK_SUPERVISOR_UNSUPPORTED; 223 224 cr4_set_bits(X86_CR4_OSXSAVE); 225 226 /* 227 * XCR_XFEATURE_ENABLED_MASK (aka. XCR0) sets user features 228 * managed by XSAVE{C, OPT, S} and XRSTOR{S}. Only XSAVE user 229 * states can be set here. 230 */ 231 xsetbv(XCR_XFEATURE_ENABLED_MASK, xfeatures_mask_user()); 232 233 /* 234 * MSR_IA32_XSS sets supervisor states managed by XSAVES. 235 */ 236 if (boot_cpu_has(X86_FEATURE_XSAVES)) { 237 wrmsrl(MSR_IA32_XSS, xfeatures_mask_supervisor() | 238 xfeatures_mask_dynamic()); 239 } 240 } 241 242 static bool xfeature_enabled(enum xfeature xfeature) 243 { 244 return xfeatures_mask_all & BIT_ULL(xfeature); 245 } 246 247 /* 248 * Record the offsets and sizes of various xstates contained 249 * in the XSAVE state memory layout. 250 */ 251 static void __init setup_xstate_features(void) 252 { 253 u32 eax, ebx, ecx, edx, i; 254 /* start at the beginnning of the "extended state" */ 255 unsigned int last_good_offset = offsetof(struct xregs_state, 256 extended_state_area); 257 /* 258 * The FP xstates and SSE xstates are legacy states. They are always 259 * in the fixed offsets in the xsave area in either compacted form 260 * or standard form. 261 */ 262 xstate_offsets[XFEATURE_FP] = 0; 263 xstate_sizes[XFEATURE_FP] = offsetof(struct fxregs_state, 264 xmm_space); 265 266 xstate_offsets[XFEATURE_SSE] = xstate_sizes[XFEATURE_FP]; 267 xstate_sizes[XFEATURE_SSE] = sizeof_field(struct fxregs_state, 268 xmm_space); 269 270 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) { 271 if (!xfeature_enabled(i)) 272 continue; 273 274 cpuid_count(XSTATE_CPUID, i, &eax, &ebx, &ecx, &edx); 275 276 xstate_sizes[i] = eax; 277 278 /* 279 * If an xfeature is supervisor state, the offset in EBX is 280 * invalid, leave it to -1. 281 */ 282 if (xfeature_is_supervisor(i)) 283 continue; 284 285 xstate_offsets[i] = ebx; 286 287 /* 288 * In our xstate size checks, we assume that the highest-numbered 289 * xstate feature has the highest offset in the buffer. Ensure 290 * it does. 291 */ 292 WARN_ONCE(last_good_offset > xstate_offsets[i], 293 "x86/fpu: misordered xstate at %d\n", last_good_offset); 294 295 last_good_offset = xstate_offsets[i]; 296 } 297 } 298 299 static void __init print_xstate_feature(u64 xstate_mask) 300 { 301 const char *feature_name; 302 303 if (cpu_has_xfeatures(xstate_mask, &feature_name)) 304 pr_info("x86/fpu: Supporting XSAVE feature 0x%03Lx: '%s'\n", xstate_mask, feature_name); 305 } 306 307 /* 308 * Print out all the supported xstate features: 309 */ 310 static void __init print_xstate_features(void) 311 { 312 print_xstate_feature(XFEATURE_MASK_FP); 313 print_xstate_feature(XFEATURE_MASK_SSE); 314 print_xstate_feature(XFEATURE_MASK_YMM); 315 print_xstate_feature(XFEATURE_MASK_BNDREGS); 316 print_xstate_feature(XFEATURE_MASK_BNDCSR); 317 print_xstate_feature(XFEATURE_MASK_OPMASK); 318 print_xstate_feature(XFEATURE_MASK_ZMM_Hi256); 319 print_xstate_feature(XFEATURE_MASK_Hi16_ZMM); 320 print_xstate_feature(XFEATURE_MASK_PKRU); 321 } 322 323 /* 324 * This check is important because it is easy to get XSTATE_* 325 * confused with XSTATE_BIT_*. 326 */ 327 #define CHECK_XFEATURE(nr) do { \ 328 WARN_ON(nr < FIRST_EXTENDED_XFEATURE); \ 329 WARN_ON(nr >= XFEATURE_MAX); \ 330 } while (0) 331 332 /* 333 * We could cache this like xstate_size[], but we only use 334 * it here, so it would be a waste of space. 335 */ 336 static int xfeature_is_aligned(int xfeature_nr) 337 { 338 u32 eax, ebx, ecx, edx; 339 340 CHECK_XFEATURE(xfeature_nr); 341 342 if (!xfeature_enabled(xfeature_nr)) { 343 WARN_ONCE(1, "Checking alignment of disabled xfeature %d\n", 344 xfeature_nr); 345 return 0; 346 } 347 348 cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx); 349 /* 350 * The value returned by ECX[1] indicates the alignment 351 * of state component 'i' when the compacted format 352 * of the extended region of an XSAVE area is used: 353 */ 354 return !!(ecx & 2); 355 } 356 357 /* 358 * This function sets up offsets and sizes of all extended states in 359 * xsave area. This supports both standard format and compacted format 360 * of the xsave area. 361 */ 362 static void __init setup_xstate_comp_offsets(void) 363 { 364 unsigned int next_offset; 365 int i; 366 367 /* 368 * The FP xstates and SSE xstates are legacy states. They are always 369 * in the fixed offsets in the xsave area in either compacted form 370 * or standard form. 371 */ 372 xstate_comp_offsets[XFEATURE_FP] = 0; 373 xstate_comp_offsets[XFEATURE_SSE] = offsetof(struct fxregs_state, 374 xmm_space); 375 376 if (!boot_cpu_has(X86_FEATURE_XSAVES)) { 377 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) { 378 if (xfeature_enabled(i)) 379 xstate_comp_offsets[i] = xstate_offsets[i]; 380 } 381 return; 382 } 383 384 next_offset = FXSAVE_SIZE + XSAVE_HDR_SIZE; 385 386 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) { 387 if (!xfeature_enabled(i)) 388 continue; 389 390 if (xfeature_is_aligned(i)) 391 next_offset = ALIGN(next_offset, 64); 392 393 xstate_comp_offsets[i] = next_offset; 394 next_offset += xstate_sizes[i]; 395 } 396 } 397 398 /* 399 * Setup offsets of a supervisor-state-only XSAVES buffer: 400 * 401 * The offsets stored in xstate_comp_offsets[] only work for one specific 402 * value of the Requested Feature BitMap (RFBM). In cases where a different 403 * RFBM value is used, a different set of offsets is required. This set of 404 * offsets is for when RFBM=xfeatures_mask_supervisor(). 405 */ 406 static void __init setup_supervisor_only_offsets(void) 407 { 408 unsigned int next_offset; 409 int i; 410 411 next_offset = FXSAVE_SIZE + XSAVE_HDR_SIZE; 412 413 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) { 414 if (!xfeature_enabled(i) || !xfeature_is_supervisor(i)) 415 continue; 416 417 if (xfeature_is_aligned(i)) 418 next_offset = ALIGN(next_offset, 64); 419 420 xstate_supervisor_only_offsets[i] = next_offset; 421 next_offset += xstate_sizes[i]; 422 } 423 } 424 425 /* 426 * Print out xstate component offsets and sizes 427 */ 428 static void __init print_xstate_offset_size(void) 429 { 430 int i; 431 432 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) { 433 if (!xfeature_enabled(i)) 434 continue; 435 pr_info("x86/fpu: xstate_offset[%d]: %4d, xstate_sizes[%d]: %4d\n", 436 i, xstate_comp_offsets[i], i, xstate_sizes[i]); 437 } 438 } 439 440 /* 441 * setup the xstate image representing the init state 442 */ 443 static void __init setup_init_fpu_buf(void) 444 { 445 static int on_boot_cpu __initdata = 1; 446 447 WARN_ON_FPU(!on_boot_cpu); 448 on_boot_cpu = 0; 449 450 if (!boot_cpu_has(X86_FEATURE_XSAVE)) 451 return; 452 453 setup_xstate_features(); 454 print_xstate_features(); 455 456 if (boot_cpu_has(X86_FEATURE_XSAVES)) 457 init_fpstate.xsave.header.xcomp_bv = XCOMP_BV_COMPACTED_FORMAT | 458 xfeatures_mask_all; 459 460 /* 461 * Init all the features state with header.xfeatures being 0x0 462 */ 463 copy_kernel_to_xregs_booting(&init_fpstate.xsave); 464 465 /* 466 * Dump the init state again. This is to identify the init state 467 * of any feature which is not represented by all zero's. 468 */ 469 copy_xregs_to_kernel_booting(&init_fpstate.xsave); 470 } 471 472 static int xfeature_uncompacted_offset(int xfeature_nr) 473 { 474 u32 eax, ebx, ecx, edx; 475 476 /* 477 * Only XSAVES supports supervisor states and it uses compacted 478 * format. Checking a supervisor state's uncompacted offset is 479 * an error. 480 */ 481 if (XFEATURE_MASK_SUPERVISOR_ALL & BIT_ULL(xfeature_nr)) { 482 WARN_ONCE(1, "No fixed offset for xstate %d\n", xfeature_nr); 483 return -1; 484 } 485 486 CHECK_XFEATURE(xfeature_nr); 487 cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx); 488 return ebx; 489 } 490 491 int xfeature_size(int xfeature_nr) 492 { 493 u32 eax, ebx, ecx, edx; 494 495 CHECK_XFEATURE(xfeature_nr); 496 cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx); 497 return eax; 498 } 499 500 /* 501 * 'XSAVES' implies two different things: 502 * 1. saving of supervisor/system state 503 * 2. using the compacted format 504 * 505 * Use this function when dealing with the compacted format so 506 * that it is obvious which aspect of 'XSAVES' is being handled 507 * by the calling code. 508 */ 509 int using_compacted_format(void) 510 { 511 return boot_cpu_has(X86_FEATURE_XSAVES); 512 } 513 514 /* Validate an xstate header supplied by userspace (ptrace or sigreturn) */ 515 int validate_user_xstate_header(const struct xstate_header *hdr) 516 { 517 /* No unknown or supervisor features may be set */ 518 if (hdr->xfeatures & ~xfeatures_mask_user()) 519 return -EINVAL; 520 521 /* Userspace must use the uncompacted format */ 522 if (hdr->xcomp_bv) 523 return -EINVAL; 524 525 /* 526 * If 'reserved' is shrunken to add a new field, make sure to validate 527 * that new field here! 528 */ 529 BUILD_BUG_ON(sizeof(hdr->reserved) != 48); 530 531 /* No reserved bits may be set */ 532 if (memchr_inv(hdr->reserved, 0, sizeof(hdr->reserved))) 533 return -EINVAL; 534 535 return 0; 536 } 537 538 static void __xstate_dump_leaves(void) 539 { 540 int i; 541 u32 eax, ebx, ecx, edx; 542 static int should_dump = 1; 543 544 if (!should_dump) 545 return; 546 should_dump = 0; 547 /* 548 * Dump out a few leaves past the ones that we support 549 * just in case there are some goodies up there 550 */ 551 for (i = 0; i < XFEATURE_MAX + 10; i++) { 552 cpuid_count(XSTATE_CPUID, i, &eax, &ebx, &ecx, &edx); 553 pr_warn("CPUID[%02x, %02x]: eax=%08x ebx=%08x ecx=%08x edx=%08x\n", 554 XSTATE_CPUID, i, eax, ebx, ecx, edx); 555 } 556 } 557 558 #define XSTATE_WARN_ON(x) do { \ 559 if (WARN_ONCE(x, "XSAVE consistency problem, dumping leaves")) { \ 560 __xstate_dump_leaves(); \ 561 } \ 562 } while (0) 563 564 #define XCHECK_SZ(sz, nr, nr_macro, __struct) do { \ 565 if ((nr == nr_macro) && \ 566 WARN_ONCE(sz != sizeof(__struct), \ 567 "%s: struct is %zu bytes, cpu state %d bytes\n", \ 568 __stringify(nr_macro), sizeof(__struct), sz)) { \ 569 __xstate_dump_leaves(); \ 570 } \ 571 } while (0) 572 573 /* 574 * We have a C struct for each 'xstate'. We need to ensure 575 * that our software representation matches what the CPU 576 * tells us about the state's size. 577 */ 578 static void check_xstate_against_struct(int nr) 579 { 580 /* 581 * Ask the CPU for the size of the state. 582 */ 583 int sz = xfeature_size(nr); 584 /* 585 * Match each CPU state with the corresponding software 586 * structure. 587 */ 588 XCHECK_SZ(sz, nr, XFEATURE_YMM, struct ymmh_struct); 589 XCHECK_SZ(sz, nr, XFEATURE_BNDREGS, struct mpx_bndreg_state); 590 XCHECK_SZ(sz, nr, XFEATURE_BNDCSR, struct mpx_bndcsr_state); 591 XCHECK_SZ(sz, nr, XFEATURE_OPMASK, struct avx_512_opmask_state); 592 XCHECK_SZ(sz, nr, XFEATURE_ZMM_Hi256, struct avx_512_zmm_uppers_state); 593 XCHECK_SZ(sz, nr, XFEATURE_Hi16_ZMM, struct avx_512_hi16_state); 594 XCHECK_SZ(sz, nr, XFEATURE_PKRU, struct pkru_state); 595 596 /* 597 * Make *SURE* to add any feature numbers in below if 598 * there are "holes" in the xsave state component 599 * numbers. 600 */ 601 if ((nr < XFEATURE_YMM) || 602 (nr >= XFEATURE_MAX) || 603 (nr == XFEATURE_PT_UNIMPLEMENTED_SO_FAR) || 604 ((nr >= XFEATURE_RSRVD_COMP_10) && (nr <= XFEATURE_LBR))) { 605 WARN_ONCE(1, "no structure for xstate: %d\n", nr); 606 XSTATE_WARN_ON(1); 607 } 608 } 609 610 /* 611 * This essentially double-checks what the cpu told us about 612 * how large the XSAVE buffer needs to be. We are recalculating 613 * it to be safe. 614 * 615 * Dynamic XSAVE features allocate their own buffers and are not 616 * covered by these checks. Only the size of the buffer for task->fpu 617 * is checked here. 618 */ 619 static void do_extra_xstate_size_checks(void) 620 { 621 int paranoid_xstate_size = FXSAVE_SIZE + XSAVE_HDR_SIZE; 622 int i; 623 624 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) { 625 if (!xfeature_enabled(i)) 626 continue; 627 628 check_xstate_against_struct(i); 629 /* 630 * Supervisor state components can be managed only by 631 * XSAVES, which is compacted-format only. 632 */ 633 if (!using_compacted_format()) 634 XSTATE_WARN_ON(xfeature_is_supervisor(i)); 635 636 /* Align from the end of the previous feature */ 637 if (xfeature_is_aligned(i)) 638 paranoid_xstate_size = ALIGN(paranoid_xstate_size, 64); 639 /* 640 * The offset of a given state in the non-compacted 641 * format is given to us in a CPUID leaf. We check 642 * them for being ordered (increasing offsets) in 643 * setup_xstate_features(). 644 */ 645 if (!using_compacted_format()) 646 paranoid_xstate_size = xfeature_uncompacted_offset(i); 647 /* 648 * The compacted-format offset always depends on where 649 * the previous state ended. 650 */ 651 paranoid_xstate_size += xfeature_size(i); 652 } 653 XSTATE_WARN_ON(paranoid_xstate_size != fpu_kernel_xstate_size); 654 } 655 656 657 /* 658 * Get total size of enabled xstates in XCR0 | IA32_XSS. 659 * 660 * Note the SDM's wording here. "sub-function 0" only enumerates 661 * the size of the *user* states. If we use it to size a buffer 662 * that we use 'XSAVES' on, we could potentially overflow the 663 * buffer because 'XSAVES' saves system states too. 664 */ 665 static unsigned int __init get_xsaves_size(void) 666 { 667 unsigned int eax, ebx, ecx, edx; 668 /* 669 * - CPUID function 0DH, sub-function 1: 670 * EBX enumerates the size (in bytes) required by 671 * the XSAVES instruction for an XSAVE area 672 * containing all the state components 673 * corresponding to bits currently set in 674 * XCR0 | IA32_XSS. 675 */ 676 cpuid_count(XSTATE_CPUID, 1, &eax, &ebx, &ecx, &edx); 677 return ebx; 678 } 679 680 /* 681 * Get the total size of the enabled xstates without the dynamic supervisor 682 * features. 683 */ 684 static unsigned int __init get_xsaves_size_no_dynamic(void) 685 { 686 u64 mask = xfeatures_mask_dynamic(); 687 unsigned int size; 688 689 if (!mask) 690 return get_xsaves_size(); 691 692 /* Disable dynamic features. */ 693 wrmsrl(MSR_IA32_XSS, xfeatures_mask_supervisor()); 694 695 /* 696 * Ask the hardware what size is required of the buffer. 697 * This is the size required for the task->fpu buffer. 698 */ 699 size = get_xsaves_size(); 700 701 /* Re-enable dynamic features so XSAVES will work on them again. */ 702 wrmsrl(MSR_IA32_XSS, xfeatures_mask_supervisor() | mask); 703 704 return size; 705 } 706 707 static unsigned int __init get_xsave_size(void) 708 { 709 unsigned int eax, ebx, ecx, edx; 710 /* 711 * - CPUID function 0DH, sub-function 0: 712 * EBX enumerates the size (in bytes) required by 713 * the XSAVE instruction for an XSAVE area 714 * containing all the *user* state components 715 * corresponding to bits currently set in XCR0. 716 */ 717 cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx); 718 return ebx; 719 } 720 721 /* 722 * Will the runtime-enumerated 'xstate_size' fit in the init 723 * task's statically-allocated buffer? 724 */ 725 static bool is_supported_xstate_size(unsigned int test_xstate_size) 726 { 727 if (test_xstate_size <= sizeof(union fpregs_state)) 728 return true; 729 730 pr_warn("x86/fpu: xstate buffer too small (%zu < %d), disabling xsave\n", 731 sizeof(union fpregs_state), test_xstate_size); 732 return false; 733 } 734 735 static int __init init_xstate_size(void) 736 { 737 /* Recompute the context size for enabled features: */ 738 unsigned int possible_xstate_size; 739 unsigned int xsave_size; 740 741 xsave_size = get_xsave_size(); 742 743 if (boot_cpu_has(X86_FEATURE_XSAVES)) 744 possible_xstate_size = get_xsaves_size_no_dynamic(); 745 else 746 possible_xstate_size = xsave_size; 747 748 /* Ensure we have the space to store all enabled: */ 749 if (!is_supported_xstate_size(possible_xstate_size)) 750 return -EINVAL; 751 752 /* 753 * The size is OK, we are definitely going to use xsave, 754 * make it known to the world that we need more space. 755 */ 756 fpu_kernel_xstate_size = possible_xstate_size; 757 do_extra_xstate_size_checks(); 758 759 /* 760 * User space is always in standard format. 761 */ 762 fpu_user_xstate_size = xsave_size; 763 return 0; 764 } 765 766 /* 767 * We enabled the XSAVE hardware, but something went wrong and 768 * we can not use it. Disable it. 769 */ 770 static void fpu__init_disable_system_xstate(void) 771 { 772 xfeatures_mask_all = 0; 773 cr4_clear_bits(X86_CR4_OSXSAVE); 774 setup_clear_cpu_cap(X86_FEATURE_XSAVE); 775 } 776 777 /* 778 * Enable and initialize the xsave feature. 779 * Called once per system bootup. 780 */ 781 void __init fpu__init_system_xstate(void) 782 { 783 unsigned int eax, ebx, ecx, edx; 784 static int on_boot_cpu __initdata = 1; 785 int err; 786 int i; 787 788 WARN_ON_FPU(!on_boot_cpu); 789 on_boot_cpu = 0; 790 791 if (!boot_cpu_has(X86_FEATURE_FPU)) { 792 pr_info("x86/fpu: No FPU detected\n"); 793 return; 794 } 795 796 if (!boot_cpu_has(X86_FEATURE_XSAVE)) { 797 pr_info("x86/fpu: x87 FPU will use %s\n", 798 boot_cpu_has(X86_FEATURE_FXSR) ? "FXSAVE" : "FSAVE"); 799 return; 800 } 801 802 if (boot_cpu_data.cpuid_level < XSTATE_CPUID) { 803 WARN_ON_FPU(1); 804 return; 805 } 806 807 /* 808 * Find user xstates supported by the processor. 809 */ 810 cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx); 811 xfeatures_mask_all = eax + ((u64)edx << 32); 812 813 /* 814 * Find supervisor xstates supported by the processor. 815 */ 816 cpuid_count(XSTATE_CPUID, 1, &eax, &ebx, &ecx, &edx); 817 xfeatures_mask_all |= ecx + ((u64)edx << 32); 818 819 if ((xfeatures_mask_user() & XFEATURE_MASK_FPSSE) != XFEATURE_MASK_FPSSE) { 820 /* 821 * This indicates that something really unexpected happened 822 * with the enumeration. Disable XSAVE and try to continue 823 * booting without it. This is too early to BUG(). 824 */ 825 pr_err("x86/fpu: FP/SSE not present amongst the CPU's xstate features: 0x%llx.\n", 826 xfeatures_mask_all); 827 goto out_disable; 828 } 829 830 /* 831 * Clear XSAVE features that are disabled in the normal CPUID. 832 */ 833 for (i = 0; i < ARRAY_SIZE(xsave_cpuid_features); i++) { 834 if (!boot_cpu_has(xsave_cpuid_features[i])) 835 xfeatures_mask_all &= ~BIT_ULL(i); 836 } 837 838 xfeatures_mask_all &= fpu__get_supported_xfeatures_mask(); 839 840 /* Enable xstate instructions to be able to continue with initialization: */ 841 fpu__init_cpu_xstate(); 842 err = init_xstate_size(); 843 if (err) 844 goto out_disable; 845 846 /* 847 * Update info used for ptrace frames; use standard-format size and no 848 * supervisor xstates: 849 */ 850 update_regset_xstate_info(fpu_user_xstate_size, xfeatures_mask_user()); 851 852 fpu__init_prepare_fx_sw_frame(); 853 setup_init_fpu_buf(); 854 setup_xstate_comp_offsets(); 855 setup_supervisor_only_offsets(); 856 print_xstate_offset_size(); 857 858 pr_info("x86/fpu: Enabled xstate features 0x%llx, context size is %d bytes, using '%s' format.\n", 859 xfeatures_mask_all, 860 fpu_kernel_xstate_size, 861 boot_cpu_has(X86_FEATURE_XSAVES) ? "compacted" : "standard"); 862 return; 863 864 out_disable: 865 /* something went wrong, try to boot without any XSAVE support */ 866 fpu__init_disable_system_xstate(); 867 } 868 869 /* 870 * Restore minimal FPU state after suspend: 871 */ 872 void fpu__resume_cpu(void) 873 { 874 /* 875 * Restore XCR0 on xsave capable CPUs: 876 */ 877 if (boot_cpu_has(X86_FEATURE_XSAVE)) 878 xsetbv(XCR_XFEATURE_ENABLED_MASK, xfeatures_mask_user()); 879 880 /* 881 * Restore IA32_XSS. The same CPUID bit enumerates support 882 * of XSAVES and MSR_IA32_XSS. 883 */ 884 if (boot_cpu_has(X86_FEATURE_XSAVES)) { 885 wrmsrl(MSR_IA32_XSS, xfeatures_mask_supervisor() | 886 xfeatures_mask_dynamic()); 887 } 888 } 889 890 /* 891 * Given an xstate feature nr, calculate where in the xsave 892 * buffer the state is. Callers should ensure that the buffer 893 * is valid. 894 */ 895 static void *__raw_xsave_addr(struct xregs_state *xsave, int xfeature_nr) 896 { 897 if (!xfeature_enabled(xfeature_nr)) { 898 WARN_ON_FPU(1); 899 return NULL; 900 } 901 902 return (void *)xsave + xstate_comp_offsets[xfeature_nr]; 903 } 904 /* 905 * Given the xsave area and a state inside, this function returns the 906 * address of the state. 907 * 908 * This is the API that is called to get xstate address in either 909 * standard format or compacted format of xsave area. 910 * 911 * Note that if there is no data for the field in the xsave buffer 912 * this will return NULL. 913 * 914 * Inputs: 915 * xstate: the thread's storage area for all FPU data 916 * xfeature_nr: state which is defined in xsave.h (e.g. XFEATURE_FP, 917 * XFEATURE_SSE, etc...) 918 * Output: 919 * address of the state in the xsave area, or NULL if the 920 * field is not present in the xsave buffer. 921 */ 922 void *get_xsave_addr(struct xregs_state *xsave, int xfeature_nr) 923 { 924 /* 925 * Do we even *have* xsave state? 926 */ 927 if (!boot_cpu_has(X86_FEATURE_XSAVE)) 928 return NULL; 929 930 /* 931 * We should not ever be requesting features that we 932 * have not enabled. 933 */ 934 WARN_ONCE(!(xfeatures_mask_all & BIT_ULL(xfeature_nr)), 935 "get of unsupported state"); 936 /* 937 * This assumes the last 'xsave*' instruction to 938 * have requested that 'xfeature_nr' be saved. 939 * If it did not, we might be seeing and old value 940 * of the field in the buffer. 941 * 942 * This can happen because the last 'xsave' did not 943 * request that this feature be saved (unlikely) 944 * or because the "init optimization" caused it 945 * to not be saved. 946 */ 947 if (!(xsave->header.xfeatures & BIT_ULL(xfeature_nr))) 948 return NULL; 949 950 return __raw_xsave_addr(xsave, xfeature_nr); 951 } 952 EXPORT_SYMBOL_GPL(get_xsave_addr); 953 954 /* 955 * This wraps up the common operations that need to occur when retrieving 956 * data from xsave state. It first ensures that the current task was 957 * using the FPU and retrieves the data in to a buffer. It then calculates 958 * the offset of the requested field in the buffer. 959 * 960 * This function is safe to call whether the FPU is in use or not. 961 * 962 * Note that this only works on the current task. 963 * 964 * Inputs: 965 * @xfeature_nr: state which is defined in xsave.h (e.g. XFEATURE_FP, 966 * XFEATURE_SSE, etc...) 967 * Output: 968 * address of the state in the xsave area or NULL if the state 969 * is not present or is in its 'init state'. 970 */ 971 const void *get_xsave_field_ptr(int xfeature_nr) 972 { 973 struct fpu *fpu = ¤t->thread.fpu; 974 975 /* 976 * fpu__save() takes the CPU's xstate registers 977 * and saves them off to the 'fpu memory buffer. 978 */ 979 fpu__save(fpu); 980 981 return get_xsave_addr(&fpu->state.xsave, xfeature_nr); 982 } 983 984 #ifdef CONFIG_ARCH_HAS_PKEYS 985 986 /* 987 * This will go out and modify PKRU register to set the access 988 * rights for @pkey to @init_val. 989 */ 990 int arch_set_user_pkey_access(struct task_struct *tsk, int pkey, 991 unsigned long init_val) 992 { 993 u32 old_pkru; 994 int pkey_shift = (pkey * PKRU_BITS_PER_PKEY); 995 u32 new_pkru_bits = 0; 996 997 /* 998 * This check implies XSAVE support. OSPKE only gets 999 * set if we enable XSAVE and we enable PKU in XCR0. 1000 */ 1001 if (!boot_cpu_has(X86_FEATURE_OSPKE)) 1002 return -EINVAL; 1003 1004 /* 1005 * This code should only be called with valid 'pkey' 1006 * values originating from in-kernel users. Complain 1007 * if a bad value is observed. 1008 */ 1009 WARN_ON_ONCE(pkey >= arch_max_pkey()); 1010 1011 /* Set the bits we need in PKRU: */ 1012 if (init_val & PKEY_DISABLE_ACCESS) 1013 new_pkru_bits |= PKRU_AD_BIT; 1014 if (init_val & PKEY_DISABLE_WRITE) 1015 new_pkru_bits |= PKRU_WD_BIT; 1016 1017 /* Shift the bits in to the correct place in PKRU for pkey: */ 1018 new_pkru_bits <<= pkey_shift; 1019 1020 /* Get old PKRU and mask off any old bits in place: */ 1021 old_pkru = read_pkru(); 1022 old_pkru &= ~((PKRU_AD_BIT|PKRU_WD_BIT) << pkey_shift); 1023 1024 /* Write old part along with new part: */ 1025 write_pkru(old_pkru | new_pkru_bits); 1026 1027 return 0; 1028 } 1029 #endif /* ! CONFIG_ARCH_HAS_PKEYS */ 1030 1031 /* 1032 * Weird legacy quirk: SSE and YMM states store information in the 1033 * MXCSR and MXCSR_FLAGS fields of the FP area. That means if the FP 1034 * area is marked as unused in the xfeatures header, we need to copy 1035 * MXCSR and MXCSR_FLAGS if either SSE or YMM are in use. 1036 */ 1037 static inline bool xfeatures_mxcsr_quirk(u64 xfeatures) 1038 { 1039 if (!(xfeatures & (XFEATURE_MASK_SSE|XFEATURE_MASK_YMM))) 1040 return false; 1041 1042 if (xfeatures & XFEATURE_MASK_FP) 1043 return false; 1044 1045 return true; 1046 } 1047 1048 static void fill_gap(struct membuf *to, unsigned *last, unsigned offset) 1049 { 1050 if (*last >= offset) 1051 return; 1052 membuf_write(to, (void *)&init_fpstate.xsave + *last, offset - *last); 1053 *last = offset; 1054 } 1055 1056 static void copy_part(struct membuf *to, unsigned *last, unsigned offset, 1057 unsigned size, void *from) 1058 { 1059 fill_gap(to, last, offset); 1060 membuf_write(to, from, size); 1061 *last = offset + size; 1062 } 1063 1064 /* 1065 * Convert from kernel XSAVES compacted format to standard format and copy 1066 * to a kernel-space ptrace buffer. 1067 * 1068 * It supports partial copy but pos always starts from zero. This is called 1069 * from xstateregs_get() and there we check the CPU has XSAVES. 1070 */ 1071 void copy_xstate_to_kernel(struct membuf to, struct xregs_state *xsave) 1072 { 1073 struct xstate_header header; 1074 const unsigned off_mxcsr = offsetof(struct fxregs_state, mxcsr); 1075 unsigned size = to.left; 1076 unsigned last = 0; 1077 int i; 1078 1079 /* 1080 * The destination is a ptrace buffer; we put in only user xstates: 1081 */ 1082 memset(&header, 0, sizeof(header)); 1083 header.xfeatures = xsave->header.xfeatures; 1084 header.xfeatures &= xfeatures_mask_user(); 1085 1086 if (header.xfeatures & XFEATURE_MASK_FP) 1087 copy_part(&to, &last, 0, off_mxcsr, &xsave->i387); 1088 if (header.xfeatures & (XFEATURE_MASK_SSE | XFEATURE_MASK_YMM)) 1089 copy_part(&to, &last, off_mxcsr, 1090 MXCSR_AND_FLAGS_SIZE, &xsave->i387.mxcsr); 1091 if (header.xfeatures & XFEATURE_MASK_FP) 1092 copy_part(&to, &last, offsetof(struct fxregs_state, st_space), 1093 128, &xsave->i387.st_space); 1094 if (header.xfeatures & XFEATURE_MASK_SSE) 1095 copy_part(&to, &last, xstate_offsets[XFEATURE_SSE], 1096 256, &xsave->i387.xmm_space); 1097 /* 1098 * Fill xsave->i387.sw_reserved value for ptrace frame: 1099 */ 1100 copy_part(&to, &last, offsetof(struct fxregs_state, sw_reserved), 1101 48, xstate_fx_sw_bytes); 1102 /* 1103 * Copy xregs_state->header: 1104 */ 1105 copy_part(&to, &last, offsetof(struct xregs_state, header), 1106 sizeof(header), &header); 1107 1108 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) { 1109 /* 1110 * Copy only in-use xstates: 1111 */ 1112 if ((header.xfeatures >> i) & 1) { 1113 void *src = __raw_xsave_addr(xsave, i); 1114 1115 copy_part(&to, &last, xstate_offsets[i], 1116 xstate_sizes[i], src); 1117 } 1118 1119 } 1120 fill_gap(&to, &last, size); 1121 } 1122 1123 /* 1124 * Convert from a ptrace standard-format kernel buffer to kernel XSAVES format 1125 * and copy to the target thread. This is called from xstateregs_set(). 1126 */ 1127 int copy_kernel_to_xstate(struct xregs_state *xsave, const void *kbuf) 1128 { 1129 unsigned int offset, size; 1130 int i; 1131 struct xstate_header hdr; 1132 1133 offset = offsetof(struct xregs_state, header); 1134 size = sizeof(hdr); 1135 1136 memcpy(&hdr, kbuf + offset, size); 1137 1138 if (validate_user_xstate_header(&hdr)) 1139 return -EINVAL; 1140 1141 for (i = 0; i < XFEATURE_MAX; i++) { 1142 u64 mask = ((u64)1 << i); 1143 1144 if (hdr.xfeatures & mask) { 1145 void *dst = __raw_xsave_addr(xsave, i); 1146 1147 offset = xstate_offsets[i]; 1148 size = xstate_sizes[i]; 1149 1150 memcpy(dst, kbuf + offset, size); 1151 } 1152 } 1153 1154 if (xfeatures_mxcsr_quirk(hdr.xfeatures)) { 1155 offset = offsetof(struct fxregs_state, mxcsr); 1156 size = MXCSR_AND_FLAGS_SIZE; 1157 memcpy(&xsave->i387.mxcsr, kbuf + offset, size); 1158 } 1159 1160 /* 1161 * The state that came in from userspace was user-state only. 1162 * Mask all the user states out of 'xfeatures': 1163 */ 1164 xsave->header.xfeatures &= XFEATURE_MASK_SUPERVISOR_ALL; 1165 1166 /* 1167 * Add back in the features that came in from userspace: 1168 */ 1169 xsave->header.xfeatures |= hdr.xfeatures; 1170 1171 return 0; 1172 } 1173 1174 /* 1175 * Convert from a ptrace or sigreturn standard-format user-space buffer to 1176 * kernel XSAVES format and copy to the target thread. This is called from 1177 * xstateregs_set(), as well as potentially from the sigreturn() and 1178 * rt_sigreturn() system calls. 1179 */ 1180 int copy_user_to_xstate(struct xregs_state *xsave, const void __user *ubuf) 1181 { 1182 unsigned int offset, size; 1183 int i; 1184 struct xstate_header hdr; 1185 1186 offset = offsetof(struct xregs_state, header); 1187 size = sizeof(hdr); 1188 1189 if (__copy_from_user(&hdr, ubuf + offset, size)) 1190 return -EFAULT; 1191 1192 if (validate_user_xstate_header(&hdr)) 1193 return -EINVAL; 1194 1195 for (i = 0; i < XFEATURE_MAX; i++) { 1196 u64 mask = ((u64)1 << i); 1197 1198 if (hdr.xfeatures & mask) { 1199 void *dst = __raw_xsave_addr(xsave, i); 1200 1201 offset = xstate_offsets[i]; 1202 size = xstate_sizes[i]; 1203 1204 if (__copy_from_user(dst, ubuf + offset, size)) 1205 return -EFAULT; 1206 } 1207 } 1208 1209 if (xfeatures_mxcsr_quirk(hdr.xfeatures)) { 1210 offset = offsetof(struct fxregs_state, mxcsr); 1211 size = MXCSR_AND_FLAGS_SIZE; 1212 if (__copy_from_user(&xsave->i387.mxcsr, ubuf + offset, size)) 1213 return -EFAULT; 1214 } 1215 1216 /* 1217 * The state that came in from userspace was user-state only. 1218 * Mask all the user states out of 'xfeatures': 1219 */ 1220 xsave->header.xfeatures &= XFEATURE_MASK_SUPERVISOR_ALL; 1221 1222 /* 1223 * Add back in the features that came in from userspace: 1224 */ 1225 xsave->header.xfeatures |= hdr.xfeatures; 1226 1227 return 0; 1228 } 1229 1230 /* 1231 * Save only supervisor states to the kernel buffer. This blows away all 1232 * old states, and is intended to be used only in __fpu__restore_sig(), where 1233 * user states are restored from the user buffer. 1234 */ 1235 void copy_supervisor_to_kernel(struct xregs_state *xstate) 1236 { 1237 struct xstate_header *header; 1238 u64 max_bit, min_bit; 1239 u32 lmask, hmask; 1240 int err, i; 1241 1242 if (WARN_ON(!boot_cpu_has(X86_FEATURE_XSAVES))) 1243 return; 1244 1245 if (!xfeatures_mask_supervisor()) 1246 return; 1247 1248 max_bit = __fls(xfeatures_mask_supervisor()); 1249 min_bit = __ffs(xfeatures_mask_supervisor()); 1250 1251 lmask = xfeatures_mask_supervisor(); 1252 hmask = xfeatures_mask_supervisor() >> 32; 1253 XSTATE_OP(XSAVES, xstate, lmask, hmask, err); 1254 1255 /* We should never fault when copying to a kernel buffer: */ 1256 if (WARN_ON_FPU(err)) 1257 return; 1258 1259 /* 1260 * At this point, the buffer has only supervisor states and must be 1261 * converted back to normal kernel format. 1262 */ 1263 header = &xstate->header; 1264 header->xcomp_bv |= xfeatures_mask_all; 1265 1266 /* 1267 * This only moves states up in the buffer. Start with 1268 * the last state and move backwards so that states are 1269 * not overwritten until after they are moved. Note: 1270 * memmove() allows overlapping src/dst buffers. 1271 */ 1272 for (i = max_bit; i >= min_bit; i--) { 1273 u8 *xbuf = (u8 *)xstate; 1274 1275 if (!((header->xfeatures >> i) & 1)) 1276 continue; 1277 1278 /* Move xfeature 'i' into its normal location */ 1279 memmove(xbuf + xstate_comp_offsets[i], 1280 xbuf + xstate_supervisor_only_offsets[i], 1281 xstate_sizes[i]); 1282 } 1283 } 1284 1285 /** 1286 * copy_dynamic_supervisor_to_kernel() - Save dynamic supervisor states to 1287 * an xsave area 1288 * @xstate: A pointer to an xsave area 1289 * @mask: Represent the dynamic supervisor features saved into the xsave area 1290 * 1291 * Only the dynamic supervisor states sets in the mask are saved into the xsave 1292 * area (See the comment in XFEATURE_MASK_DYNAMIC for the details of dynamic 1293 * supervisor feature). Besides the dynamic supervisor states, the legacy 1294 * region and XSAVE header are also saved into the xsave area. The supervisor 1295 * features in the XFEATURE_MASK_SUPERVISOR_SUPPORTED and 1296 * XFEATURE_MASK_SUPERVISOR_UNSUPPORTED are not saved. 1297 * 1298 * The xsave area must be 64-bytes aligned. 1299 */ 1300 void copy_dynamic_supervisor_to_kernel(struct xregs_state *xstate, u64 mask) 1301 { 1302 u64 dynamic_mask = xfeatures_mask_dynamic() & mask; 1303 u32 lmask, hmask; 1304 int err; 1305 1306 if (WARN_ON_FPU(!boot_cpu_has(X86_FEATURE_XSAVES))) 1307 return; 1308 1309 if (WARN_ON_FPU(!dynamic_mask)) 1310 return; 1311 1312 lmask = dynamic_mask; 1313 hmask = dynamic_mask >> 32; 1314 1315 XSTATE_OP(XSAVES, xstate, lmask, hmask, err); 1316 1317 /* Should never fault when copying to a kernel buffer */ 1318 WARN_ON_FPU(err); 1319 } 1320 1321 /** 1322 * copy_kernel_to_dynamic_supervisor() - Restore dynamic supervisor states from 1323 * an xsave area 1324 * @xstate: A pointer to an xsave area 1325 * @mask: Represent the dynamic supervisor features restored from the xsave area 1326 * 1327 * Only the dynamic supervisor states sets in the mask are restored from the 1328 * xsave area (See the comment in XFEATURE_MASK_DYNAMIC for the details of 1329 * dynamic supervisor feature). Besides the dynamic supervisor states, the 1330 * legacy region and XSAVE header are also restored from the xsave area. The 1331 * supervisor features in the XFEATURE_MASK_SUPERVISOR_SUPPORTED and 1332 * XFEATURE_MASK_SUPERVISOR_UNSUPPORTED are not restored. 1333 * 1334 * The xsave area must be 64-bytes aligned. 1335 */ 1336 void copy_kernel_to_dynamic_supervisor(struct xregs_state *xstate, u64 mask) 1337 { 1338 u64 dynamic_mask = xfeatures_mask_dynamic() & mask; 1339 u32 lmask, hmask; 1340 int err; 1341 1342 if (WARN_ON_FPU(!boot_cpu_has(X86_FEATURE_XSAVES))) 1343 return; 1344 1345 if (WARN_ON_FPU(!dynamic_mask)) 1346 return; 1347 1348 lmask = dynamic_mask; 1349 hmask = dynamic_mask >> 32; 1350 1351 XSTATE_OP(XRSTORS, xstate, lmask, hmask, err); 1352 1353 /* Should never fault when copying from a kernel buffer */ 1354 WARN_ON_FPU(err); 1355 } 1356 1357 #ifdef CONFIG_PROC_PID_ARCH_STATUS 1358 /* 1359 * Report the amount of time elapsed in millisecond since last AVX512 1360 * use in the task. 1361 */ 1362 static void avx512_status(struct seq_file *m, struct task_struct *task) 1363 { 1364 unsigned long timestamp = READ_ONCE(task->thread.fpu.avx512_timestamp); 1365 long delta; 1366 1367 if (!timestamp) { 1368 /* 1369 * Report -1 if no AVX512 usage 1370 */ 1371 delta = -1; 1372 } else { 1373 delta = (long)(jiffies - timestamp); 1374 /* 1375 * Cap to LONG_MAX if time difference > LONG_MAX 1376 */ 1377 if (delta < 0) 1378 delta = LONG_MAX; 1379 delta = jiffies_to_msecs(delta); 1380 } 1381 1382 seq_put_decimal_ll(m, "AVX512_elapsed_ms:\t", delta); 1383 seq_putc(m, '\n'); 1384 } 1385 1386 /* 1387 * Report architecture specific information 1388 */ 1389 int proc_pid_arch_status(struct seq_file *m, struct pid_namespace *ns, 1390 struct pid *pid, struct task_struct *task) 1391 { 1392 /* 1393 * Report AVX512 state if the processor and build option supported. 1394 */ 1395 if (cpu_feature_enabled(X86_FEATURE_AVX512F)) 1396 avx512_status(m, task); 1397 1398 return 0; 1399 } 1400 #endif /* CONFIG_PROC_PID_ARCH_STATUS */ 1401