1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * xsave/xrstor support. 4 * 5 * Author: Suresh Siddha <suresh.b.siddha@intel.com> 6 */ 7 #include <linux/compat.h> 8 #include <linux/cpu.h> 9 #include <linux/mman.h> 10 #include <linux/pkeys.h> 11 #include <linux/seq_file.h> 12 #include <linux/proc_fs.h> 13 14 #include <asm/fpu/api.h> 15 #include <asm/fpu/internal.h> 16 #include <asm/fpu/signal.h> 17 #include <asm/fpu/regset.h> 18 #include <asm/fpu/xstate.h> 19 20 #include <asm/tlbflush.h> 21 #include <asm/cpufeature.h> 22 23 /* 24 * Although we spell it out in here, the Processor Trace 25 * xfeature is completely unused. We use other mechanisms 26 * to save/restore PT state in Linux. 27 */ 28 static const char *xfeature_names[] = 29 { 30 "x87 floating point registers" , 31 "SSE registers" , 32 "AVX registers" , 33 "MPX bounds registers" , 34 "MPX CSR" , 35 "AVX-512 opmask" , 36 "AVX-512 Hi256" , 37 "AVX-512 ZMM_Hi256" , 38 "Processor Trace (unused)" , 39 "Protection Keys User registers", 40 "PASID state", 41 "unknown xstate feature" , 42 }; 43 44 static short xsave_cpuid_features[] __initdata = { 45 X86_FEATURE_FPU, 46 X86_FEATURE_XMM, 47 X86_FEATURE_AVX, 48 X86_FEATURE_MPX, 49 X86_FEATURE_MPX, 50 X86_FEATURE_AVX512F, 51 X86_FEATURE_AVX512F, 52 X86_FEATURE_AVX512F, 53 X86_FEATURE_INTEL_PT, 54 X86_FEATURE_PKU, 55 X86_FEATURE_ENQCMD, 56 }; 57 58 /* 59 * This represents the full set of bits that should ever be set in a kernel 60 * XSAVE buffer, both supervisor and user xstates. 61 */ 62 u64 xfeatures_mask_all __read_mostly; 63 64 static unsigned int xstate_offsets[XFEATURE_MAX] = { [ 0 ... XFEATURE_MAX - 1] = -1}; 65 static unsigned int xstate_sizes[XFEATURE_MAX] = { [ 0 ... XFEATURE_MAX - 1] = -1}; 66 static unsigned int xstate_comp_offsets[XFEATURE_MAX] = { [ 0 ... XFEATURE_MAX - 1] = -1}; 67 static unsigned int xstate_supervisor_only_offsets[XFEATURE_MAX] = { [ 0 ... XFEATURE_MAX - 1] = -1}; 68 69 /* 70 * The XSAVE area of kernel can be in standard or compacted format; 71 * it is always in standard format for user mode. This is the user 72 * mode standard format size used for signal and ptrace frames. 73 */ 74 unsigned int fpu_user_xstate_size; 75 76 /* 77 * Return whether the system supports a given xfeature. 78 * 79 * Also return the name of the (most advanced) feature that the caller requested: 80 */ 81 int cpu_has_xfeatures(u64 xfeatures_needed, const char **feature_name) 82 { 83 u64 xfeatures_missing = xfeatures_needed & ~xfeatures_mask_all; 84 85 if (unlikely(feature_name)) { 86 long xfeature_idx, max_idx; 87 u64 xfeatures_print; 88 /* 89 * So we use FLS here to be able to print the most advanced 90 * feature that was requested but is missing. So if a driver 91 * asks about "XFEATURE_MASK_SSE | XFEATURE_MASK_YMM" we'll print the 92 * missing AVX feature - this is the most informative message 93 * to users: 94 */ 95 if (xfeatures_missing) 96 xfeatures_print = xfeatures_missing; 97 else 98 xfeatures_print = xfeatures_needed; 99 100 xfeature_idx = fls64(xfeatures_print)-1; 101 max_idx = ARRAY_SIZE(xfeature_names)-1; 102 xfeature_idx = min(xfeature_idx, max_idx); 103 104 *feature_name = xfeature_names[xfeature_idx]; 105 } 106 107 if (xfeatures_missing) 108 return 0; 109 110 return 1; 111 } 112 EXPORT_SYMBOL_GPL(cpu_has_xfeatures); 113 114 static bool xfeature_is_supervisor(int xfeature_nr) 115 { 116 /* 117 * Extended State Enumeration Sub-leaves (EAX = 0DH, ECX = n, n > 1) 118 * returns ECX[0] set to (1) for a supervisor state, and cleared (0) 119 * for a user state. 120 */ 121 u32 eax, ebx, ecx, edx; 122 123 cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx); 124 return ecx & 1; 125 } 126 127 /* 128 * When executing XSAVEOPT (or other optimized XSAVE instructions), if 129 * a processor implementation detects that an FPU state component is still 130 * (or is again) in its initialized state, it may clear the corresponding 131 * bit in the header.xfeatures field, and can skip the writeout of registers 132 * to the corresponding memory layout. 133 * 134 * This means that when the bit is zero, the state component might still contain 135 * some previous - non-initialized register state. 136 * 137 * Before writing xstate information to user-space we sanitize those components, 138 * to always ensure that the memory layout of a feature will be in the init state 139 * if the corresponding header bit is zero. This is to ensure that user-space doesn't 140 * see some stale state in the memory layout during signal handling, debugging etc. 141 */ 142 void fpstate_sanitize_xstate(struct fpu *fpu) 143 { 144 struct fxregs_state *fx = &fpu->state.fxsave; 145 int feature_bit; 146 u64 xfeatures; 147 148 if (!use_xsaveopt()) 149 return; 150 151 xfeatures = fpu->state.xsave.header.xfeatures; 152 153 /* 154 * None of the feature bits are in init state. So nothing else 155 * to do for us, as the memory layout is up to date. 156 */ 157 if ((xfeatures & xfeatures_mask_all) == xfeatures_mask_all) 158 return; 159 160 /* 161 * FP is in init state 162 */ 163 if (!(xfeatures & XFEATURE_MASK_FP)) { 164 fx->cwd = 0x37f; 165 fx->swd = 0; 166 fx->twd = 0; 167 fx->fop = 0; 168 fx->rip = 0; 169 fx->rdp = 0; 170 memset(&fx->st_space[0], 0, 128); 171 } 172 173 /* 174 * SSE is in init state 175 */ 176 if (!(xfeatures & XFEATURE_MASK_SSE)) 177 memset(&fx->xmm_space[0], 0, 256); 178 179 /* 180 * First two features are FPU and SSE, which above we handled 181 * in a special way already: 182 */ 183 feature_bit = 0x2; 184 xfeatures = (xfeatures_mask_user() & ~xfeatures) >> 2; 185 186 /* 187 * Update all the remaining memory layouts according to their 188 * standard xstate layout, if their header bit is in the init 189 * state: 190 */ 191 while (xfeatures) { 192 if (xfeatures & 0x1) { 193 int offset = xstate_comp_offsets[feature_bit]; 194 int size = xstate_sizes[feature_bit]; 195 196 memcpy((void *)fx + offset, 197 (void *)&init_fpstate.xsave + offset, 198 size); 199 } 200 201 xfeatures >>= 1; 202 feature_bit++; 203 } 204 } 205 206 /* 207 * Enable the extended processor state save/restore feature. 208 * Called once per CPU onlining. 209 */ 210 void fpu__init_cpu_xstate(void) 211 { 212 u64 unsup_bits; 213 214 if (!boot_cpu_has(X86_FEATURE_XSAVE) || !xfeatures_mask_all) 215 return; 216 /* 217 * Unsupported supervisor xstates should not be found in 218 * the xfeatures mask. 219 */ 220 unsup_bits = xfeatures_mask_all & XFEATURE_MASK_SUPERVISOR_UNSUPPORTED; 221 WARN_ONCE(unsup_bits, "x86/fpu: Found unsupported supervisor xstates: 0x%llx\n", 222 unsup_bits); 223 224 xfeatures_mask_all &= ~XFEATURE_MASK_SUPERVISOR_UNSUPPORTED; 225 226 cr4_set_bits(X86_CR4_OSXSAVE); 227 228 /* 229 * XCR_XFEATURE_ENABLED_MASK (aka. XCR0) sets user features 230 * managed by XSAVE{C, OPT, S} and XRSTOR{S}. Only XSAVE user 231 * states can be set here. 232 */ 233 xsetbv(XCR_XFEATURE_ENABLED_MASK, xfeatures_mask_user()); 234 235 /* 236 * MSR_IA32_XSS sets supervisor states managed by XSAVES. 237 */ 238 if (boot_cpu_has(X86_FEATURE_XSAVES)) { 239 wrmsrl(MSR_IA32_XSS, xfeatures_mask_supervisor() | 240 xfeatures_mask_dynamic()); 241 } 242 } 243 244 static bool xfeature_enabled(enum xfeature xfeature) 245 { 246 return xfeatures_mask_all & BIT_ULL(xfeature); 247 } 248 249 /* 250 * Record the offsets and sizes of various xstates contained 251 * in the XSAVE state memory layout. 252 */ 253 static void __init setup_xstate_features(void) 254 { 255 u32 eax, ebx, ecx, edx, i; 256 /* start at the beginnning of the "extended state" */ 257 unsigned int last_good_offset = offsetof(struct xregs_state, 258 extended_state_area); 259 /* 260 * The FP xstates and SSE xstates are legacy states. They are always 261 * in the fixed offsets in the xsave area in either compacted form 262 * or standard form. 263 */ 264 xstate_offsets[XFEATURE_FP] = 0; 265 xstate_sizes[XFEATURE_FP] = offsetof(struct fxregs_state, 266 xmm_space); 267 268 xstate_offsets[XFEATURE_SSE] = xstate_sizes[XFEATURE_FP]; 269 xstate_sizes[XFEATURE_SSE] = sizeof_field(struct fxregs_state, 270 xmm_space); 271 272 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) { 273 if (!xfeature_enabled(i)) 274 continue; 275 276 cpuid_count(XSTATE_CPUID, i, &eax, &ebx, &ecx, &edx); 277 278 xstate_sizes[i] = eax; 279 280 /* 281 * If an xfeature is supervisor state, the offset in EBX is 282 * invalid, leave it to -1. 283 */ 284 if (xfeature_is_supervisor(i)) 285 continue; 286 287 xstate_offsets[i] = ebx; 288 289 /* 290 * In our xstate size checks, we assume that the highest-numbered 291 * xstate feature has the highest offset in the buffer. Ensure 292 * it does. 293 */ 294 WARN_ONCE(last_good_offset > xstate_offsets[i], 295 "x86/fpu: misordered xstate at %d\n", last_good_offset); 296 297 last_good_offset = xstate_offsets[i]; 298 } 299 } 300 301 static void __init print_xstate_feature(u64 xstate_mask) 302 { 303 const char *feature_name; 304 305 if (cpu_has_xfeatures(xstate_mask, &feature_name)) 306 pr_info("x86/fpu: Supporting XSAVE feature 0x%03Lx: '%s'\n", xstate_mask, feature_name); 307 } 308 309 /* 310 * Print out all the supported xstate features: 311 */ 312 static void __init print_xstate_features(void) 313 { 314 print_xstate_feature(XFEATURE_MASK_FP); 315 print_xstate_feature(XFEATURE_MASK_SSE); 316 print_xstate_feature(XFEATURE_MASK_YMM); 317 print_xstate_feature(XFEATURE_MASK_BNDREGS); 318 print_xstate_feature(XFEATURE_MASK_BNDCSR); 319 print_xstate_feature(XFEATURE_MASK_OPMASK); 320 print_xstate_feature(XFEATURE_MASK_ZMM_Hi256); 321 print_xstate_feature(XFEATURE_MASK_Hi16_ZMM); 322 print_xstate_feature(XFEATURE_MASK_PKRU); 323 print_xstate_feature(XFEATURE_MASK_PASID); 324 } 325 326 /* 327 * This check is important because it is easy to get XSTATE_* 328 * confused with XSTATE_BIT_*. 329 */ 330 #define CHECK_XFEATURE(nr) do { \ 331 WARN_ON(nr < FIRST_EXTENDED_XFEATURE); \ 332 WARN_ON(nr >= XFEATURE_MAX); \ 333 } while (0) 334 335 /* 336 * We could cache this like xstate_size[], but we only use 337 * it here, so it would be a waste of space. 338 */ 339 static int xfeature_is_aligned(int xfeature_nr) 340 { 341 u32 eax, ebx, ecx, edx; 342 343 CHECK_XFEATURE(xfeature_nr); 344 345 if (!xfeature_enabled(xfeature_nr)) { 346 WARN_ONCE(1, "Checking alignment of disabled xfeature %d\n", 347 xfeature_nr); 348 return 0; 349 } 350 351 cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx); 352 /* 353 * The value returned by ECX[1] indicates the alignment 354 * of state component 'i' when the compacted format 355 * of the extended region of an XSAVE area is used: 356 */ 357 return !!(ecx & 2); 358 } 359 360 /* 361 * This function sets up offsets and sizes of all extended states in 362 * xsave area. This supports both standard format and compacted format 363 * of the xsave area. 364 */ 365 static void __init setup_xstate_comp_offsets(void) 366 { 367 unsigned int next_offset; 368 int i; 369 370 /* 371 * The FP xstates and SSE xstates are legacy states. They are always 372 * in the fixed offsets in the xsave area in either compacted form 373 * or standard form. 374 */ 375 xstate_comp_offsets[XFEATURE_FP] = 0; 376 xstate_comp_offsets[XFEATURE_SSE] = offsetof(struct fxregs_state, 377 xmm_space); 378 379 if (!boot_cpu_has(X86_FEATURE_XSAVES)) { 380 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) { 381 if (xfeature_enabled(i)) 382 xstate_comp_offsets[i] = xstate_offsets[i]; 383 } 384 return; 385 } 386 387 next_offset = FXSAVE_SIZE + XSAVE_HDR_SIZE; 388 389 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) { 390 if (!xfeature_enabled(i)) 391 continue; 392 393 if (xfeature_is_aligned(i)) 394 next_offset = ALIGN(next_offset, 64); 395 396 xstate_comp_offsets[i] = next_offset; 397 next_offset += xstate_sizes[i]; 398 } 399 } 400 401 /* 402 * Setup offsets of a supervisor-state-only XSAVES buffer: 403 * 404 * The offsets stored in xstate_comp_offsets[] only work for one specific 405 * value of the Requested Feature BitMap (RFBM). In cases where a different 406 * RFBM value is used, a different set of offsets is required. This set of 407 * offsets is for when RFBM=xfeatures_mask_supervisor(). 408 */ 409 static void __init setup_supervisor_only_offsets(void) 410 { 411 unsigned int next_offset; 412 int i; 413 414 next_offset = FXSAVE_SIZE + XSAVE_HDR_SIZE; 415 416 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) { 417 if (!xfeature_enabled(i) || !xfeature_is_supervisor(i)) 418 continue; 419 420 if (xfeature_is_aligned(i)) 421 next_offset = ALIGN(next_offset, 64); 422 423 xstate_supervisor_only_offsets[i] = next_offset; 424 next_offset += xstate_sizes[i]; 425 } 426 } 427 428 /* 429 * Print out xstate component offsets and sizes 430 */ 431 static void __init print_xstate_offset_size(void) 432 { 433 int i; 434 435 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) { 436 if (!xfeature_enabled(i)) 437 continue; 438 pr_info("x86/fpu: xstate_offset[%d]: %4d, xstate_sizes[%d]: %4d\n", 439 i, xstate_comp_offsets[i], i, xstate_sizes[i]); 440 } 441 } 442 443 /* 444 * setup the xstate image representing the init state 445 */ 446 static void __init setup_init_fpu_buf(void) 447 { 448 static int on_boot_cpu __initdata = 1; 449 450 WARN_ON_FPU(!on_boot_cpu); 451 on_boot_cpu = 0; 452 453 if (!boot_cpu_has(X86_FEATURE_XSAVE)) 454 return; 455 456 setup_xstate_features(); 457 print_xstate_features(); 458 459 if (boot_cpu_has(X86_FEATURE_XSAVES)) 460 init_fpstate.xsave.header.xcomp_bv = XCOMP_BV_COMPACTED_FORMAT | 461 xfeatures_mask_all; 462 463 /* 464 * Init all the features state with header.xfeatures being 0x0 465 */ 466 copy_kernel_to_xregs_booting(&init_fpstate.xsave); 467 468 /* 469 * Dump the init state again. This is to identify the init state 470 * of any feature which is not represented by all zero's. 471 */ 472 copy_xregs_to_kernel_booting(&init_fpstate.xsave); 473 } 474 475 static int xfeature_uncompacted_offset(int xfeature_nr) 476 { 477 u32 eax, ebx, ecx, edx; 478 479 /* 480 * Only XSAVES supports supervisor states and it uses compacted 481 * format. Checking a supervisor state's uncompacted offset is 482 * an error. 483 */ 484 if (XFEATURE_MASK_SUPERVISOR_ALL & BIT_ULL(xfeature_nr)) { 485 WARN_ONCE(1, "No fixed offset for xstate %d\n", xfeature_nr); 486 return -1; 487 } 488 489 CHECK_XFEATURE(xfeature_nr); 490 cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx); 491 return ebx; 492 } 493 494 int xfeature_size(int xfeature_nr) 495 { 496 u32 eax, ebx, ecx, edx; 497 498 CHECK_XFEATURE(xfeature_nr); 499 cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx); 500 return eax; 501 } 502 503 /* 504 * 'XSAVES' implies two different things: 505 * 1. saving of supervisor/system state 506 * 2. using the compacted format 507 * 508 * Use this function when dealing with the compacted format so 509 * that it is obvious which aspect of 'XSAVES' is being handled 510 * by the calling code. 511 */ 512 int using_compacted_format(void) 513 { 514 return boot_cpu_has(X86_FEATURE_XSAVES); 515 } 516 517 /* Validate an xstate header supplied by userspace (ptrace or sigreturn) */ 518 int validate_user_xstate_header(const struct xstate_header *hdr) 519 { 520 /* No unknown or supervisor features may be set */ 521 if (hdr->xfeatures & ~xfeatures_mask_user()) 522 return -EINVAL; 523 524 /* Userspace must use the uncompacted format */ 525 if (hdr->xcomp_bv) 526 return -EINVAL; 527 528 /* 529 * If 'reserved' is shrunken to add a new field, make sure to validate 530 * that new field here! 531 */ 532 BUILD_BUG_ON(sizeof(hdr->reserved) != 48); 533 534 /* No reserved bits may be set */ 535 if (memchr_inv(hdr->reserved, 0, sizeof(hdr->reserved))) 536 return -EINVAL; 537 538 return 0; 539 } 540 541 static void __xstate_dump_leaves(void) 542 { 543 int i; 544 u32 eax, ebx, ecx, edx; 545 static int should_dump = 1; 546 547 if (!should_dump) 548 return; 549 should_dump = 0; 550 /* 551 * Dump out a few leaves past the ones that we support 552 * just in case there are some goodies up there 553 */ 554 for (i = 0; i < XFEATURE_MAX + 10; i++) { 555 cpuid_count(XSTATE_CPUID, i, &eax, &ebx, &ecx, &edx); 556 pr_warn("CPUID[%02x, %02x]: eax=%08x ebx=%08x ecx=%08x edx=%08x\n", 557 XSTATE_CPUID, i, eax, ebx, ecx, edx); 558 } 559 } 560 561 #define XSTATE_WARN_ON(x) do { \ 562 if (WARN_ONCE(x, "XSAVE consistency problem, dumping leaves")) { \ 563 __xstate_dump_leaves(); \ 564 } \ 565 } while (0) 566 567 #define XCHECK_SZ(sz, nr, nr_macro, __struct) do { \ 568 if ((nr == nr_macro) && \ 569 WARN_ONCE(sz != sizeof(__struct), \ 570 "%s: struct is %zu bytes, cpu state %d bytes\n", \ 571 __stringify(nr_macro), sizeof(__struct), sz)) { \ 572 __xstate_dump_leaves(); \ 573 } \ 574 } while (0) 575 576 /* 577 * We have a C struct for each 'xstate'. We need to ensure 578 * that our software representation matches what the CPU 579 * tells us about the state's size. 580 */ 581 static void check_xstate_against_struct(int nr) 582 { 583 /* 584 * Ask the CPU for the size of the state. 585 */ 586 int sz = xfeature_size(nr); 587 /* 588 * Match each CPU state with the corresponding software 589 * structure. 590 */ 591 XCHECK_SZ(sz, nr, XFEATURE_YMM, struct ymmh_struct); 592 XCHECK_SZ(sz, nr, XFEATURE_BNDREGS, struct mpx_bndreg_state); 593 XCHECK_SZ(sz, nr, XFEATURE_BNDCSR, struct mpx_bndcsr_state); 594 XCHECK_SZ(sz, nr, XFEATURE_OPMASK, struct avx_512_opmask_state); 595 XCHECK_SZ(sz, nr, XFEATURE_ZMM_Hi256, struct avx_512_zmm_uppers_state); 596 XCHECK_SZ(sz, nr, XFEATURE_Hi16_ZMM, struct avx_512_hi16_state); 597 XCHECK_SZ(sz, nr, XFEATURE_PKRU, struct pkru_state); 598 XCHECK_SZ(sz, nr, XFEATURE_PASID, struct ia32_pasid_state); 599 600 /* 601 * Make *SURE* to add any feature numbers in below if 602 * there are "holes" in the xsave state component 603 * numbers. 604 */ 605 if ((nr < XFEATURE_YMM) || 606 (nr >= XFEATURE_MAX) || 607 (nr == XFEATURE_PT_UNIMPLEMENTED_SO_FAR) || 608 ((nr >= XFEATURE_RSRVD_COMP_11) && (nr <= XFEATURE_LBR))) { 609 WARN_ONCE(1, "no structure for xstate: %d\n", nr); 610 XSTATE_WARN_ON(1); 611 } 612 } 613 614 /* 615 * This essentially double-checks what the cpu told us about 616 * how large the XSAVE buffer needs to be. We are recalculating 617 * it to be safe. 618 * 619 * Dynamic XSAVE features allocate their own buffers and are not 620 * covered by these checks. Only the size of the buffer for task->fpu 621 * is checked here. 622 */ 623 static void do_extra_xstate_size_checks(void) 624 { 625 int paranoid_xstate_size = FXSAVE_SIZE + XSAVE_HDR_SIZE; 626 int i; 627 628 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) { 629 if (!xfeature_enabled(i)) 630 continue; 631 632 check_xstate_against_struct(i); 633 /* 634 * Supervisor state components can be managed only by 635 * XSAVES, which is compacted-format only. 636 */ 637 if (!using_compacted_format()) 638 XSTATE_WARN_ON(xfeature_is_supervisor(i)); 639 640 /* Align from the end of the previous feature */ 641 if (xfeature_is_aligned(i)) 642 paranoid_xstate_size = ALIGN(paranoid_xstate_size, 64); 643 /* 644 * The offset of a given state in the non-compacted 645 * format is given to us in a CPUID leaf. We check 646 * them for being ordered (increasing offsets) in 647 * setup_xstate_features(). 648 */ 649 if (!using_compacted_format()) 650 paranoid_xstate_size = xfeature_uncompacted_offset(i); 651 /* 652 * The compacted-format offset always depends on where 653 * the previous state ended. 654 */ 655 paranoid_xstate_size += xfeature_size(i); 656 } 657 XSTATE_WARN_ON(paranoid_xstate_size != fpu_kernel_xstate_size); 658 } 659 660 661 /* 662 * Get total size of enabled xstates in XCR0 | IA32_XSS. 663 * 664 * Note the SDM's wording here. "sub-function 0" only enumerates 665 * the size of the *user* states. If we use it to size a buffer 666 * that we use 'XSAVES' on, we could potentially overflow the 667 * buffer because 'XSAVES' saves system states too. 668 */ 669 static unsigned int __init get_xsaves_size(void) 670 { 671 unsigned int eax, ebx, ecx, edx; 672 /* 673 * - CPUID function 0DH, sub-function 1: 674 * EBX enumerates the size (in bytes) required by 675 * the XSAVES instruction for an XSAVE area 676 * containing all the state components 677 * corresponding to bits currently set in 678 * XCR0 | IA32_XSS. 679 */ 680 cpuid_count(XSTATE_CPUID, 1, &eax, &ebx, &ecx, &edx); 681 return ebx; 682 } 683 684 /* 685 * Get the total size of the enabled xstates without the dynamic supervisor 686 * features. 687 */ 688 static unsigned int __init get_xsaves_size_no_dynamic(void) 689 { 690 u64 mask = xfeatures_mask_dynamic(); 691 unsigned int size; 692 693 if (!mask) 694 return get_xsaves_size(); 695 696 /* Disable dynamic features. */ 697 wrmsrl(MSR_IA32_XSS, xfeatures_mask_supervisor()); 698 699 /* 700 * Ask the hardware what size is required of the buffer. 701 * This is the size required for the task->fpu buffer. 702 */ 703 size = get_xsaves_size(); 704 705 /* Re-enable dynamic features so XSAVES will work on them again. */ 706 wrmsrl(MSR_IA32_XSS, xfeatures_mask_supervisor() | mask); 707 708 return size; 709 } 710 711 static unsigned int __init get_xsave_size(void) 712 { 713 unsigned int eax, ebx, ecx, edx; 714 /* 715 * - CPUID function 0DH, sub-function 0: 716 * EBX enumerates the size (in bytes) required by 717 * the XSAVE instruction for an XSAVE area 718 * containing all the *user* state components 719 * corresponding to bits currently set in XCR0. 720 */ 721 cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx); 722 return ebx; 723 } 724 725 /* 726 * Will the runtime-enumerated 'xstate_size' fit in the init 727 * task's statically-allocated buffer? 728 */ 729 static bool is_supported_xstate_size(unsigned int test_xstate_size) 730 { 731 if (test_xstate_size <= sizeof(union fpregs_state)) 732 return true; 733 734 pr_warn("x86/fpu: xstate buffer too small (%zu < %d), disabling xsave\n", 735 sizeof(union fpregs_state), test_xstate_size); 736 return false; 737 } 738 739 static int __init init_xstate_size(void) 740 { 741 /* Recompute the context size for enabled features: */ 742 unsigned int possible_xstate_size; 743 unsigned int xsave_size; 744 745 xsave_size = get_xsave_size(); 746 747 if (boot_cpu_has(X86_FEATURE_XSAVES)) 748 possible_xstate_size = get_xsaves_size_no_dynamic(); 749 else 750 possible_xstate_size = xsave_size; 751 752 /* Ensure we have the space to store all enabled: */ 753 if (!is_supported_xstate_size(possible_xstate_size)) 754 return -EINVAL; 755 756 /* 757 * The size is OK, we are definitely going to use xsave, 758 * make it known to the world that we need more space. 759 */ 760 fpu_kernel_xstate_size = possible_xstate_size; 761 do_extra_xstate_size_checks(); 762 763 /* 764 * User space is always in standard format. 765 */ 766 fpu_user_xstate_size = xsave_size; 767 return 0; 768 } 769 770 /* 771 * We enabled the XSAVE hardware, but something went wrong and 772 * we can not use it. Disable it. 773 */ 774 static void fpu__init_disable_system_xstate(void) 775 { 776 xfeatures_mask_all = 0; 777 cr4_clear_bits(X86_CR4_OSXSAVE); 778 setup_clear_cpu_cap(X86_FEATURE_XSAVE); 779 } 780 781 /* 782 * Enable and initialize the xsave feature. 783 * Called once per system bootup. 784 */ 785 void __init fpu__init_system_xstate(void) 786 { 787 unsigned int eax, ebx, ecx, edx; 788 static int on_boot_cpu __initdata = 1; 789 int err; 790 int i; 791 792 WARN_ON_FPU(!on_boot_cpu); 793 on_boot_cpu = 0; 794 795 if (!boot_cpu_has(X86_FEATURE_FPU)) { 796 pr_info("x86/fpu: No FPU detected\n"); 797 return; 798 } 799 800 if (!boot_cpu_has(X86_FEATURE_XSAVE)) { 801 pr_info("x86/fpu: x87 FPU will use %s\n", 802 boot_cpu_has(X86_FEATURE_FXSR) ? "FXSAVE" : "FSAVE"); 803 return; 804 } 805 806 if (boot_cpu_data.cpuid_level < XSTATE_CPUID) { 807 WARN_ON_FPU(1); 808 return; 809 } 810 811 /* 812 * Find user xstates supported by the processor. 813 */ 814 cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx); 815 xfeatures_mask_all = eax + ((u64)edx << 32); 816 817 /* 818 * Find supervisor xstates supported by the processor. 819 */ 820 cpuid_count(XSTATE_CPUID, 1, &eax, &ebx, &ecx, &edx); 821 xfeatures_mask_all |= ecx + ((u64)edx << 32); 822 823 if ((xfeatures_mask_user() & XFEATURE_MASK_FPSSE) != XFEATURE_MASK_FPSSE) { 824 /* 825 * This indicates that something really unexpected happened 826 * with the enumeration. Disable XSAVE and try to continue 827 * booting without it. This is too early to BUG(). 828 */ 829 pr_err("x86/fpu: FP/SSE not present amongst the CPU's xstate features: 0x%llx.\n", 830 xfeatures_mask_all); 831 goto out_disable; 832 } 833 834 /* 835 * Clear XSAVE features that are disabled in the normal CPUID. 836 */ 837 for (i = 0; i < ARRAY_SIZE(xsave_cpuid_features); i++) { 838 if (!boot_cpu_has(xsave_cpuid_features[i])) 839 xfeatures_mask_all &= ~BIT_ULL(i); 840 } 841 842 xfeatures_mask_all &= fpu__get_supported_xfeatures_mask(); 843 844 /* Enable xstate instructions to be able to continue with initialization: */ 845 fpu__init_cpu_xstate(); 846 err = init_xstate_size(); 847 if (err) 848 goto out_disable; 849 850 /* 851 * Update info used for ptrace frames; use standard-format size and no 852 * supervisor xstates: 853 */ 854 update_regset_xstate_info(fpu_user_xstate_size, xfeatures_mask_user()); 855 856 fpu__init_prepare_fx_sw_frame(); 857 setup_init_fpu_buf(); 858 setup_xstate_comp_offsets(); 859 setup_supervisor_only_offsets(); 860 print_xstate_offset_size(); 861 862 pr_info("x86/fpu: Enabled xstate features 0x%llx, context size is %d bytes, using '%s' format.\n", 863 xfeatures_mask_all, 864 fpu_kernel_xstate_size, 865 boot_cpu_has(X86_FEATURE_XSAVES) ? "compacted" : "standard"); 866 return; 867 868 out_disable: 869 /* something went wrong, try to boot without any XSAVE support */ 870 fpu__init_disable_system_xstate(); 871 } 872 873 /* 874 * Restore minimal FPU state after suspend: 875 */ 876 void fpu__resume_cpu(void) 877 { 878 /* 879 * Restore XCR0 on xsave capable CPUs: 880 */ 881 if (boot_cpu_has(X86_FEATURE_XSAVE)) 882 xsetbv(XCR_XFEATURE_ENABLED_MASK, xfeatures_mask_user()); 883 884 /* 885 * Restore IA32_XSS. The same CPUID bit enumerates support 886 * of XSAVES and MSR_IA32_XSS. 887 */ 888 if (boot_cpu_has(X86_FEATURE_XSAVES)) { 889 wrmsrl(MSR_IA32_XSS, xfeatures_mask_supervisor() | 890 xfeatures_mask_dynamic()); 891 } 892 } 893 894 /* 895 * Given an xstate feature nr, calculate where in the xsave 896 * buffer the state is. Callers should ensure that the buffer 897 * is valid. 898 */ 899 static void *__raw_xsave_addr(struct xregs_state *xsave, int xfeature_nr) 900 { 901 if (!xfeature_enabled(xfeature_nr)) { 902 WARN_ON_FPU(1); 903 return NULL; 904 } 905 906 return (void *)xsave + xstate_comp_offsets[xfeature_nr]; 907 } 908 /* 909 * Given the xsave area and a state inside, this function returns the 910 * address of the state. 911 * 912 * This is the API that is called to get xstate address in either 913 * standard format or compacted format of xsave area. 914 * 915 * Note that if there is no data for the field in the xsave buffer 916 * this will return NULL. 917 * 918 * Inputs: 919 * xstate: the thread's storage area for all FPU data 920 * xfeature_nr: state which is defined in xsave.h (e.g. XFEATURE_FP, 921 * XFEATURE_SSE, etc...) 922 * Output: 923 * address of the state in the xsave area, or NULL if the 924 * field is not present in the xsave buffer. 925 */ 926 void *get_xsave_addr(struct xregs_state *xsave, int xfeature_nr) 927 { 928 /* 929 * Do we even *have* xsave state? 930 */ 931 if (!boot_cpu_has(X86_FEATURE_XSAVE)) 932 return NULL; 933 934 /* 935 * We should not ever be requesting features that we 936 * have not enabled. 937 */ 938 WARN_ONCE(!(xfeatures_mask_all & BIT_ULL(xfeature_nr)), 939 "get of unsupported state"); 940 /* 941 * This assumes the last 'xsave*' instruction to 942 * have requested that 'xfeature_nr' be saved. 943 * If it did not, we might be seeing and old value 944 * of the field in the buffer. 945 * 946 * This can happen because the last 'xsave' did not 947 * request that this feature be saved (unlikely) 948 * or because the "init optimization" caused it 949 * to not be saved. 950 */ 951 if (!(xsave->header.xfeatures & BIT_ULL(xfeature_nr))) 952 return NULL; 953 954 return __raw_xsave_addr(xsave, xfeature_nr); 955 } 956 EXPORT_SYMBOL_GPL(get_xsave_addr); 957 958 /* 959 * This wraps up the common operations that need to occur when retrieving 960 * data from xsave state. It first ensures that the current task was 961 * using the FPU and retrieves the data in to a buffer. It then calculates 962 * the offset of the requested field in the buffer. 963 * 964 * This function is safe to call whether the FPU is in use or not. 965 * 966 * Note that this only works on the current task. 967 * 968 * Inputs: 969 * @xfeature_nr: state which is defined in xsave.h (e.g. XFEATURE_FP, 970 * XFEATURE_SSE, etc...) 971 * Output: 972 * address of the state in the xsave area or NULL if the state 973 * is not present or is in its 'init state'. 974 */ 975 const void *get_xsave_field_ptr(int xfeature_nr) 976 { 977 struct fpu *fpu = ¤t->thread.fpu; 978 979 /* 980 * fpu__save() takes the CPU's xstate registers 981 * and saves them off to the 'fpu memory buffer. 982 */ 983 fpu__save(fpu); 984 985 return get_xsave_addr(&fpu->state.xsave, xfeature_nr); 986 } 987 988 #ifdef CONFIG_ARCH_HAS_PKEYS 989 990 /* 991 * This will go out and modify PKRU register to set the access 992 * rights for @pkey to @init_val. 993 */ 994 int arch_set_user_pkey_access(struct task_struct *tsk, int pkey, 995 unsigned long init_val) 996 { 997 u32 old_pkru; 998 int pkey_shift = (pkey * PKRU_BITS_PER_PKEY); 999 u32 new_pkru_bits = 0; 1000 1001 /* 1002 * This check implies XSAVE support. OSPKE only gets 1003 * set if we enable XSAVE and we enable PKU in XCR0. 1004 */ 1005 if (!boot_cpu_has(X86_FEATURE_OSPKE)) 1006 return -EINVAL; 1007 1008 /* 1009 * This code should only be called with valid 'pkey' 1010 * values originating from in-kernel users. Complain 1011 * if a bad value is observed. 1012 */ 1013 WARN_ON_ONCE(pkey >= arch_max_pkey()); 1014 1015 /* Set the bits we need in PKRU: */ 1016 if (init_val & PKEY_DISABLE_ACCESS) 1017 new_pkru_bits |= PKRU_AD_BIT; 1018 if (init_val & PKEY_DISABLE_WRITE) 1019 new_pkru_bits |= PKRU_WD_BIT; 1020 1021 /* Shift the bits in to the correct place in PKRU for pkey: */ 1022 new_pkru_bits <<= pkey_shift; 1023 1024 /* Get old PKRU and mask off any old bits in place: */ 1025 old_pkru = read_pkru(); 1026 old_pkru &= ~((PKRU_AD_BIT|PKRU_WD_BIT) << pkey_shift); 1027 1028 /* Write old part along with new part: */ 1029 write_pkru(old_pkru | new_pkru_bits); 1030 1031 return 0; 1032 } 1033 #endif /* ! CONFIG_ARCH_HAS_PKEYS */ 1034 1035 /* 1036 * Weird legacy quirk: SSE and YMM states store information in the 1037 * MXCSR and MXCSR_FLAGS fields of the FP area. That means if the FP 1038 * area is marked as unused in the xfeatures header, we need to copy 1039 * MXCSR and MXCSR_FLAGS if either SSE or YMM are in use. 1040 */ 1041 static inline bool xfeatures_mxcsr_quirk(u64 xfeatures) 1042 { 1043 if (!(xfeatures & (XFEATURE_MASK_SSE|XFEATURE_MASK_YMM))) 1044 return false; 1045 1046 if (xfeatures & XFEATURE_MASK_FP) 1047 return false; 1048 1049 return true; 1050 } 1051 1052 static void fill_gap(struct membuf *to, unsigned *last, unsigned offset) 1053 { 1054 if (*last >= offset) 1055 return; 1056 membuf_write(to, (void *)&init_fpstate.xsave + *last, offset - *last); 1057 *last = offset; 1058 } 1059 1060 static void copy_part(struct membuf *to, unsigned *last, unsigned offset, 1061 unsigned size, void *from) 1062 { 1063 fill_gap(to, last, offset); 1064 membuf_write(to, from, size); 1065 *last = offset + size; 1066 } 1067 1068 /* 1069 * Convert from kernel XSAVES compacted format to standard format and copy 1070 * to a kernel-space ptrace buffer. 1071 * 1072 * It supports partial copy but pos always starts from zero. This is called 1073 * from xstateregs_get() and there we check the CPU has XSAVES. 1074 */ 1075 void copy_xstate_to_kernel(struct membuf to, struct xregs_state *xsave) 1076 { 1077 struct xstate_header header; 1078 const unsigned off_mxcsr = offsetof(struct fxregs_state, mxcsr); 1079 unsigned size = to.left; 1080 unsigned last = 0; 1081 int i; 1082 1083 /* 1084 * The destination is a ptrace buffer; we put in only user xstates: 1085 */ 1086 memset(&header, 0, sizeof(header)); 1087 header.xfeatures = xsave->header.xfeatures; 1088 header.xfeatures &= xfeatures_mask_user(); 1089 1090 if (header.xfeatures & XFEATURE_MASK_FP) 1091 copy_part(&to, &last, 0, off_mxcsr, &xsave->i387); 1092 if (header.xfeatures & (XFEATURE_MASK_SSE | XFEATURE_MASK_YMM)) 1093 copy_part(&to, &last, off_mxcsr, 1094 MXCSR_AND_FLAGS_SIZE, &xsave->i387.mxcsr); 1095 if (header.xfeatures & XFEATURE_MASK_FP) 1096 copy_part(&to, &last, offsetof(struct fxregs_state, st_space), 1097 128, &xsave->i387.st_space); 1098 if (header.xfeatures & XFEATURE_MASK_SSE) 1099 copy_part(&to, &last, xstate_offsets[XFEATURE_SSE], 1100 256, &xsave->i387.xmm_space); 1101 /* 1102 * Fill xsave->i387.sw_reserved value for ptrace frame: 1103 */ 1104 copy_part(&to, &last, offsetof(struct fxregs_state, sw_reserved), 1105 48, xstate_fx_sw_bytes); 1106 /* 1107 * Copy xregs_state->header: 1108 */ 1109 copy_part(&to, &last, offsetof(struct xregs_state, header), 1110 sizeof(header), &header); 1111 1112 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) { 1113 /* 1114 * Copy only in-use xstates: 1115 */ 1116 if ((header.xfeatures >> i) & 1) { 1117 void *src = __raw_xsave_addr(xsave, i); 1118 1119 copy_part(&to, &last, xstate_offsets[i], 1120 xstate_sizes[i], src); 1121 } 1122 1123 } 1124 fill_gap(&to, &last, size); 1125 } 1126 1127 /* 1128 * Convert from a ptrace standard-format kernel buffer to kernel XSAVES format 1129 * and copy to the target thread. This is called from xstateregs_set(). 1130 */ 1131 int copy_kernel_to_xstate(struct xregs_state *xsave, const void *kbuf) 1132 { 1133 unsigned int offset, size; 1134 int i; 1135 struct xstate_header hdr; 1136 1137 offset = offsetof(struct xregs_state, header); 1138 size = sizeof(hdr); 1139 1140 memcpy(&hdr, kbuf + offset, size); 1141 1142 if (validate_user_xstate_header(&hdr)) 1143 return -EINVAL; 1144 1145 for (i = 0; i < XFEATURE_MAX; i++) { 1146 u64 mask = ((u64)1 << i); 1147 1148 if (hdr.xfeatures & mask) { 1149 void *dst = __raw_xsave_addr(xsave, i); 1150 1151 offset = xstate_offsets[i]; 1152 size = xstate_sizes[i]; 1153 1154 memcpy(dst, kbuf + offset, size); 1155 } 1156 } 1157 1158 if (xfeatures_mxcsr_quirk(hdr.xfeatures)) { 1159 offset = offsetof(struct fxregs_state, mxcsr); 1160 size = MXCSR_AND_FLAGS_SIZE; 1161 memcpy(&xsave->i387.mxcsr, kbuf + offset, size); 1162 } 1163 1164 /* 1165 * The state that came in from userspace was user-state only. 1166 * Mask all the user states out of 'xfeatures': 1167 */ 1168 xsave->header.xfeatures &= XFEATURE_MASK_SUPERVISOR_ALL; 1169 1170 /* 1171 * Add back in the features that came in from userspace: 1172 */ 1173 xsave->header.xfeatures |= hdr.xfeatures; 1174 1175 return 0; 1176 } 1177 1178 /* 1179 * Convert from a ptrace or sigreturn standard-format user-space buffer to 1180 * kernel XSAVES format and copy to the target thread. This is called from 1181 * xstateregs_set(), as well as potentially from the sigreturn() and 1182 * rt_sigreturn() system calls. 1183 */ 1184 int copy_user_to_xstate(struct xregs_state *xsave, const void __user *ubuf) 1185 { 1186 unsigned int offset, size; 1187 int i; 1188 struct xstate_header hdr; 1189 1190 offset = offsetof(struct xregs_state, header); 1191 size = sizeof(hdr); 1192 1193 if (__copy_from_user(&hdr, ubuf + offset, size)) 1194 return -EFAULT; 1195 1196 if (validate_user_xstate_header(&hdr)) 1197 return -EINVAL; 1198 1199 for (i = 0; i < XFEATURE_MAX; i++) { 1200 u64 mask = ((u64)1 << i); 1201 1202 if (hdr.xfeatures & mask) { 1203 void *dst = __raw_xsave_addr(xsave, i); 1204 1205 offset = xstate_offsets[i]; 1206 size = xstate_sizes[i]; 1207 1208 if (__copy_from_user(dst, ubuf + offset, size)) 1209 return -EFAULT; 1210 } 1211 } 1212 1213 if (xfeatures_mxcsr_quirk(hdr.xfeatures)) { 1214 offset = offsetof(struct fxregs_state, mxcsr); 1215 size = MXCSR_AND_FLAGS_SIZE; 1216 if (__copy_from_user(&xsave->i387.mxcsr, ubuf + offset, size)) 1217 return -EFAULT; 1218 } 1219 1220 /* 1221 * The state that came in from userspace was user-state only. 1222 * Mask all the user states out of 'xfeatures': 1223 */ 1224 xsave->header.xfeatures &= XFEATURE_MASK_SUPERVISOR_ALL; 1225 1226 /* 1227 * Add back in the features that came in from userspace: 1228 */ 1229 xsave->header.xfeatures |= hdr.xfeatures; 1230 1231 return 0; 1232 } 1233 1234 /* 1235 * Save only supervisor states to the kernel buffer. This blows away all 1236 * old states, and is intended to be used only in __fpu__restore_sig(), where 1237 * user states are restored from the user buffer. 1238 */ 1239 void copy_supervisor_to_kernel(struct xregs_state *xstate) 1240 { 1241 struct xstate_header *header; 1242 u64 max_bit, min_bit; 1243 u32 lmask, hmask; 1244 int err, i; 1245 1246 if (WARN_ON(!boot_cpu_has(X86_FEATURE_XSAVES))) 1247 return; 1248 1249 if (!xfeatures_mask_supervisor()) 1250 return; 1251 1252 max_bit = __fls(xfeatures_mask_supervisor()); 1253 min_bit = __ffs(xfeatures_mask_supervisor()); 1254 1255 lmask = xfeatures_mask_supervisor(); 1256 hmask = xfeatures_mask_supervisor() >> 32; 1257 XSTATE_OP(XSAVES, xstate, lmask, hmask, err); 1258 1259 /* We should never fault when copying to a kernel buffer: */ 1260 if (WARN_ON_FPU(err)) 1261 return; 1262 1263 /* 1264 * At this point, the buffer has only supervisor states and must be 1265 * converted back to normal kernel format. 1266 */ 1267 header = &xstate->header; 1268 header->xcomp_bv |= xfeatures_mask_all; 1269 1270 /* 1271 * This only moves states up in the buffer. Start with 1272 * the last state and move backwards so that states are 1273 * not overwritten until after they are moved. Note: 1274 * memmove() allows overlapping src/dst buffers. 1275 */ 1276 for (i = max_bit; i >= min_bit; i--) { 1277 u8 *xbuf = (u8 *)xstate; 1278 1279 if (!((header->xfeatures >> i) & 1)) 1280 continue; 1281 1282 /* Move xfeature 'i' into its normal location */ 1283 memmove(xbuf + xstate_comp_offsets[i], 1284 xbuf + xstate_supervisor_only_offsets[i], 1285 xstate_sizes[i]); 1286 } 1287 } 1288 1289 /** 1290 * copy_dynamic_supervisor_to_kernel() - Save dynamic supervisor states to 1291 * an xsave area 1292 * @xstate: A pointer to an xsave area 1293 * @mask: Represent the dynamic supervisor features saved into the xsave area 1294 * 1295 * Only the dynamic supervisor states sets in the mask are saved into the xsave 1296 * area (See the comment in XFEATURE_MASK_DYNAMIC for the details of dynamic 1297 * supervisor feature). Besides the dynamic supervisor states, the legacy 1298 * region and XSAVE header are also saved into the xsave area. The supervisor 1299 * features in the XFEATURE_MASK_SUPERVISOR_SUPPORTED and 1300 * XFEATURE_MASK_SUPERVISOR_UNSUPPORTED are not saved. 1301 * 1302 * The xsave area must be 64-bytes aligned. 1303 */ 1304 void copy_dynamic_supervisor_to_kernel(struct xregs_state *xstate, u64 mask) 1305 { 1306 u64 dynamic_mask = xfeatures_mask_dynamic() & mask; 1307 u32 lmask, hmask; 1308 int err; 1309 1310 if (WARN_ON_FPU(!boot_cpu_has(X86_FEATURE_XSAVES))) 1311 return; 1312 1313 if (WARN_ON_FPU(!dynamic_mask)) 1314 return; 1315 1316 lmask = dynamic_mask; 1317 hmask = dynamic_mask >> 32; 1318 1319 XSTATE_OP(XSAVES, xstate, lmask, hmask, err); 1320 1321 /* Should never fault when copying to a kernel buffer */ 1322 WARN_ON_FPU(err); 1323 } 1324 1325 /** 1326 * copy_kernel_to_dynamic_supervisor() - Restore dynamic supervisor states from 1327 * an xsave area 1328 * @xstate: A pointer to an xsave area 1329 * @mask: Represent the dynamic supervisor features restored from the xsave area 1330 * 1331 * Only the dynamic supervisor states sets in the mask are restored from the 1332 * xsave area (See the comment in XFEATURE_MASK_DYNAMIC for the details of 1333 * dynamic supervisor feature). Besides the dynamic supervisor states, the 1334 * legacy region and XSAVE header are also restored from the xsave area. The 1335 * supervisor features in the XFEATURE_MASK_SUPERVISOR_SUPPORTED and 1336 * XFEATURE_MASK_SUPERVISOR_UNSUPPORTED are not restored. 1337 * 1338 * The xsave area must be 64-bytes aligned. 1339 */ 1340 void copy_kernel_to_dynamic_supervisor(struct xregs_state *xstate, u64 mask) 1341 { 1342 u64 dynamic_mask = xfeatures_mask_dynamic() & mask; 1343 u32 lmask, hmask; 1344 int err; 1345 1346 if (WARN_ON_FPU(!boot_cpu_has(X86_FEATURE_XSAVES))) 1347 return; 1348 1349 if (WARN_ON_FPU(!dynamic_mask)) 1350 return; 1351 1352 lmask = dynamic_mask; 1353 hmask = dynamic_mask >> 32; 1354 1355 XSTATE_OP(XRSTORS, xstate, lmask, hmask, err); 1356 1357 /* Should never fault when copying from a kernel buffer */ 1358 WARN_ON_FPU(err); 1359 } 1360 1361 #ifdef CONFIG_PROC_PID_ARCH_STATUS 1362 /* 1363 * Report the amount of time elapsed in millisecond since last AVX512 1364 * use in the task. 1365 */ 1366 static void avx512_status(struct seq_file *m, struct task_struct *task) 1367 { 1368 unsigned long timestamp = READ_ONCE(task->thread.fpu.avx512_timestamp); 1369 long delta; 1370 1371 if (!timestamp) { 1372 /* 1373 * Report -1 if no AVX512 usage 1374 */ 1375 delta = -1; 1376 } else { 1377 delta = (long)(jiffies - timestamp); 1378 /* 1379 * Cap to LONG_MAX if time difference > LONG_MAX 1380 */ 1381 if (delta < 0) 1382 delta = LONG_MAX; 1383 delta = jiffies_to_msecs(delta); 1384 } 1385 1386 seq_put_decimal_ll(m, "AVX512_elapsed_ms:\t", delta); 1387 seq_putc(m, '\n'); 1388 } 1389 1390 /* 1391 * Report architecture specific information 1392 */ 1393 int proc_pid_arch_status(struct seq_file *m, struct pid_namespace *ns, 1394 struct pid *pid, struct task_struct *task) 1395 { 1396 /* 1397 * Report AVX512 state if the processor and build option supported. 1398 */ 1399 if (cpu_feature_enabled(X86_FEATURE_AVX512F)) 1400 avx512_status(m, task); 1401 1402 return 0; 1403 } 1404 #endif /* CONFIG_PROC_PID_ARCH_STATUS */ 1405 1406 #ifdef CONFIG_IOMMU_SUPPORT 1407 void update_pasid(void) 1408 { 1409 u64 pasid_state; 1410 u32 pasid; 1411 1412 if (!cpu_feature_enabled(X86_FEATURE_ENQCMD)) 1413 return; 1414 1415 if (!current->mm) 1416 return; 1417 1418 pasid = READ_ONCE(current->mm->pasid); 1419 /* Set the valid bit in the PASID MSR/state only for valid pasid. */ 1420 pasid_state = pasid == PASID_DISABLED ? 1421 pasid : pasid | MSR_IA32_PASID_VALID; 1422 1423 /* 1424 * No need to hold fregs_lock() since the task's fpstate won't 1425 * be changed by others (e.g. ptrace) while the task is being 1426 * switched to or is in IPI. 1427 */ 1428 if (!test_thread_flag(TIF_NEED_FPU_LOAD)) { 1429 /* The MSR is active and can be directly updated. */ 1430 wrmsrl(MSR_IA32_PASID, pasid_state); 1431 } else { 1432 struct fpu *fpu = ¤t->thread.fpu; 1433 struct ia32_pasid_state *ppasid_state; 1434 struct xregs_state *xsave; 1435 1436 /* 1437 * The CPU's xstate registers are not currently active. Just 1438 * update the PASID state in the memory buffer here. The 1439 * PASID MSR will be loaded when returning to user mode. 1440 */ 1441 xsave = &fpu->state.xsave; 1442 xsave->header.xfeatures |= XFEATURE_MASK_PASID; 1443 ppasid_state = get_xsave_addr(xsave, XFEATURE_PASID); 1444 /* 1445 * Since XFEATURE_MASK_PASID is set in xfeatures, ppasid_state 1446 * won't be NULL and no need to check its value. 1447 * 1448 * Only update the task's PASID state when it's different 1449 * from the mm's pasid. 1450 */ 1451 if (ppasid_state->pasid != pasid_state) { 1452 /* 1453 * Invalid fpregs so that state restoring will pick up 1454 * the PASID state. 1455 */ 1456 __fpu_invalidate_fpregs_state(fpu); 1457 ppasid_state->pasid = pasid_state; 1458 } 1459 } 1460 } 1461 #endif /* CONFIG_IOMMU_SUPPORT */ 1462