1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Architecture specific OF callbacks. 4 */ 5 #include <linux/export.h> 6 #include <linux/io.h> 7 #include <linux/interrupt.h> 8 #include <linux/list.h> 9 #include <linux/of.h> 10 #include <linux/of_fdt.h> 11 #include <linux/of_address.h> 12 #include <linux/of_platform.h> 13 #include <linux/of_irq.h> 14 #include <linux/libfdt.h> 15 #include <linux/slab.h> 16 #include <linux/pci.h> 17 #include <linux/of_pci.h> 18 #include <linux/initrd.h> 19 20 #include <asm/irqdomain.h> 21 #include <asm/hpet.h> 22 #include <asm/apic.h> 23 #include <asm/pci_x86.h> 24 #include <asm/setup.h> 25 #include <asm/i8259.h> 26 27 __initdata u64 initial_dtb; 28 char __initdata cmd_line[COMMAND_LINE_SIZE]; 29 30 int __initdata of_ioapic; 31 32 void __init early_init_dt_scan_chosen_arch(unsigned long node) 33 { 34 BUG(); 35 } 36 37 void __init early_init_dt_add_memory_arch(u64 base, u64 size) 38 { 39 BUG(); 40 } 41 42 void __init add_dtb(u64 data) 43 { 44 initial_dtb = data + offsetof(struct setup_data, data); 45 } 46 47 /* 48 * CE4100 ids. Will be moved to machine_device_initcall() once we have it. 49 */ 50 static struct of_device_id __initdata ce4100_ids[] = { 51 { .compatible = "intel,ce4100-cp", }, 52 { .compatible = "isa", }, 53 { .compatible = "pci", }, 54 {}, 55 }; 56 57 static int __init add_bus_probe(void) 58 { 59 if (!of_have_populated_dt()) 60 return 0; 61 62 return of_platform_bus_probe(NULL, ce4100_ids, NULL); 63 } 64 device_initcall(add_bus_probe); 65 66 #ifdef CONFIG_PCI 67 struct device_node *pcibios_get_phb_of_node(struct pci_bus *bus) 68 { 69 struct device_node *np; 70 71 for_each_node_by_type(np, "pci") { 72 const void *prop; 73 unsigned int bus_min; 74 75 prop = of_get_property(np, "bus-range", NULL); 76 if (!prop) 77 continue; 78 bus_min = be32_to_cpup(prop); 79 if (bus->number == bus_min) 80 return np; 81 } 82 return NULL; 83 } 84 85 static int x86_of_pci_irq_enable(struct pci_dev *dev) 86 { 87 u32 virq; 88 int ret; 89 u8 pin; 90 91 ret = pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin); 92 if (ret) 93 return ret; 94 if (!pin) 95 return 0; 96 97 virq = of_irq_parse_and_map_pci(dev, 0, 0); 98 if (virq == 0) 99 return -EINVAL; 100 dev->irq = virq; 101 return 0; 102 } 103 104 static void x86_of_pci_irq_disable(struct pci_dev *dev) 105 { 106 } 107 108 void x86_of_pci_init(void) 109 { 110 pcibios_enable_irq = x86_of_pci_irq_enable; 111 pcibios_disable_irq = x86_of_pci_irq_disable; 112 } 113 #endif 114 115 static void __init dtb_setup_hpet(void) 116 { 117 #ifdef CONFIG_HPET_TIMER 118 struct device_node *dn; 119 struct resource r; 120 int ret; 121 122 dn = of_find_compatible_node(NULL, NULL, "intel,ce4100-hpet"); 123 if (!dn) 124 return; 125 ret = of_address_to_resource(dn, 0, &r); 126 if (ret) { 127 WARN_ON(1); 128 return; 129 } 130 hpet_address = r.start; 131 #endif 132 } 133 134 #ifdef CONFIG_X86_LOCAL_APIC 135 136 static void __init dtb_cpu_setup(void) 137 { 138 struct device_node *dn; 139 u32 apic_id, version; 140 int ret; 141 142 version = GET_APIC_VERSION(apic_read(APIC_LVR)); 143 for_each_node_by_type(dn, "cpu") { 144 ret = of_property_read_u32(dn, "reg", &apic_id); 145 if (ret < 0) { 146 pr_warn("%pOF: missing local APIC ID\n", dn); 147 continue; 148 } 149 generic_processor_info(apic_id, version); 150 } 151 } 152 153 static void __init dtb_lapic_setup(void) 154 { 155 struct device_node *dn; 156 struct resource r; 157 unsigned long lapic_addr = APIC_DEFAULT_PHYS_BASE; 158 int ret; 159 160 dn = of_find_compatible_node(NULL, NULL, "intel,ce4100-lapic"); 161 if (dn) { 162 ret = of_address_to_resource(dn, 0, &r); 163 if (WARN_ON(ret)) 164 return; 165 lapic_addr = r.start; 166 } 167 168 /* Did the boot loader setup the local APIC ? */ 169 if (!boot_cpu_has(X86_FEATURE_APIC)) { 170 if (apic_force_enable(lapic_addr)) 171 return; 172 } 173 smp_found_config = 1; 174 pic_mode = 1; 175 register_lapic_address(lapic_addr); 176 } 177 178 #endif /* CONFIG_X86_LOCAL_APIC */ 179 180 #ifdef CONFIG_X86_IO_APIC 181 static unsigned int ioapic_id; 182 183 struct of_ioapic_type { 184 u32 out_type; 185 u32 trigger; 186 u32 polarity; 187 }; 188 189 static struct of_ioapic_type of_ioapic_type[] = 190 { 191 { 192 .out_type = IRQ_TYPE_EDGE_RISING, 193 .trigger = IOAPIC_EDGE, 194 .polarity = 1, 195 }, 196 { 197 .out_type = IRQ_TYPE_LEVEL_LOW, 198 .trigger = IOAPIC_LEVEL, 199 .polarity = 0, 200 }, 201 { 202 .out_type = IRQ_TYPE_LEVEL_HIGH, 203 .trigger = IOAPIC_LEVEL, 204 .polarity = 1, 205 }, 206 { 207 .out_type = IRQ_TYPE_EDGE_FALLING, 208 .trigger = IOAPIC_EDGE, 209 .polarity = 0, 210 }, 211 }; 212 213 static int dt_irqdomain_alloc(struct irq_domain *domain, unsigned int virq, 214 unsigned int nr_irqs, void *arg) 215 { 216 struct irq_fwspec *fwspec = (struct irq_fwspec *)arg; 217 struct of_ioapic_type *it; 218 struct irq_alloc_info tmp; 219 int type_index; 220 221 if (WARN_ON(fwspec->param_count < 2)) 222 return -EINVAL; 223 224 type_index = fwspec->param[1]; 225 if (type_index >= ARRAY_SIZE(of_ioapic_type)) 226 return -EINVAL; 227 228 it = &of_ioapic_type[type_index]; 229 ioapic_set_alloc_attr(&tmp, NUMA_NO_NODE, it->trigger, it->polarity); 230 tmp.ioapic_id = mpc_ioapic_id(mp_irqdomain_ioapic_idx(domain)); 231 tmp.ioapic_pin = fwspec->param[0]; 232 233 return mp_irqdomain_alloc(domain, virq, nr_irqs, &tmp); 234 } 235 236 static const struct irq_domain_ops ioapic_irq_domain_ops = { 237 .alloc = dt_irqdomain_alloc, 238 .free = mp_irqdomain_free, 239 .activate = mp_irqdomain_activate, 240 .deactivate = mp_irqdomain_deactivate, 241 }; 242 243 static void __init dtb_add_ioapic(struct device_node *dn) 244 { 245 struct resource r; 246 int ret; 247 struct ioapic_domain_cfg cfg = { 248 .type = IOAPIC_DOMAIN_DYNAMIC, 249 .ops = &ioapic_irq_domain_ops, 250 .dev = dn, 251 }; 252 253 ret = of_address_to_resource(dn, 0, &r); 254 if (ret) { 255 printk(KERN_ERR "Can't obtain address from device node %pOF.\n", dn); 256 return; 257 } 258 mp_register_ioapic(++ioapic_id, r.start, gsi_top, &cfg); 259 } 260 261 static void __init dtb_ioapic_setup(void) 262 { 263 struct device_node *dn; 264 265 for_each_compatible_node(dn, NULL, "intel,ce4100-ioapic") 266 dtb_add_ioapic(dn); 267 268 if (nr_ioapics) { 269 of_ioapic = 1; 270 return; 271 } 272 printk(KERN_ERR "Error: No information about IO-APIC in OF.\n"); 273 } 274 #else 275 static void __init dtb_ioapic_setup(void) {} 276 #endif 277 278 static void __init dtb_apic_setup(void) 279 { 280 #ifdef CONFIG_X86_LOCAL_APIC 281 dtb_lapic_setup(); 282 dtb_cpu_setup(); 283 #endif 284 dtb_ioapic_setup(); 285 } 286 287 #ifdef CONFIG_OF_EARLY_FLATTREE 288 static void __init x86_flattree_get_config(void) 289 { 290 u32 size, map_len; 291 void *dt; 292 293 if (!initial_dtb) 294 return; 295 296 map_len = max(PAGE_SIZE - (initial_dtb & ~PAGE_MASK), (u64)128); 297 298 dt = early_memremap(initial_dtb, map_len); 299 size = fdt_totalsize(dt); 300 if (map_len < size) { 301 early_memunmap(dt, map_len); 302 dt = early_memremap(initial_dtb, size); 303 map_len = size; 304 } 305 306 early_init_dt_verify(dt); 307 unflatten_and_copy_device_tree(); 308 early_memunmap(dt, map_len); 309 } 310 #else 311 static inline void x86_flattree_get_config(void) { } 312 #endif 313 314 void __init x86_dtb_init(void) 315 { 316 x86_flattree_get_config(); 317 318 if (!of_have_populated_dt()) 319 return; 320 321 dtb_setup_hpet(); 322 dtb_apic_setup(); 323 } 324