1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Architecture specific OF callbacks. 4 */ 5 #include <linux/export.h> 6 #include <linux/io.h> 7 #include <linux/interrupt.h> 8 #include <linux/list.h> 9 #include <linux/of.h> 10 #include <linux/of_fdt.h> 11 #include <linux/of_address.h> 12 #include <linux/of_platform.h> 13 #include <linux/of_irq.h> 14 #include <linux/libfdt.h> 15 #include <linux/slab.h> 16 #include <linux/pci.h> 17 #include <linux/of_pci.h> 18 #include <linux/initrd.h> 19 20 #include <asm/irqdomain.h> 21 #include <asm/hpet.h> 22 #include <asm/apic.h> 23 #include <asm/io_apic.h> 24 #include <asm/pci_x86.h> 25 #include <asm/setup.h> 26 #include <asm/i8259.h> 27 #include <asm/prom.h> 28 29 __initdata u64 initial_dtb; 30 char __initdata cmd_line[COMMAND_LINE_SIZE]; 31 32 int __initdata of_ioapic; 33 34 void __init add_dtb(u64 data) 35 { 36 initial_dtb = data + offsetof(struct setup_data, data); 37 } 38 39 /* 40 * CE4100 ids. Will be moved to machine_device_initcall() once we have it. 41 */ 42 static struct of_device_id __initdata ce4100_ids[] = { 43 { .compatible = "intel,ce4100-cp", }, 44 { .compatible = "isa", }, 45 { .compatible = "pci", }, 46 {}, 47 }; 48 49 static int __init add_bus_probe(void) 50 { 51 if (!of_have_populated_dt()) 52 return 0; 53 54 return of_platform_bus_probe(NULL, ce4100_ids, NULL); 55 } 56 device_initcall(add_bus_probe); 57 58 #ifdef CONFIG_PCI 59 struct device_node *pcibios_get_phb_of_node(struct pci_bus *bus) 60 { 61 struct device_node *np; 62 63 for_each_node_by_type(np, "pci") { 64 const void *prop; 65 unsigned int bus_min; 66 67 prop = of_get_property(np, "bus-range", NULL); 68 if (!prop) 69 continue; 70 bus_min = be32_to_cpup(prop); 71 if (bus->number == bus_min) 72 return np; 73 } 74 return NULL; 75 } 76 77 static int x86_of_pci_irq_enable(struct pci_dev *dev) 78 { 79 u32 virq; 80 int ret; 81 u8 pin; 82 83 ret = pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin); 84 if (ret) 85 return ret; 86 if (!pin) 87 return 0; 88 89 virq = of_irq_parse_and_map_pci(dev, 0, 0); 90 if (virq == 0) 91 return -EINVAL; 92 dev->irq = virq; 93 return 0; 94 } 95 96 static void x86_of_pci_irq_disable(struct pci_dev *dev) 97 { 98 } 99 100 void x86_of_pci_init(void) 101 { 102 pcibios_enable_irq = x86_of_pci_irq_enable; 103 pcibios_disable_irq = x86_of_pci_irq_disable; 104 } 105 #endif 106 107 static void __init dtb_setup_hpet(void) 108 { 109 #ifdef CONFIG_HPET_TIMER 110 struct device_node *dn; 111 struct resource r; 112 int ret; 113 114 dn = of_find_compatible_node(NULL, NULL, "intel,ce4100-hpet"); 115 if (!dn) 116 return; 117 ret = of_address_to_resource(dn, 0, &r); 118 if (ret) { 119 WARN_ON(1); 120 return; 121 } 122 hpet_address = r.start; 123 #endif 124 } 125 126 #ifdef CONFIG_X86_LOCAL_APIC 127 128 static void __init dtb_cpu_setup(void) 129 { 130 struct device_node *dn; 131 u32 apic_id, version; 132 133 version = GET_APIC_VERSION(apic_read(APIC_LVR)); 134 for_each_of_cpu_node(dn) { 135 apic_id = of_get_cpu_hwid(dn, 0); 136 if (apic_id == ~0U) { 137 pr_warn("%pOF: missing local APIC ID\n", dn); 138 continue; 139 } 140 generic_processor_info(apic_id, version); 141 } 142 } 143 144 static void __init dtb_lapic_setup(void) 145 { 146 struct device_node *dn; 147 struct resource r; 148 unsigned long lapic_addr = APIC_DEFAULT_PHYS_BASE; 149 int ret; 150 151 dn = of_find_compatible_node(NULL, NULL, "intel,ce4100-lapic"); 152 if (dn) { 153 ret = of_address_to_resource(dn, 0, &r); 154 if (WARN_ON(ret)) 155 return; 156 lapic_addr = r.start; 157 } 158 159 /* Did the boot loader setup the local APIC ? */ 160 if (!boot_cpu_has(X86_FEATURE_APIC)) { 161 if (apic_force_enable(lapic_addr)) 162 return; 163 } 164 smp_found_config = 1; 165 if (of_property_read_bool(dn, "intel,virtual-wire-mode")) { 166 pr_info("Virtual Wire compatibility mode.\n"); 167 pic_mode = 0; 168 } else { 169 pr_info("IMCR and PIC compatibility mode.\n"); 170 pic_mode = 1; 171 } 172 173 register_lapic_address(lapic_addr); 174 } 175 176 #endif /* CONFIG_X86_LOCAL_APIC */ 177 178 #ifdef CONFIG_X86_IO_APIC 179 static unsigned int ioapic_id; 180 181 struct of_ioapic_type { 182 u32 out_type; 183 u32 is_level; 184 u32 active_low; 185 }; 186 187 static struct of_ioapic_type of_ioapic_type[] = 188 { 189 { 190 .out_type = IRQ_TYPE_EDGE_FALLING, 191 .is_level = 0, 192 .active_low = 1, 193 }, 194 { 195 .out_type = IRQ_TYPE_LEVEL_HIGH, 196 .is_level = 1, 197 .active_low = 0, 198 }, 199 { 200 .out_type = IRQ_TYPE_LEVEL_LOW, 201 .is_level = 1, 202 .active_low = 1, 203 }, 204 { 205 .out_type = IRQ_TYPE_EDGE_RISING, 206 .is_level = 0, 207 .active_low = 0, 208 }, 209 }; 210 211 static int dt_irqdomain_alloc(struct irq_domain *domain, unsigned int virq, 212 unsigned int nr_irqs, void *arg) 213 { 214 struct irq_fwspec *fwspec = (struct irq_fwspec *)arg; 215 struct of_ioapic_type *it; 216 struct irq_alloc_info tmp; 217 int type_index; 218 219 if (WARN_ON(fwspec->param_count < 2)) 220 return -EINVAL; 221 222 type_index = fwspec->param[1]; 223 if (type_index >= ARRAY_SIZE(of_ioapic_type)) 224 return -EINVAL; 225 226 it = &of_ioapic_type[type_index]; 227 ioapic_set_alloc_attr(&tmp, NUMA_NO_NODE, it->is_level, it->active_low); 228 tmp.devid = mpc_ioapic_id(mp_irqdomain_ioapic_idx(domain)); 229 tmp.ioapic.pin = fwspec->param[0]; 230 231 return mp_irqdomain_alloc(domain, virq, nr_irqs, &tmp); 232 } 233 234 static const struct irq_domain_ops ioapic_irq_domain_ops = { 235 .alloc = dt_irqdomain_alloc, 236 .free = mp_irqdomain_free, 237 .activate = mp_irqdomain_activate, 238 .deactivate = mp_irqdomain_deactivate, 239 }; 240 241 static void __init dtb_add_ioapic(struct device_node *dn) 242 { 243 struct resource r; 244 int ret; 245 struct ioapic_domain_cfg cfg = { 246 .type = IOAPIC_DOMAIN_DYNAMIC, 247 .ops = &ioapic_irq_domain_ops, 248 .dev = dn, 249 }; 250 251 ret = of_address_to_resource(dn, 0, &r); 252 if (ret) { 253 pr_err("Can't obtain address from device node %pOF.\n", dn); 254 return; 255 } 256 mp_register_ioapic(++ioapic_id, r.start, gsi_top, &cfg); 257 } 258 259 static void __init dtb_ioapic_setup(void) 260 { 261 struct device_node *dn; 262 263 for_each_compatible_node(dn, NULL, "intel,ce4100-ioapic") 264 dtb_add_ioapic(dn); 265 266 if (nr_ioapics) { 267 of_ioapic = 1; 268 return; 269 } 270 pr_err("Error: No information about IO-APIC in OF.\n"); 271 } 272 #else 273 static void __init dtb_ioapic_setup(void) {} 274 #endif 275 276 static void __init dtb_apic_setup(void) 277 { 278 #ifdef CONFIG_X86_LOCAL_APIC 279 dtb_lapic_setup(); 280 dtb_cpu_setup(); 281 #endif 282 dtb_ioapic_setup(); 283 } 284 285 #ifdef CONFIG_OF_EARLY_FLATTREE 286 static void __init x86_flattree_get_config(void) 287 { 288 u32 size, map_len; 289 void *dt; 290 291 if (!initial_dtb) 292 return; 293 294 map_len = max(PAGE_SIZE - (initial_dtb & ~PAGE_MASK), (u64)128); 295 296 dt = early_memremap(initial_dtb, map_len); 297 size = fdt_totalsize(dt); 298 if (map_len < size) { 299 early_memunmap(dt, map_len); 300 dt = early_memremap(initial_dtb, size); 301 map_len = size; 302 } 303 304 early_init_dt_verify(dt); 305 unflatten_and_copy_device_tree(); 306 early_memunmap(dt, map_len); 307 } 308 #else 309 static inline void x86_flattree_get_config(void) { } 310 #endif 311 312 void __init x86_dtb_init(void) 313 { 314 x86_flattree_get_config(); 315 316 if (!of_have_populated_dt()) 317 return; 318 319 dtb_setup_hpet(); 320 dtb_apic_setup(); 321 } 322