1 /* 2 * Architecture specific OF callbacks. 3 */ 4 #include <linux/bootmem.h> 5 #include <linux/export.h> 6 #include <linux/io.h> 7 #include <linux/irqdomain.h> 8 #include <linux/interrupt.h> 9 #include <linux/list.h> 10 #include <linux/of.h> 11 #include <linux/of_fdt.h> 12 #include <linux/of_address.h> 13 #include <linux/of_platform.h> 14 #include <linux/of_irq.h> 15 #include <linux/slab.h> 16 #include <linux/pci.h> 17 #include <linux/of_pci.h> 18 #include <linux/initrd.h> 19 20 #include <asm/hpet.h> 21 #include <asm/apic.h> 22 #include <asm/pci_x86.h> 23 #include <asm/setup.h> 24 25 __initdata u64 initial_dtb; 26 char __initdata cmd_line[COMMAND_LINE_SIZE]; 27 28 int __initdata of_ioapic; 29 30 void __init early_init_dt_scan_chosen_arch(unsigned long node) 31 { 32 BUG(); 33 } 34 35 void __init early_init_dt_add_memory_arch(u64 base, u64 size) 36 { 37 BUG(); 38 } 39 40 void * __init early_init_dt_alloc_memory_arch(u64 size, u64 align) 41 { 42 return __alloc_bootmem(size, align, __pa(MAX_DMA_ADDRESS)); 43 } 44 45 void __init add_dtb(u64 data) 46 { 47 initial_dtb = data + offsetof(struct setup_data, data); 48 } 49 50 /* 51 * CE4100 ids. Will be moved to machine_device_initcall() once we have it. 52 */ 53 static struct of_device_id __initdata ce4100_ids[] = { 54 { .compatible = "intel,ce4100-cp", }, 55 { .compatible = "isa", }, 56 { .compatible = "pci", }, 57 {}, 58 }; 59 60 static int __init add_bus_probe(void) 61 { 62 if (!of_have_populated_dt()) 63 return 0; 64 65 return of_platform_bus_probe(NULL, ce4100_ids, NULL); 66 } 67 module_init(add_bus_probe); 68 69 #ifdef CONFIG_PCI 70 struct device_node *pcibios_get_phb_of_node(struct pci_bus *bus) 71 { 72 struct device_node *np; 73 74 for_each_node_by_type(np, "pci") { 75 const void *prop; 76 unsigned int bus_min; 77 78 prop = of_get_property(np, "bus-range", NULL); 79 if (!prop) 80 continue; 81 bus_min = be32_to_cpup(prop); 82 if (bus->number == bus_min) 83 return np; 84 } 85 return NULL; 86 } 87 88 static int x86_of_pci_irq_enable(struct pci_dev *dev) 89 { 90 u32 virq; 91 int ret; 92 u8 pin; 93 94 ret = pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin); 95 if (ret) 96 return ret; 97 if (!pin) 98 return 0; 99 100 virq = of_irq_parse_and_map_pci(dev, 0, 0); 101 if (virq == 0) 102 return -EINVAL; 103 dev->irq = virq; 104 return 0; 105 } 106 107 static void x86_of_pci_irq_disable(struct pci_dev *dev) 108 { 109 } 110 111 void x86_of_pci_init(void) 112 { 113 pcibios_enable_irq = x86_of_pci_irq_enable; 114 pcibios_disable_irq = x86_of_pci_irq_disable; 115 } 116 #endif 117 118 static void __init dtb_setup_hpet(void) 119 { 120 #ifdef CONFIG_HPET_TIMER 121 struct device_node *dn; 122 struct resource r; 123 int ret; 124 125 dn = of_find_compatible_node(NULL, NULL, "intel,ce4100-hpet"); 126 if (!dn) 127 return; 128 ret = of_address_to_resource(dn, 0, &r); 129 if (ret) { 130 WARN_ON(1); 131 return; 132 } 133 hpet_address = r.start; 134 #endif 135 } 136 137 static void __init dtb_lapic_setup(void) 138 { 139 #ifdef CONFIG_X86_LOCAL_APIC 140 struct device_node *dn; 141 struct resource r; 142 int ret; 143 144 dn = of_find_compatible_node(NULL, NULL, "intel,ce4100-lapic"); 145 if (!dn) 146 return; 147 148 ret = of_address_to_resource(dn, 0, &r); 149 if (WARN_ON(ret)) 150 return; 151 152 /* Did the boot loader setup the local APIC ? */ 153 if (!cpu_has_apic) { 154 if (apic_force_enable(r.start)) 155 return; 156 } 157 smp_found_config = 1; 158 pic_mode = 1; 159 register_lapic_address(r.start); 160 generic_processor_info(boot_cpu_physical_apicid, 161 GET_APIC_VERSION(apic_read(APIC_LVR))); 162 #endif 163 } 164 165 #ifdef CONFIG_X86_IO_APIC 166 static unsigned int ioapic_id; 167 168 static void __init dtb_add_ioapic(struct device_node *dn) 169 { 170 struct resource r; 171 int ret; 172 173 ret = of_address_to_resource(dn, 0, &r); 174 if (ret) { 175 printk(KERN_ERR "Can't obtain address from node %s.\n", 176 dn->full_name); 177 return; 178 } 179 mp_register_ioapic(++ioapic_id, r.start, gsi_top); 180 } 181 182 static void __init dtb_ioapic_setup(void) 183 { 184 struct device_node *dn; 185 186 for_each_compatible_node(dn, NULL, "intel,ce4100-ioapic") 187 dtb_add_ioapic(dn); 188 189 if (nr_ioapics) { 190 of_ioapic = 1; 191 return; 192 } 193 printk(KERN_ERR "Error: No information about IO-APIC in OF.\n"); 194 } 195 #else 196 static void __init dtb_ioapic_setup(void) {} 197 #endif 198 199 static void __init dtb_apic_setup(void) 200 { 201 dtb_lapic_setup(); 202 dtb_ioapic_setup(); 203 } 204 205 #ifdef CONFIG_OF_FLATTREE 206 static void __init x86_flattree_get_config(void) 207 { 208 u32 size, map_len; 209 void *dt; 210 211 if (!initial_dtb) 212 return; 213 214 map_len = max(PAGE_SIZE - (initial_dtb & ~PAGE_MASK), (u64)128); 215 216 initial_boot_params = dt = early_memremap(initial_dtb, map_len); 217 size = of_get_flat_dt_size(); 218 if (map_len < size) { 219 early_iounmap(dt, map_len); 220 initial_boot_params = dt = early_memremap(initial_dtb, size); 221 map_len = size; 222 } 223 224 unflatten_and_copy_device_tree(); 225 early_iounmap(dt, map_len); 226 } 227 #else 228 static inline void x86_flattree_get_config(void) { } 229 #endif 230 231 void __init x86_dtb_init(void) 232 { 233 x86_flattree_get_config(); 234 235 if (!of_have_populated_dt()) 236 return; 237 238 dtb_setup_hpet(); 239 dtb_apic_setup(); 240 } 241 242 #ifdef CONFIG_X86_IO_APIC 243 244 struct of_ioapic_type { 245 u32 out_type; 246 u32 trigger; 247 u32 polarity; 248 }; 249 250 static struct of_ioapic_type of_ioapic_type[] = 251 { 252 { 253 .out_type = IRQ_TYPE_EDGE_RISING, 254 .trigger = IOAPIC_EDGE, 255 .polarity = 1, 256 }, 257 { 258 .out_type = IRQ_TYPE_LEVEL_LOW, 259 .trigger = IOAPIC_LEVEL, 260 .polarity = 0, 261 }, 262 { 263 .out_type = IRQ_TYPE_LEVEL_HIGH, 264 .trigger = IOAPIC_LEVEL, 265 .polarity = 1, 266 }, 267 { 268 .out_type = IRQ_TYPE_EDGE_FALLING, 269 .trigger = IOAPIC_EDGE, 270 .polarity = 0, 271 }, 272 }; 273 274 static int ioapic_xlate(struct irq_domain *domain, 275 struct device_node *controller, 276 const u32 *intspec, u32 intsize, 277 irq_hw_number_t *out_hwirq, u32 *out_type) 278 { 279 struct io_apic_irq_attr attr; 280 struct of_ioapic_type *it; 281 u32 line, idx; 282 int rc; 283 284 if (WARN_ON(intsize < 2)) 285 return -EINVAL; 286 287 line = intspec[0]; 288 289 if (intspec[1] >= ARRAY_SIZE(of_ioapic_type)) 290 return -EINVAL; 291 292 it = &of_ioapic_type[intspec[1]]; 293 294 idx = (u32) domain->host_data; 295 set_io_apic_irq_attr(&attr, idx, line, it->trigger, it->polarity); 296 297 rc = io_apic_setup_irq_pin_once(irq_find_mapping(domain, line), 298 cpu_to_node(0), &attr); 299 if (rc) 300 return rc; 301 302 *out_hwirq = line; 303 *out_type = it->out_type; 304 return 0; 305 } 306 307 const struct irq_domain_ops ioapic_irq_domain_ops = { 308 .xlate = ioapic_xlate, 309 }; 310 311 static void dt_add_ioapic_domain(unsigned int ioapic_num, 312 struct device_node *np) 313 { 314 struct irq_domain *id; 315 struct mp_ioapic_gsi *gsi_cfg; 316 int ret; 317 int num; 318 319 gsi_cfg = mp_ioapic_gsi_routing(ioapic_num); 320 num = gsi_cfg->gsi_end - gsi_cfg->gsi_base + 1; 321 322 id = irq_domain_add_linear(np, num, &ioapic_irq_domain_ops, 323 (void *)ioapic_num); 324 BUG_ON(!id); 325 if (gsi_cfg->gsi_base == 0) { 326 /* 327 * The first NR_IRQS_LEGACY irq descs are allocated in 328 * early_irq_init() and need just a mapping. The 329 * remaining irqs need both. All of them are preallocated 330 * and assigned so we can keep the 1:1 mapping which the ioapic 331 * is having. 332 */ 333 irq_domain_associate_many(id, 0, 0, NR_IRQS_LEGACY); 334 335 if (num > NR_IRQS_LEGACY) { 336 ret = irq_create_strict_mappings(id, NR_IRQS_LEGACY, 337 NR_IRQS_LEGACY, num - NR_IRQS_LEGACY); 338 if (ret) 339 pr_err("Error creating mapping for the " 340 "remaining IRQs: %d\n", ret); 341 } 342 irq_set_default_host(id); 343 } else { 344 ret = irq_create_strict_mappings(id, gsi_cfg->gsi_base, 0, num); 345 if (ret) 346 pr_err("Error creating IRQ mapping: %d\n", ret); 347 } 348 } 349 350 static void __init ioapic_add_ofnode(struct device_node *np) 351 { 352 struct resource r; 353 int i, ret; 354 355 ret = of_address_to_resource(np, 0, &r); 356 if (ret) { 357 printk(KERN_ERR "Failed to obtain address for %s\n", 358 np->full_name); 359 return; 360 } 361 362 for (i = 0; i < nr_ioapics; i++) { 363 if (r.start == mpc_ioapic_addr(i)) { 364 dt_add_ioapic_domain(i, np); 365 return; 366 } 367 } 368 printk(KERN_ERR "IOxAPIC at %s is not registered.\n", np->full_name); 369 } 370 371 void __init x86_add_irq_domains(void) 372 { 373 struct device_node *dp; 374 375 if (!of_have_populated_dt()) 376 return; 377 378 for_each_node_with_property(dp, "interrupt-controller") { 379 if (of_device_is_compatible(dp, "intel,ce4100-ioapic")) 380 ioapic_add_ofnode(dp); 381 } 382 } 383 #else 384 void __init x86_add_irq_domains(void) { } 385 #endif 386