xref: /openbmc/linux/arch/x86/kernel/devicetree.c (revision 3a83e4e6)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Architecture specific OF callbacks.
4  */
5 #include <linux/export.h>
6 #include <linux/io.h>
7 #include <linux/interrupt.h>
8 #include <linux/list.h>
9 #include <linux/of.h>
10 #include <linux/of_fdt.h>
11 #include <linux/of_address.h>
12 #include <linux/of_platform.h>
13 #include <linux/of_irq.h>
14 #include <linux/libfdt.h>
15 #include <linux/slab.h>
16 #include <linux/pci.h>
17 #include <linux/of_pci.h>
18 #include <linux/initrd.h>
19 
20 #include <asm/irqdomain.h>
21 #include <asm/hpet.h>
22 #include <asm/apic.h>
23 #include <asm/io_apic.h>
24 #include <asm/pci_x86.h>
25 #include <asm/setup.h>
26 #include <asm/i8259.h>
27 #include <asm/prom.h>
28 
29 __initdata u64 initial_dtb;
30 char __initdata cmd_line[COMMAND_LINE_SIZE];
31 
32 int __initdata of_ioapic;
33 
34 void __init early_init_dt_scan_chosen_arch(unsigned long node)
35 {
36 	BUG();
37 }
38 
39 void __init early_init_dt_add_memory_arch(u64 base, u64 size)
40 {
41 	BUG();
42 }
43 
44 void __init add_dtb(u64 data)
45 {
46 	initial_dtb = data + offsetof(struct setup_data, data);
47 }
48 
49 /*
50  * CE4100 ids. Will be moved to machine_device_initcall() once we have it.
51  */
52 static struct of_device_id __initdata ce4100_ids[] = {
53 	{ .compatible = "intel,ce4100-cp", },
54 	{ .compatible = "isa", },
55 	{ .compatible = "pci", },
56 	{},
57 };
58 
59 static int __init add_bus_probe(void)
60 {
61 	if (!of_have_populated_dt())
62 		return 0;
63 
64 	return of_platform_bus_probe(NULL, ce4100_ids, NULL);
65 }
66 device_initcall(add_bus_probe);
67 
68 #ifdef CONFIG_PCI
69 struct device_node *pcibios_get_phb_of_node(struct pci_bus *bus)
70 {
71 	struct device_node *np;
72 
73 	for_each_node_by_type(np, "pci") {
74 		const void *prop;
75 		unsigned int bus_min;
76 
77 		prop = of_get_property(np, "bus-range", NULL);
78 		if (!prop)
79 			continue;
80 		bus_min = be32_to_cpup(prop);
81 		if (bus->number == bus_min)
82 			return np;
83 	}
84 	return NULL;
85 }
86 
87 static int x86_of_pci_irq_enable(struct pci_dev *dev)
88 {
89 	u32 virq;
90 	int ret;
91 	u8 pin;
92 
93 	ret = pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
94 	if (ret)
95 		return ret;
96 	if (!pin)
97 		return 0;
98 
99 	virq = of_irq_parse_and_map_pci(dev, 0, 0);
100 	if (virq == 0)
101 		return -EINVAL;
102 	dev->irq = virq;
103 	return 0;
104 }
105 
106 static void x86_of_pci_irq_disable(struct pci_dev *dev)
107 {
108 }
109 
110 void x86_of_pci_init(void)
111 {
112 	pcibios_enable_irq = x86_of_pci_irq_enable;
113 	pcibios_disable_irq = x86_of_pci_irq_disable;
114 }
115 #endif
116 
117 static void __init dtb_setup_hpet(void)
118 {
119 #ifdef CONFIG_HPET_TIMER
120 	struct device_node *dn;
121 	struct resource r;
122 	int ret;
123 
124 	dn = of_find_compatible_node(NULL, NULL, "intel,ce4100-hpet");
125 	if (!dn)
126 		return;
127 	ret = of_address_to_resource(dn, 0, &r);
128 	if (ret) {
129 		WARN_ON(1);
130 		return;
131 	}
132 	hpet_address = r.start;
133 #endif
134 }
135 
136 #ifdef CONFIG_X86_LOCAL_APIC
137 
138 static void __init dtb_cpu_setup(void)
139 {
140 	struct device_node *dn;
141 	u32 apic_id, version;
142 	int ret;
143 
144 	version = GET_APIC_VERSION(apic_read(APIC_LVR));
145 	for_each_of_cpu_node(dn) {
146 		ret = of_property_read_u32(dn, "reg", &apic_id);
147 		if (ret < 0) {
148 			pr_warn("%pOF: missing local APIC ID\n", dn);
149 			continue;
150 		}
151 		generic_processor_info(apic_id, version);
152 	}
153 }
154 
155 static void __init dtb_lapic_setup(void)
156 {
157 	struct device_node *dn;
158 	struct resource r;
159 	unsigned long lapic_addr = APIC_DEFAULT_PHYS_BASE;
160 	int ret;
161 
162 	dn = of_find_compatible_node(NULL, NULL, "intel,ce4100-lapic");
163 	if (dn) {
164 		ret = of_address_to_resource(dn, 0, &r);
165 		if (WARN_ON(ret))
166 			return;
167 		lapic_addr = r.start;
168 	}
169 
170 	/* Did the boot loader setup the local APIC ? */
171 	if (!boot_cpu_has(X86_FEATURE_APIC)) {
172 		if (apic_force_enable(lapic_addr))
173 			return;
174 	}
175 	smp_found_config = 1;
176 	pic_mode = 1;
177 	register_lapic_address(lapic_addr);
178 }
179 
180 #endif /* CONFIG_X86_LOCAL_APIC */
181 
182 #ifdef CONFIG_X86_IO_APIC
183 static unsigned int ioapic_id;
184 
185 struct of_ioapic_type {
186 	u32 out_type;
187 	u32 trigger;
188 	u32 polarity;
189 };
190 
191 static struct of_ioapic_type of_ioapic_type[] =
192 {
193 	{
194 		.out_type	= IRQ_TYPE_EDGE_RISING,
195 		.trigger	= IOAPIC_EDGE,
196 		.polarity	= 1,
197 	},
198 	{
199 		.out_type	= IRQ_TYPE_LEVEL_LOW,
200 		.trigger	= IOAPIC_LEVEL,
201 		.polarity	= 0,
202 	},
203 	{
204 		.out_type	= IRQ_TYPE_LEVEL_HIGH,
205 		.trigger	= IOAPIC_LEVEL,
206 		.polarity	= 1,
207 	},
208 	{
209 		.out_type	= IRQ_TYPE_EDGE_FALLING,
210 		.trigger	= IOAPIC_EDGE,
211 		.polarity	= 0,
212 	},
213 };
214 
215 static int dt_irqdomain_alloc(struct irq_domain *domain, unsigned int virq,
216 			      unsigned int nr_irqs, void *arg)
217 {
218 	struct irq_fwspec *fwspec = (struct irq_fwspec *)arg;
219 	struct of_ioapic_type *it;
220 	struct irq_alloc_info tmp;
221 	int type_index;
222 
223 	if (WARN_ON(fwspec->param_count < 2))
224 		return -EINVAL;
225 
226 	type_index = fwspec->param[1];
227 	if (type_index >= ARRAY_SIZE(of_ioapic_type))
228 		return -EINVAL;
229 
230 	it = &of_ioapic_type[type_index];
231 	ioapic_set_alloc_attr(&tmp, NUMA_NO_NODE, it->trigger, it->polarity);
232 	tmp.ioapic_id = mpc_ioapic_id(mp_irqdomain_ioapic_idx(domain));
233 	tmp.ioapic_pin = fwspec->param[0];
234 
235 	return mp_irqdomain_alloc(domain, virq, nr_irqs, &tmp);
236 }
237 
238 static const struct irq_domain_ops ioapic_irq_domain_ops = {
239 	.alloc		= dt_irqdomain_alloc,
240 	.free		= mp_irqdomain_free,
241 	.activate	= mp_irqdomain_activate,
242 	.deactivate	= mp_irqdomain_deactivate,
243 };
244 
245 static void __init dtb_add_ioapic(struct device_node *dn)
246 {
247 	struct resource r;
248 	int ret;
249 	struct ioapic_domain_cfg cfg = {
250 		.type = IOAPIC_DOMAIN_DYNAMIC,
251 		.ops = &ioapic_irq_domain_ops,
252 		.dev = dn,
253 	};
254 
255 	ret = of_address_to_resource(dn, 0, &r);
256 	if (ret) {
257 		printk(KERN_ERR "Can't obtain address from device node %pOF.\n", dn);
258 		return;
259 	}
260 	mp_register_ioapic(++ioapic_id, r.start, gsi_top, &cfg);
261 }
262 
263 static void __init dtb_ioapic_setup(void)
264 {
265 	struct device_node *dn;
266 
267 	for_each_compatible_node(dn, NULL, "intel,ce4100-ioapic")
268 		dtb_add_ioapic(dn);
269 
270 	if (nr_ioapics) {
271 		of_ioapic = 1;
272 		return;
273 	}
274 	printk(KERN_ERR "Error: No information about IO-APIC in OF.\n");
275 }
276 #else
277 static void __init dtb_ioapic_setup(void) {}
278 #endif
279 
280 static void __init dtb_apic_setup(void)
281 {
282 #ifdef CONFIG_X86_LOCAL_APIC
283 	dtb_lapic_setup();
284 	dtb_cpu_setup();
285 #endif
286 	dtb_ioapic_setup();
287 }
288 
289 #ifdef CONFIG_OF_EARLY_FLATTREE
290 static void __init x86_flattree_get_config(void)
291 {
292 	u32 size, map_len;
293 	void *dt;
294 
295 	if (!initial_dtb)
296 		return;
297 
298 	map_len = max(PAGE_SIZE - (initial_dtb & ~PAGE_MASK), (u64)128);
299 
300 	dt = early_memremap(initial_dtb, map_len);
301 	size = fdt_totalsize(dt);
302 	if (map_len < size) {
303 		early_memunmap(dt, map_len);
304 		dt = early_memremap(initial_dtb, size);
305 		map_len = size;
306 	}
307 
308 	early_init_dt_verify(dt);
309 	unflatten_and_copy_device_tree();
310 	early_memunmap(dt, map_len);
311 }
312 #else
313 static inline void x86_flattree_get_config(void) { }
314 #endif
315 
316 void __init x86_dtb_init(void)
317 {
318 	x86_flattree_get_config();
319 
320 	if (!of_have_populated_dt())
321 		return;
322 
323 	dtb_setup_hpet();
324 	dtb_apic_setup();
325 }
326