1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Architecture specific OF callbacks. 4 */ 5 #include <linux/export.h> 6 #include <linux/io.h> 7 #include <linux/interrupt.h> 8 #include <linux/list.h> 9 #include <linux/of.h> 10 #include <linux/of_fdt.h> 11 #include <linux/of_address.h> 12 #include <linux/of_platform.h> 13 #include <linux/of_irq.h> 14 #include <linux/slab.h> 15 #include <linux/pci.h> 16 #include <linux/of_pci.h> 17 #include <linux/initrd.h> 18 19 #include <asm/irqdomain.h> 20 #include <asm/hpet.h> 21 #include <asm/apic.h> 22 #include <asm/pci_x86.h> 23 #include <asm/setup.h> 24 #include <asm/i8259.h> 25 26 __initdata u64 initial_dtb; 27 char __initdata cmd_line[COMMAND_LINE_SIZE]; 28 29 int __initdata of_ioapic; 30 31 void __init early_init_dt_scan_chosen_arch(unsigned long node) 32 { 33 BUG(); 34 } 35 36 void __init early_init_dt_add_memory_arch(u64 base, u64 size) 37 { 38 BUG(); 39 } 40 41 void __init add_dtb(u64 data) 42 { 43 initial_dtb = data + offsetof(struct setup_data, data); 44 } 45 46 /* 47 * CE4100 ids. Will be moved to machine_device_initcall() once we have it. 48 */ 49 static struct of_device_id __initdata ce4100_ids[] = { 50 { .compatible = "intel,ce4100-cp", }, 51 { .compatible = "isa", }, 52 { .compatible = "pci", }, 53 {}, 54 }; 55 56 static int __init add_bus_probe(void) 57 { 58 if (!of_have_populated_dt()) 59 return 0; 60 61 return of_platform_bus_probe(NULL, ce4100_ids, NULL); 62 } 63 device_initcall(add_bus_probe); 64 65 #ifdef CONFIG_PCI 66 struct device_node *pcibios_get_phb_of_node(struct pci_bus *bus) 67 { 68 struct device_node *np; 69 70 for_each_node_by_type(np, "pci") { 71 const void *prop; 72 unsigned int bus_min; 73 74 prop = of_get_property(np, "bus-range", NULL); 75 if (!prop) 76 continue; 77 bus_min = be32_to_cpup(prop); 78 if (bus->number == bus_min) 79 return np; 80 } 81 return NULL; 82 } 83 84 static int x86_of_pci_irq_enable(struct pci_dev *dev) 85 { 86 u32 virq; 87 int ret; 88 u8 pin; 89 90 ret = pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin); 91 if (ret) 92 return ret; 93 if (!pin) 94 return 0; 95 96 virq = of_irq_parse_and_map_pci(dev, 0, 0); 97 if (virq == 0) 98 return -EINVAL; 99 dev->irq = virq; 100 return 0; 101 } 102 103 static void x86_of_pci_irq_disable(struct pci_dev *dev) 104 { 105 } 106 107 void x86_of_pci_init(void) 108 { 109 pcibios_enable_irq = x86_of_pci_irq_enable; 110 pcibios_disable_irq = x86_of_pci_irq_disable; 111 } 112 #endif 113 114 static void __init dtb_setup_hpet(void) 115 { 116 #ifdef CONFIG_HPET_TIMER 117 struct device_node *dn; 118 struct resource r; 119 int ret; 120 121 dn = of_find_compatible_node(NULL, NULL, "intel,ce4100-hpet"); 122 if (!dn) 123 return; 124 ret = of_address_to_resource(dn, 0, &r); 125 if (ret) { 126 WARN_ON(1); 127 return; 128 } 129 hpet_address = r.start; 130 #endif 131 } 132 133 static void __init dtb_lapic_setup(void) 134 { 135 #ifdef CONFIG_X86_LOCAL_APIC 136 struct device_node *dn; 137 struct resource r; 138 int ret; 139 140 dn = of_find_compatible_node(NULL, NULL, "intel,ce4100-lapic"); 141 if (!dn) 142 return; 143 144 ret = of_address_to_resource(dn, 0, &r); 145 if (WARN_ON(ret)) 146 return; 147 148 /* Did the boot loader setup the local APIC ? */ 149 if (!boot_cpu_has(X86_FEATURE_APIC)) { 150 if (apic_force_enable(r.start)) 151 return; 152 } 153 smp_found_config = 1; 154 pic_mode = 1; 155 register_lapic_address(r.start); 156 generic_processor_info(boot_cpu_physical_apicid, 157 GET_APIC_VERSION(apic_read(APIC_LVR))); 158 #endif 159 } 160 161 #ifdef CONFIG_X86_IO_APIC 162 static unsigned int ioapic_id; 163 164 struct of_ioapic_type { 165 u32 out_type; 166 u32 trigger; 167 u32 polarity; 168 }; 169 170 static struct of_ioapic_type of_ioapic_type[] = 171 { 172 { 173 .out_type = IRQ_TYPE_EDGE_RISING, 174 .trigger = IOAPIC_EDGE, 175 .polarity = 1, 176 }, 177 { 178 .out_type = IRQ_TYPE_LEVEL_LOW, 179 .trigger = IOAPIC_LEVEL, 180 .polarity = 0, 181 }, 182 { 183 .out_type = IRQ_TYPE_LEVEL_HIGH, 184 .trigger = IOAPIC_LEVEL, 185 .polarity = 1, 186 }, 187 { 188 .out_type = IRQ_TYPE_EDGE_FALLING, 189 .trigger = IOAPIC_EDGE, 190 .polarity = 0, 191 }, 192 }; 193 194 static int dt_irqdomain_alloc(struct irq_domain *domain, unsigned int virq, 195 unsigned int nr_irqs, void *arg) 196 { 197 struct of_phandle_args *irq_data = (void *)arg; 198 struct of_ioapic_type *it; 199 struct irq_alloc_info tmp; 200 201 if (WARN_ON(irq_data->args_count < 2)) 202 return -EINVAL; 203 if (irq_data->args[1] >= ARRAY_SIZE(of_ioapic_type)) 204 return -EINVAL; 205 206 it = &of_ioapic_type[irq_data->args[1]]; 207 ioapic_set_alloc_attr(&tmp, NUMA_NO_NODE, it->trigger, it->polarity); 208 tmp.ioapic_id = mpc_ioapic_id(mp_irqdomain_ioapic_idx(domain)); 209 tmp.ioapic_pin = irq_data->args[0]; 210 211 return mp_irqdomain_alloc(domain, virq, nr_irqs, &tmp); 212 } 213 214 static const struct irq_domain_ops ioapic_irq_domain_ops = { 215 .alloc = dt_irqdomain_alloc, 216 .free = mp_irqdomain_free, 217 .activate = mp_irqdomain_activate, 218 .deactivate = mp_irqdomain_deactivate, 219 }; 220 221 static void __init dtb_add_ioapic(struct device_node *dn) 222 { 223 struct resource r; 224 int ret; 225 struct ioapic_domain_cfg cfg = { 226 .type = IOAPIC_DOMAIN_DYNAMIC, 227 .ops = &ioapic_irq_domain_ops, 228 .dev = dn, 229 }; 230 231 ret = of_address_to_resource(dn, 0, &r); 232 if (ret) { 233 printk(KERN_ERR "Can't obtain address from device node %pOF.\n", dn); 234 return; 235 } 236 mp_register_ioapic(++ioapic_id, r.start, gsi_top, &cfg); 237 } 238 239 static void __init dtb_ioapic_setup(void) 240 { 241 struct device_node *dn; 242 243 for_each_compatible_node(dn, NULL, "intel,ce4100-ioapic") 244 dtb_add_ioapic(dn); 245 246 if (nr_ioapics) { 247 of_ioapic = 1; 248 return; 249 } 250 printk(KERN_ERR "Error: No information about IO-APIC in OF.\n"); 251 } 252 #else 253 static void __init dtb_ioapic_setup(void) {} 254 #endif 255 256 static void __init dtb_apic_setup(void) 257 { 258 dtb_lapic_setup(); 259 dtb_ioapic_setup(); 260 } 261 262 #ifdef CONFIG_OF_EARLY_FLATTREE 263 static void __init x86_flattree_get_config(void) 264 { 265 u32 size, map_len; 266 void *dt; 267 268 if (!initial_dtb) 269 return; 270 271 map_len = max(PAGE_SIZE - (initial_dtb & ~PAGE_MASK), (u64)128); 272 273 initial_boot_params = dt = early_memremap(initial_dtb, map_len); 274 size = of_get_flat_dt_size(); 275 if (map_len < size) { 276 early_memunmap(dt, map_len); 277 initial_boot_params = dt = early_memremap(initial_dtb, size); 278 map_len = size; 279 } 280 281 unflatten_and_copy_device_tree(); 282 early_memunmap(dt, map_len); 283 } 284 #else 285 static inline void x86_flattree_get_config(void) { } 286 #endif 287 288 void __init x86_dtb_init(void) 289 { 290 x86_flattree_get_config(); 291 292 if (!of_have_populated_dt()) 293 return; 294 295 dtb_setup_hpet(); 296 dtb_apic_setup(); 297 } 298