1 #include <linux/kernel.h> 2 #include <linux/sched.h> 3 #include <linux/sched/clock.h> 4 #include <linux/mm.h> 5 #include <asm/cpufeature.h> 6 #include <asm/msr.h> 7 #include "cpu.h" 8 9 static void early_init_transmeta(struct cpuinfo_x86 *c) 10 { 11 u32 xlvl; 12 13 /* Transmeta-defined flags: level 0x80860001 */ 14 xlvl = cpuid_eax(0x80860000); 15 if ((xlvl & 0xffff0000) == 0x80860000) { 16 if (xlvl >= 0x80860001) 17 c->x86_capability[CPUID_8086_0001_EDX] = cpuid_edx(0x80860001); 18 } 19 } 20 21 static void init_transmeta(struct cpuinfo_x86 *c) 22 { 23 unsigned int cap_mask, uk, max, dummy; 24 unsigned int cms_rev1, cms_rev2; 25 unsigned int cpu_rev, cpu_freq = 0, cpu_flags, new_cpu_rev; 26 char cpu_info[65]; 27 28 early_init_transmeta(c); 29 30 cpu_detect_cache_sizes(c); 31 32 /* Print CMS and CPU revision */ 33 max = cpuid_eax(0x80860000); 34 cpu_rev = 0; 35 if (max >= 0x80860001) { 36 cpuid(0x80860001, &dummy, &cpu_rev, &cpu_freq, &cpu_flags); 37 if (cpu_rev != 0x02000000) { 38 pr_info("CPU: Processor revision %u.%u.%u.%u, %u MHz\n", 39 (cpu_rev >> 24) & 0xff, 40 (cpu_rev >> 16) & 0xff, 41 (cpu_rev >> 8) & 0xff, 42 cpu_rev & 0xff, 43 cpu_freq); 44 } 45 } 46 if (max >= 0x80860002) { 47 cpuid(0x80860002, &new_cpu_rev, &cms_rev1, &cms_rev2, &dummy); 48 if (cpu_rev == 0x02000000) { 49 pr_info("CPU: Processor revision %08X, %u MHz\n", 50 new_cpu_rev, cpu_freq); 51 } 52 pr_info("CPU: Code Morphing Software revision %u.%u.%u-%u-%u\n", 53 (cms_rev1 >> 24) & 0xff, 54 (cms_rev1 >> 16) & 0xff, 55 (cms_rev1 >> 8) & 0xff, 56 cms_rev1 & 0xff, 57 cms_rev2); 58 } 59 if (max >= 0x80860006) { 60 cpuid(0x80860003, 61 (void *)&cpu_info[0], 62 (void *)&cpu_info[4], 63 (void *)&cpu_info[8], 64 (void *)&cpu_info[12]); 65 cpuid(0x80860004, 66 (void *)&cpu_info[16], 67 (void *)&cpu_info[20], 68 (void *)&cpu_info[24], 69 (void *)&cpu_info[28]); 70 cpuid(0x80860005, 71 (void *)&cpu_info[32], 72 (void *)&cpu_info[36], 73 (void *)&cpu_info[40], 74 (void *)&cpu_info[44]); 75 cpuid(0x80860006, 76 (void *)&cpu_info[48], 77 (void *)&cpu_info[52], 78 (void *)&cpu_info[56], 79 (void *)&cpu_info[60]); 80 cpu_info[64] = '\0'; 81 pr_info("CPU: %s\n", cpu_info); 82 } 83 84 /* Unhide possibly hidden capability flags */ 85 rdmsr(0x80860004, cap_mask, uk); 86 wrmsr(0x80860004, ~0, uk); 87 c->x86_capability[CPUID_1_EDX] = cpuid_edx(0x00000001); 88 wrmsr(0x80860004, cap_mask, uk); 89 90 /* All Transmeta CPUs have a constant TSC */ 91 set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC); 92 93 #ifdef CONFIG_SYSCTL 94 /* 95 * randomize_va_space slows us down enormously; 96 * it probably triggers retranslation of x86->native bytecode 97 */ 98 randomize_va_space = 0; 99 #endif 100 } 101 102 static const struct cpu_dev transmeta_cpu_dev = { 103 .c_vendor = "Transmeta", 104 .c_ident = { "GenuineTMx86", "TransmetaCPU" }, 105 .c_early_init = early_init_transmeta, 106 .c_init = init_transmeta, 107 .c_x86_vendor = X86_VENDOR_TRANSMETA, 108 }; 109 110 cpu_dev_register(transmeta_cpu_dev); 111